JPS6161413B2 - - Google Patents

Info

Publication number
JPS6161413B2
JPS6161413B2 JP55159333A JP15933380A JPS6161413B2 JP S6161413 B2 JPS6161413 B2 JP S6161413B2 JP 55159333 A JP55159333 A JP 55159333A JP 15933380 A JP15933380 A JP 15933380A JP S6161413 B2 JPS6161413 B2 JP S6161413B2
Authority
JP
Japan
Prior art keywords
branch
area
instruction
address
buffer register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55159333A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5783850A (en
Inventor
Hisazumi Ueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55159333A priority Critical patent/JPS5783850A/ja
Publication of JPS5783850A publication Critical patent/JPS5783850A/ja
Publication of JPS6161413B2 publication Critical patent/JPS6161413B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Executing Machine-Instructions (AREA)
JP55159333A 1980-11-12 1980-11-12 Data processing device Granted JPS5783850A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55159333A JPS5783850A (en) 1980-11-12 1980-11-12 Data processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55159333A JPS5783850A (en) 1980-11-12 1980-11-12 Data processing device

Publications (2)

Publication Number Publication Date
JPS5783850A JPS5783850A (en) 1982-05-25
JPS6161413B2 true JPS6161413B2 (enrdf_load_stackoverflow) 1986-12-25

Family

ID=15691524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55159333A Granted JPS5783850A (en) 1980-11-12 1980-11-12 Data processing device

Country Status (1)

Country Link
JP (1) JPS5783850A (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2865689B2 (ja) * 1989-02-13 1999-03-08 株式会社日立製作所 データ処理装置
JPH10228421A (ja) * 1997-02-14 1998-08-25 Nec Ic Microcomput Syst Ltd メモリアクセス制御回路
US6986052B1 (en) 2000-06-30 2006-01-10 Intel Corporation Method and apparatus for secure execution using a secure memory partition
KR100505106B1 (ko) * 2002-05-29 2005-07-29 삼성전자주식회사 강화된 보안 기능을 갖춘 스마트 카드
GB2448149B (en) * 2007-04-03 2011-05-18 Advanced Risc Mach Ltd Protected function calling
GB2448151B (en) 2007-04-03 2011-05-04 Advanced Risc Mach Ltd Memory domain based security control within data processing systems

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5323244A (en) * 1976-08-16 1978-03-03 Hitachi Ltd Information processing unit

Also Published As

Publication number Publication date
JPS5783850A (en) 1982-05-25

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