JPS6155755U - - Google Patents
Info
- Publication number
- JPS6155755U JPS6155755U JP13829784U JP13829784U JPS6155755U JP S6155755 U JPS6155755 U JP S6155755U JP 13829784 U JP13829784 U JP 13829784U JP 13829784 U JP13829784 U JP 13829784U JP S6155755 U JPS6155755 U JP S6155755U
- Authority
- JP
- Japan
- Prior art keywords
- bus
- image processing
- detection circuit
- abnormality detection
- mpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005856 abnormality Effects 0.000 claims description 5
- 238000001514 detection method Methods 0.000 claims description 4
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- MHABMANUFPZXEB-UHFFFAOYSA-N O-demethyl-aloesaponarin I Natural products O=C1C2=CC=CC(O)=C2C(=O)C2=C1C=C(O)C(C(O)=O)=C2C MHABMANUFPZXEB-UHFFFAOYSA-N 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Landscapes
- Processing Or Creating Images (AREA)
- Bus Control (AREA)
Description
第１図は本考案の一実施例を示すブロツク図、
第２図は本考案に係るバス異常検出回路の周辺構
成を示す回路図、第３図は本考案に係るバス異常
検出回路の詳細回路図、第４図は従来の画像処理
装置を示すブロツク図。
符号の説明、１１…画像入力部、１２……画像
処理部、１３…モニタテレビ、１４…プリンタ、
１５…ＲＯＭ、１６…ＭＰＵ、１７…ＲＡＭ、１
８…DMAC、１９…バス異常検出回路、１９ａ…リ
トリガブルモノマルチバイブレータ（モノマルチ
）、１９ｂ…インバータ、１９ｃ…NANDゲート、
１９ｄ…ＲＳフリツプフロツプ（RSFF）。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a circuit diagram showing the peripheral configuration of the bus abnormality detection circuit according to the present invention, FIG. 3 is a detailed circuit diagram of the bus abnormality detection circuit according to the present invention, and FIG. 4 is a block diagram showing a conventional image processing device. . Explanation of symbols, 11... Image input unit, 12... Image processing unit, 13... Monitor television, 14... Printer,
15...ROM, 16...MPU, 17...RAM, 1
8...DMAC, 19...Bus abnormality detection circuit, 19a...Retriggerable mono multivibrator (mono multi), 19b...Inverter, 19c...NAND gate,
19d...RS flip-flop (RSFF).
Claims (1)
ずに補助コントローラを用いて両者に共通なバス
を介し高速に転送或いは処理する画像処理装置に
おいて、 前記コントローラによる前記バスの使用状況を
監視し、該バスが所定時間以上不使用状態にある
ことをもつて前記バスの異常を判定するバス異常
検出回路を設けたことを特徴とする画像処理装置
。[Claims for Utility Model Registration] An image processing device that uses an auxiliary controller to transfer or process image data stored in a memory at high speed via a bus common to both without going through an MPU, comprising: An image processing apparatus comprising: a bus abnormality detection circuit that monitors usage status and determines abnormality of the bus based on the fact that the bus is not in use for a predetermined period of time or more.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984138297U JPH0512824Y2 (en) | 1984-09-12 | 1984-09-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984138297U JPH0512824Y2 (en) | 1984-09-12 | 1984-09-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6155755U true JPS6155755U (en) | 1986-04-15 |
| JPH0512824Y2 JPH0512824Y2 (en) | 1993-04-05 |
Family
ID=30696692
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984138297U Expired - Lifetime JPH0512824Y2 (en) | 1984-09-12 | 1984-09-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0512824Y2 (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5696310A (en) * | 1979-12-28 | 1981-08-04 | Fujitsu Ltd | Centralized control system of bus |
| JPS5696311A (en) * | 1979-12-28 | 1981-08-04 | Fujitsu Ltd | Bus centralized monitoring system |
| JPS56145446A (en) * | 1980-04-11 | 1981-11-12 | Panafacom Ltd | Disconnection system for common-use bus |
| JPS5829062A (en) * | 1981-08-13 | 1983-02-21 | Toshiba Corp | Microcomputer system |
-
1984
- 1984-09-12 JP JP1984138297U patent/JPH0512824Y2/ja not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5696310A (en) * | 1979-12-28 | 1981-08-04 | Fujitsu Ltd | Centralized control system of bus |
| JPS5696311A (en) * | 1979-12-28 | 1981-08-04 | Fujitsu Ltd | Bus centralized monitoring system |
| JPS56145446A (en) * | 1980-04-11 | 1981-11-12 | Panafacom Ltd | Disconnection system for common-use bus |
| JPS5829062A (en) * | 1981-08-13 | 1983-02-21 | Toshiba Corp | Microcomputer system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0512824Y2 (en) | 1993-04-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6155755U (en) | ||
| JPS6131757U (en) | printing device | |
| JPS5984628U (en) | Peripheral control system | |
| JPS5897605U (en) | Controller for batch processing using multiprocessor | |
| JPS60167462U (en) | Image processing device | |
| JPS60230235A (en) | Output controlling circuit for printer | |
| JPS59113836U (en) | Japanese word processor | |
| JPS58120048U (en) | thermal printer | |
| JPS6353152U (en) | ||
| JPS5949233U (en) | microcomputer | |
| JPS5897876U (en) | Controller devices for motorcycle radios, etc. | |
| JPS62179662U (en) | ||
| JPS5851363U (en) | Integrated circuit for microcomputer | |
| JPS61168440U (en) | ||
| JPS6389128U (en) | ||
| JPS5928704U (en) | numerical control device | |
| JPS59108942U (en) | Computer system self-diagnosis device | |
| JPS5810157U (en) | Process information printing method | |
| JPS59171843U (en) | feed device | |
| JPS59104250U (en) | Microcomputer wait operation monitoring circuit | |
| JPS62199869U (en) | ||
| JPS6030006U (en) | sequence control system | |
| JPS635542U (en) | ||
| JPS6011105U (en) | Mandrel mill control device | |
| JPS60116544U (en) | process input/output device |