JPS6151541U - - Google Patents
Info
- Publication number
- JPS6151541U JPS6151541U JP13220385U JP13220385U JPS6151541U JP S6151541 U JPS6151541 U JP S6151541U JP 13220385 U JP13220385 U JP 13220385U JP 13220385 U JP13220385 U JP 13220385U JP S6151541 U JPS6151541 U JP S6151541U
- Authority
- JP
- Japan
- Prior art keywords
- recipe
- sets
- data
- register
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007689 inspection Methods 0.000 claims 1
Landscapes
- Retry When Errors Occur (AREA)
Description
第１図は乗算器の場合のレシジユー検査回路の
一従来例、第２図ａは本考案による実施例のレシ
ジユー検査回路の一部、第２図ｂは第２図ａの回
路のタイムチヤートである。
図中、１は被乗数レジスタ、２は乗数レジスタ
、５は乗算器、６はサム・レジスタ、７はキヤリ
・レジスタ、８，９，１４，１５，２０，２１お
よび３０はレシジユー発生回路、１２と１８はレ
シジユー加算回路、１３は比較回路、２４はレシ
ジユー乗算回路、３１と３２は入力ゲート回路、
１０，１１および３４はレジスタである。
FIG. 1 shows a conventional example of a recipe test circuit for a multiplier, FIG. 2 a shows a part of a recipe test circuit according to an embodiment of the present invention, and FIG. be. In the figure, 1 is a multiplicand register, 2 is a multiplier register, 5 is a multiplier, 6 is a sum register, 7 is a carry register, 8, 9, 14, 15, 20, 21 and 30 are a recipe generation circuit, 12 and 18 is a recipe addition circuit, 13 is a comparison circuit, 24 is a recipe multiplication circuit, 31 and 32 are input gate circuits,
10, 11 and 34 are registers.
Claims (1)
演算検査回路において、２組のデータのレシジユ
ーを発生するとき、１組のレシジユー発生回路と
、上記２組のデータのいずれかを選択的に該レシ
ジユー発生回路へ入力するゲート手段と、 上記レシジユー発生回路の出力を一時保持する
第１のレジスタと、上記２組のデータに対応して
もうけられ上記レシジユー発生回路により得られ
たレシジユーを保持する第２および第３のレジス
タをもうけ、１サイクルの前半で上記レシジユー
発生回路により上記２組のデータのうちの一方の
データのレシジユーを作り上記第１のレジスタへ
保持し当該１サイクルの後半で上記レシジユー発
生回路により上記２組のデータのうちの他方のデ
ータのレシジユーを作り当該レシジユーを上記第
２および第３のレジスタのうちの所定の一方のレ
ジスタへセツトするとともに、上記第１のレジス
タの出力を上記第２および第３のレジスタのうち
の所定の他方のレジスタへセツトすることを特徴
とする演算検査回路。[Claims for Utility Model Registration] When generating two sets of data recipes in an arithmetic inspection circuit that performs a recipe check of an arithmetic processing circuit, one set of recipe generation circuits and one of the two sets of data gate means for selectively inputting the recipe to the recipe generation circuit; a first register for temporarily holding the output of the recipe generation circuit; and a recipe generated corresponding to the two sets of data and obtained by the recipe generation circuit. In the first half of one cycle, the recipe generation circuit generates a recipe for one of the two sets of data and holds it in the first register. In the second half, the recipe generating circuit generates a recipe for the other data of the two sets of data, sets the recipe in a predetermined one of the second and third registers, and sets the recipe in the first register. An arithmetic test circuit characterized in that the output of the register is set to a predetermined other of the second and third registers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985132203U JPS6142183Y2 (en) | 1985-08-29 | 1985-08-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985132203U JPS6142183Y2 (en) | 1985-08-29 | 1985-08-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6151541U true JPS6151541U (en) | 1986-04-07 |
| JPS6142183Y2 JPS6142183Y2 (en) | 1986-12-01 |
Family
ID=30690766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985132203U Expired JPS6142183Y2 (en) | 1985-08-29 | 1985-08-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6142183Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63145539A (en) * | 1986-07-03 | 1988-06-17 | Nec Corp | Modulo-w circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS535095A (en) * | 1976-07-06 | 1978-01-18 | Mitsubishi Electric Corp | Ozonizer |
-
1985
- 1985-08-29 JP JP1985132203U patent/JPS6142183Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS535095A (en) * | 1976-07-06 | 1978-01-18 | Mitsubishi Electric Corp | Ozonizer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63145539A (en) * | 1986-07-03 | 1988-06-17 | Nec Corp | Modulo-w circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6142183Y2 (en) | 1986-12-01 |
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