JPS6151256A - 受信デ−タ転送制御方式 - Google Patents

受信デ−タ転送制御方式

Info

Publication number
JPS6151256A
JPS6151256A JP59172696A JP17269684A JPS6151256A JP S6151256 A JPS6151256 A JP S6151256A JP 59172696 A JP59172696 A JP 59172696A JP 17269684 A JP17269684 A JP 17269684A JP S6151256 A JPS6151256 A JP S6151256A
Authority
JP
Japan
Prior art keywords
data
buffer
information
data buffer
buffer area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59172696A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0439700B2 (cg-RX-API-DMAC7.html
Inventor
Toshiki Nakajima
俊樹 中島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59172696A priority Critical patent/JPS6151256A/ja
Publication of JPS6151256A publication Critical patent/JPS6151256A/ja
Publication of JPH0439700B2 publication Critical patent/JPH0439700B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Computer And Data Communications (AREA)
JP59172696A 1984-08-20 1984-08-20 受信デ−タ転送制御方式 Granted JPS6151256A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59172696A JPS6151256A (ja) 1984-08-20 1984-08-20 受信デ−タ転送制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59172696A JPS6151256A (ja) 1984-08-20 1984-08-20 受信デ−タ転送制御方式

Publications (2)

Publication Number Publication Date
JPS6151256A true JPS6151256A (ja) 1986-03-13
JPH0439700B2 JPH0439700B2 (cg-RX-API-DMAC7.html) 1992-06-30

Family

ID=15946655

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59172696A Granted JPS6151256A (ja) 1984-08-20 1984-08-20 受信デ−タ転送制御方式

Country Status (1)

Country Link
JP (1) JPS6151256A (cg-RX-API-DMAC7.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4878197A (en) * 1987-08-17 1989-10-31 Control Data Corporation Data communication apparatus
JPH01276257A (ja) * 1988-04-27 1989-11-06 Yamatake Honeywell Co Ltd 通信制御装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4878197A (en) * 1987-08-17 1989-10-31 Control Data Corporation Data communication apparatus
JPH01276257A (ja) * 1988-04-27 1989-11-06 Yamatake Honeywell Co Ltd 通信制御装置

Also Published As

Publication number Publication date
JPH0439700B2 (cg-RX-API-DMAC7.html) 1992-06-30

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