JPS6149449A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6149449A JPS6149449A JP17185784A JP17185784A JPS6149449A JP S6149449 A JPS6149449 A JP S6149449A JP 17185784 A JP17185784 A JP 17185784A JP 17185784 A JP17185784 A JP 17185784A JP S6149449 A JPS6149449 A JP S6149449A
- Authority
- JP
- Japan
- Prior art keywords
- cutting
- lead frame
- resin
- electronic apparatus
- heat sink
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000005520 cutting process Methods 0.000 claims abstract description 29
- 239000011347 resin Substances 0.000 claims abstract description 17
- 229920005989 resin Polymers 0.000 claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 8
- 238000000465 moulding Methods 0.000 claims description 2
- 230000002950 deficient Effects 0.000 abstract 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 230000007547 defect Effects 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、半導体装置の製造方法、詳しくは、リードフ
レームを樹脂で成形した後の樹脂封止半導体装置の不要
となる側のリードフレームの切断方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a semiconductor device, and more particularly, a method for cutting a lead frame on the unnecessary side of a resin-sealed semiconductor device after molding the lead frame with resin. It is related to.
従来例の構成とその問題点
樹脂封止型半導体装置は、量産性ならびにコスト面では
、金属外囲封止型半導体装置に勝っているが、動作時に
発生する熱を、放散させることでは、金属封止型半導体
装置に劣っている。Conventional configurations and their problems Resin-sealed semiconductor devices are superior to metal-enclosed semiconductor devices in terms of mass production and cost. Inferior to sealed semiconductor devices.
近年、半導体装置の樹脂封止化が進み、かなり大きな電
力を取り扱うことのできるトランジスターも樹脂封止構
造とされるに至っている。この場合、放熱をよくするこ
とが重要である。In recent years, resin encapsulation of semiconductor devices has progressed, and even transistors that can handle considerably large amounts of power have come to have a resin encapsulation structure. In this case, it is important to improve heat dissipation.
以下図面を参照しながら、上述したような従来の樹脂封
止型半導体装置について説明する。The conventional resin-sealed semiconductor device as described above will be described below with reference to the drawings.
第１図ａ、ｂは、従来の樹脂封止型半導体装置の切断工
程を示す工程順断面図である。第１図ｄにおいて、１は
チップである。２は、リードフレーム、３は、樹脂、４
は、リードフレームの切断刃物である。５は、リードフ
レームのそり、６は、アルミニウム細線（ボンデングワ
イヤー）である。FIGS. 1A and 1B are step-by-step cross-sectional views showing the cutting process of a conventional resin-sealed semiconductor device. In FIG. 1d, 1 is a chip. 2 is a lead frame, 3 is a resin, 4
is a lead frame cutting knife. 5 is a lead frame warp, and 6 is a thin aluminum wire (bonding wire).
まず半導体チップ１をリードフレーム２上にボンディン
グし、チップ１のペース電極、エミッタ電極から、リー
ドフレーム２の左右に、それぞれ、アルミニウム細線６
Ｃ結線する。First, the semiconductor chip 1 is bonded onto the lead frame 2, and thin aluminum wires 6 are connected from the pace electrode and emitter electrode of the chip 1 to the left and right sides of the lead frame 2, respectively.
Connect C.
次に、リードフレーム２のチップ１及びアルミニウム細
線６の樹脂封止を行う。そして、リードフレーム２の樹
脂封止部から突出する部分で、外部リードとは反対側に
延在する不要となる側のリード端部ば、切断方向を放熱
板の取り付け側と反対の方向から、放熱板の取シ付け側
の方向に、リードフレームの切断刃４で、切断を行って
いた。Next, the chip 1 and the thin aluminum wire 6 of the lead frame 2 are sealed with a resin. Then, the unnecessary lead ends of the parts protruding from the resin sealing part of the lead frame 2 that extend on the opposite side from the external leads are cut in the direction opposite to the mounting side of the heat sink. Cutting was performed with the cutting blade 4 of the lead frame in the direction of the mounting side of the heat sink.
しかしながら、上記のような構成では、切断部のそシに
ついて、工夫がなされていす、第１図−〇のように切断
部が電子機器（放熱板）へ取り付けた際に、その切断部
の先端と電子機器（放熱板）との間の距離が十分に保て
ず、トランジスタの実動作において絶縁耐圧の不良を、
引き起こすという欠点を有していた。However, in the above configuration, the shape of the cut part has been devised, so that when the cut part is attached to an electronic device (heat sink) as shown in Figure 1-0, the tip of the cut part is and the electronic equipment (heat sink), which may result in poor dielectric strength during actual operation of the transistor.
It had the disadvantage of causing
発明の目的
本発明は外囲樹脂体から突出しだ不要となる側のリード
フレームを切断する工程の改善により、実回路の装着時
にトランジスタの絶縁耐圧の不良〆 を
減少することができ、信頼性の高い半導体装置（トラン
ジスタ）を得るための製造方法を提供するものである。Purpose of the Invention The present invention improves the process of cutting the lead frame on the side that protrudes from the surrounding resin body and becomes unnecessary, thereby reducing defects in the dielectric strength of the transistor when mounting an actual circuit, and improving reliability. The present invention provides a manufacturing method for obtaining a high quality semiconductor device (transistor).
発明の構成
本発明の半導体装置（トランジスタ）は、ＩＪ−ドフレ
ームの不要となる側の切断工程で切断用刃物の移動方向
、すなわち、切断方向を電子機器（放熱板）の取り付け
側から、電子機器（放熱板）の取り付け側と反対の方向
に切断することがら構成されており、この構成によって
、従来のそりの方向を変化させることができ、電子機器
（放熱板〕に取シ付けた際に、絶縁耐圧特性の不良を減
少することができる。その結果、樹脂封止型半導体装置
の信頼性の向上をはかることになる。Structure of the Invention In the semiconductor device (transistor) of the present invention, the moving direction of the cutting blade, that is, the cutting direction, is changed from the mounting side of the electronic equipment (heat sink) in the cutting process on the unnecessary side of the IJ-deframe. It is constructed by cutting in the opposite direction to the side where the equipment (heat sink) is attached. This configuration allows the direction of the conventional warp to be changed, making it easier to cut when attached to electronic equipment (heat sink). Furthermore, defects in dielectric strength characteristics can be reduced.As a result, reliability of the resin-sealed semiconductor device can be improved.
実施例の説明
以下本発明の一実施例について第２図ａ、ｂの工程順断
面図を参照しながら説明する。第２図−ａは、本発明の
樹脂封止過程を経たのちの状態を示す図である。まず半
導体チップ１をリードフレーム２上にダイポンディング
し、同チップ１のベースを極、エミッタ電極から、リー
ドフレーム２の左右にそれぞれアルミニウム細線６で結
線する。DESCRIPTION OF THE EMBODIMENTS An embodiment of the present invention will be described below with reference to step-by-step sectional views of FIGS. 2a and 2b. FIG. 2-a is a diagram showing the state after the resin sealing process of the present invention. First, a semiconductor chip 1 is die-bonded onto a lead frame 2, and the base of the chip 1 is connected from the pole and emitter electrodes to the left and right sides of the lead frame 2 using thin aluminum wires 6, respectively.
次に、リードフレーム２０テツプ１及びアルミニウム細
線６の全部を樹脂外囲体３で封止を行う。Next, the lead frame 20 step 1 and the aluminum thin wire 6 are all sealed with the resin envelope 3.
そして、第２図すのように、リードフレーム２の不要と
なる側の切断工程に沿った切断方法において、切断用刃
物４の移動方向、すなわち、切断方向を封止樹脂面から
みて、電子機器（放熱板）の取り付け側から、放熱板の
取り付け側と反対の方向に切断する。As shown in FIG. 2, in the cutting method along the cutting process on the unnecessary side of the lead frame 2, when the moving direction of the cutting blade 4, that is, the cutting direction is viewed from the sealing resin surface, the electronic device Cut from the mounting side of the heat sink (heat sink) in the opposite direction to the mounting side of the heat sink.
以上のように本実施例によれば、第２図−すに示す様に
切断時のそシの方向を変化させることができ、第２図−
Ｃのように電子機器（放熱板）に取り付けた際に、その
切断面が電子機器面から十分に離れ、絶縁耐圧特性の不
良を減少させることができ、信頼性の向上をはかること
ができる。第３図は電子機器に取り付けた際の本発明実
施例の耐圧特性をヒストグラム状に示しだ分布図で、従
来例と対比して示す。As described above, according to this embodiment, the direction of the rib during cutting can be changed as shown in FIG.
When attached to an electronic device (heat sink) as shown in C, the cut surface is sufficiently separated from the surface of the electronic device, reducing defects in dielectric strength characteristics and improving reliability. FIG. 3 is a histogram-like distribution diagram showing the withstand voltage characteristics of the embodiment of the present invention when attached to an electronic device, and is compared with a conventional example.
発明の効果
以上のように、本発明は、樹脂封止半導体装置の不要と
なるリードフレームの切断方向を、電子機器（放熱板）
の取り付け側から、電子機器（放熱板）の取り付け側と
反対の方向に切断することによシ同切断部の先端のそり
の方向を変化させることで、電子機器（放熱板）に取り
付けた時の絶縁耐圧特性の不良を減少することができ、
その実用的効果は犬なるものがあるEffects of the Invention As described above, the present invention can change the cutting direction of the unnecessary lead frame of a resin-sealed semiconductor device by changing the cutting direction of an electronic device (heat sink).
By cutting from the mounting side of the electronic device (heat sink) in the opposite direction to the mounting side of the electronic device (heat sink), by changing the direction of the warp at the tip of the cut section, when attached to the electronic device (heat sink). can reduce defects in dielectric strength characteristics,
Its practical effect is that of a dog.
第１図ａ、ｂは、従来の半導体封止装置の切断工程を示
す工程順断面図、第１図Ｃは、従来の樹脂封止型半導体
装置を電子機器（放熱板）に取り付けた状態の断面図、
第２図ａ、ｂは、本発明型の切断工程を示す図、第２図
Ｃは、本発明半導体樹脂封止装置を電子機器（放熱板）
に取り付けた図、第３図は、従来型と本発明樹脂封止半
導体装置の絶縁耐圧特性図である。
１ ・ チップ、２・・・・・す〜ドフレーム、３・
・・樹脂、４・・・・リードフレーム切断刃、６・・・
・ リードフレーム切断工程時のそり、６・・・・・・
アルミワイヤＯ
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
第２図Figures 1a and 1b are cross-sectional views showing the cutting process of a conventional semiconductor encapsulation device, and Figure 1C is a diagram showing a conventional resin-encapsulated semiconductor device attached to an electronic device (heat sink). cross section,
Figures 2a and b are diagrams showing the cutting process of the present invention type, and Figure 2C is a diagram showing the semiconductor resin sealing device of the present invention for electronic equipment (heat sink).
FIG. 3 is a diagram of dielectric strength characteristics of a conventional type and a resin-sealed semiconductor device of the present invention. 1. Chip, 2... Sudo frame, 3.
... Resin, 4... Lead frame cutting blade, 6...
・Warpage during lead frame cutting process, 6...
Aluminum Wire O Name of agent Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2
Claims (1)
持し、前記半導体チップ載置部を含むリードフレーウの
ほぼ全面を外囲体樹脂で成形したのち、前記樹脂外囲体
から突出する不要となる側のリードフレームの切断する
際に、切断方向を放熱板の取り付け側から、放熱板の取
り付け側と反対の方向に切断することを、特徴とする半
導体装置の製造方法。After holding both ends of a lead frame having a semiconductor chip mounting part and molding almost the entire surface of the lead frame including the semiconductor chip mounting part with an envelope resin, the unnecessary side protruding from the resin envelope is molded. 1. A method for manufacturing a semiconductor device, characterized in that when cutting a lead frame, the cutting direction is from the side where the heat sink is attached to the direction opposite to the side where the heat sink is attached.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17185784A JPH0666398B2 (en) | 1984-08-17 | 1984-08-17 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17185784A JPH0666398B2 (en) | 1984-08-17 | 1984-08-17 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6149449A true JPS6149449A (en) | 1986-03-11 |
| JPH0666398B2 JPH0666398B2 (en) | 1994-08-24 |
Family
ID=15931066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17185784A Expired - Lifetime JPH0666398B2 (en) | 1984-08-17 | 1984-08-17 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0666398B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63284468A (en) * | 1987-05-15 | 1988-11-21 | Central Res Inst Of Electric Power Ind | Device for shearing and testing bedrock |
| FR2683945A1 (en) * | 1991-11-18 | 1993-05-21 | Sextant Avionique | Method of shaping and cutting out the lugs of an electronic housing, and device implementing the method |
-
1984
- 1984-08-17 JP JP17185784A patent/JPH0666398B2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63284468A (en) * | 1987-05-15 | 1988-11-21 | Central Res Inst Of Electric Power Ind | Device for shearing and testing bedrock |
| FR2683945A1 (en) * | 1991-11-18 | 1993-05-21 | Sextant Avionique | Method of shaping and cutting out the lugs of an electronic housing, and device implementing the method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0666398B2 (en) | 1994-08-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |