JP2740161B2 - Integrated circuit mounting structure - Google Patents
Integrated circuit mounting structureInfo
- Publication number
- JP2740161B2 JP2740161B2 JP61029970A JP2997086A JP2740161B2 JP 2740161 B2 JP2740161 B2 JP 2740161B2 JP 61029970 A JP61029970 A JP 61029970A JP 2997086 A JP2997086 A JP 2997086A JP 2740161 B2 JP2740161 B2 JP 2740161B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- mounting structure
- lead frame
- ceramic package
- external connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、集積回路の実装構造、特にテープキャリア
方式の集積回路の実装構造に関する。
〔概要〕
本発明は、テープキャリア方式の集積回路の実装構造
において、
あらかじめ所定の形に切断成形された上記集積回路
を、そのリードフレームが外部接続用端子として使用可
能にセラミックパッケージに搭載し、セラミック板を用
いて気密封止する構造とすることにより、
実装における製造工程の簡素化と放熱効果の向上とを
図ったものである。
〔従来の技術〕
従来、この種の実装構造としては、リードレスチップ
キャリア方式が一般的である。また第3図に示すよう
に、裏面に外部接続端子を持つセラミックパッケージ1a
上に集積回路を実装する構造も考えられている。
第3図において、従来の集積回路の実装構造は、集積
回路3がセラミックパッケージ1aにシリコンゴム等の緩
衝材6aを介して実装され、集積回路3のリードフレーム
2はセラミックパッケージ1aの接続用端子に熱圧着等の
方法で接続される。さらに、キャップ7が集積回路3の
裏面に良熱伝導性材料で固着され、その後キャップ7と
セラミックパッケージ1aとが高温半田等で封止された構
造になっている。
〔発明が解決しようとする問題点〕
上述した従来のリードレスチップキャリア方式では、
集積回路の多ピン化、高電力化に対応できないといった
欠点があった。またこのような欠点を解決するため第3
図に示した構造も考えられているが、このような構造で
は、集積回路のセラミックパッケージへの搭載が困難
で、また製造工程が煩雑といった欠点があり、生産歩留
りの低下要因となったり、自動化を妨げる要因となって
いた。また必要なセラミックパッケージが外部端子を含
んだものとなるため高価になるといった欠点もあった。
本発明の目的は、上記の欠点を除去することにより、
構造が簡単で、製造工程の簡素化を図ることができ、か
つ放熱効果の向上を図ることのできる集積回路の実装構
造を提供するにある。
〔問題点を解決するための手段〕
本発明の集積回路の実装構造は、テープキャリア方式
の集積回路の実装構造であって、あらかじめ所定の形に
切断成形された上記集積回路と、この集積回路があらか
じめ所定の形状に切断成形されたリードフレームを外部
接続用端子として使用可能に搭載されたセラミックパッ
ケージと、このセラミックパッケージを封止材により気
密封止したセラミック板とを含んで構成され、前記リー
ドフレームは前記封止されたセラミックパッケージの内
部と外部に跨って一体として構成される。
〔作用〕
本発明は、あらかじめ所定の形に切断成形された、テ
ープキャリア方式の集積回路を、そのリードフレームが
外部接続用端子として使用可能に、セラミックパッケー
ジに搭載し、セラミック板で気密封止する構造となって
いるため、必要なセラミックパッケージは、従来のよう
に外部接続用端子を埋め込んだ高価なものを用いる必要
がない。さらに封じもセラミック板の単なる気密封止で
済み、構造が極めて簡単で多ピンのものも容易に実装で
き、さらに製造工程の簡素化が可能となる。
さらに、集積回路は熱伝導率を考慮したセラミックパ
ッケージに固着剤を介して直接固着されるので、このセ
ラミックパッケージ上にさらに放熱用ヒートシンクを取
り付けることにより、十分な放熱効果の向上を図ること
が可能となる。
〔実施例〕
次に本発明の実施例について図面を参照して説明す
る。
第1図は、本発明の一実施例を示す断面図である。本
実施例は、セラミックパッケージ1に、あらかじめリー
ドフレーム2を、切断成形されたテープキャリア方式の
集積回路3が半田等の良熱伝導性材料で固着され、さら
にセラミック板4がガラス封止材5によって取り付けら
れ気密封止されることで構成される。ここで、リードフ
レーム2は封止部を介して外部に取り出され、そのまま
外部接続用端子を形成する。
本発明の特徴は、第1図において、集積回路3を、そ
のリードフレーム2が外部接続用端子として利用可能な
形で、セラミックパッケージ1に固着し、セラミック板
7で気密封止した形で構成したことにある。
第2図は、本発明の他の実施例を示す断面図で、第1
図の実施例を配線基板に実装した場合を示す。セラミッ
クパッケージ1に放熱用ヒートーシンク8を取り付け、
エポキシ樹脂等の緩衝材6を挟んで配線基板9に取り付
けられる。集積回路3のリードフレーム2の外部接続用
端子の部分は配線基板9の配線10へ熱圧着等の工法で接
続されている。
〔発明の効果〕
以上説明したように本発明は、集積回路のリードフレ
ームを外部接続用端子として使用できるような実装構造
とすることにより、多ピンで高電力の集積回路を簡単な
製造工程で放熱効果に優れた構造で実装できる効果があ
る。また、あらかじめリードフレームを切断成形するこ
とで、その成形形状の自由度が高まり、また製造工程が
簡素化して、自動化および生産効率の向上を図ることが
でき、安価な製品を提供できる効果がある。The present invention relates to a mounting structure of an integrated circuit, particularly to a mounting structure of a tape carrier type integrated circuit. [Overview] The present invention provides a tape carrier type integrated circuit mounting structure, in which the above-mentioned integrated circuit cut and formed into a predetermined shape is mounted on a ceramic package so that its lead frame can be used as an external connection terminal. The use of a ceramic plate for hermetic sealing simplifies the manufacturing process for mounting and improves the heat dissipation effect. [Prior Art] Conventionally, as this type of mounting structure, a leadless chip carrier system is generally used. Also, as shown in FIG. 3, a ceramic package 1a having external connection terminals on the back surface
A structure in which an integrated circuit is mounted thereon is also considered. In FIG. 3, the conventional integrated circuit mounting structure is such that the integrated circuit 3 is mounted on a ceramic package 1a via a cushioning material 6a such as silicon rubber, and the lead frame 2 of the integrated circuit 3 is provided with connection terminals of the ceramic package 1a. Is connected by a method such as thermocompression bonding. Further, the cap 7 is fixed to the back surface of the integrated circuit 3 with a good heat conductive material, and then the cap 7 and the ceramic package 1a are sealed with high-temperature solder or the like. [Problems to be Solved by the Invention] In the conventional leadless chip carrier method described above,
There is a drawback that the integrated circuit cannot cope with an increase in the number of pins and power consumption. In order to solve such drawbacks,
The structure shown in the figure is also conceivable, but such a structure has the disadvantage that it is difficult to mount the integrated circuit on a ceramic package, and the manufacturing process is complicated. It was a factor that hindered. There is also a disadvantage that the required ceramic package includes external terminals and thus becomes expensive. The object of the present invention is to eliminate the above disadvantages,
An object of the present invention is to provide an integrated circuit mounting structure that has a simple structure, can simplify a manufacturing process, and can improve a heat radiation effect. [Means for Solving the Problems] The mounting structure of the integrated circuit of the present invention is a mounting structure of a tape carrier type integrated circuit, wherein the integrated circuit previously cut and molded into a predetermined shape, and the integrated circuit A ceramic package in which a lead frame preliminarily cut and formed into a predetermined shape is mounted so as to be usable as an external connection terminal, and a ceramic plate which is hermetically sealed with a ceramic sealing material. The lead frame is integrally formed over the inside and outside of the sealed ceramic package. [Operation] The present invention mounts a tape carrier type integrated circuit, which has been cut and formed into a predetermined shape in advance, in a ceramic package so that its lead frame can be used as an external connection terminal, and hermetically seals it with a ceramic plate. As a result, it is not necessary to use an expensive ceramic package in which external connection terminals are embedded as in the conventional case. In addition, the sealing is performed simply by hermetic sealing of the ceramic plate, the structure is extremely simple, a multi-pin device can be easily mounted, and the manufacturing process can be simplified. Furthermore, since the integrated circuit is directly fixed to the ceramic package in consideration of thermal conductivity via a bonding agent, it is possible to improve the heat radiation effect sufficiently by mounting a heat radiation heat sink on this ceramic package. Becomes Embodiment Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing one embodiment of the present invention. In this embodiment, a lead frame 2 is preliminarily mounted on a ceramic package 1 and a cut-formed tape carrier type integrated circuit 3 is fixed to the ceramic package 1 with a good heat conductive material such as solder. And hermetically sealed. Here, the lead frame 2 is taken out to the outside via the sealing portion, and forms an external connection terminal as it is. A feature of the present invention is that the integrated circuit 3 is fixed to the ceramic package 1 and hermetically sealed with a ceramic plate 7 so that the lead frame 2 can be used as an external connection terminal in FIG. I did it. FIG. 2 is a sectional view showing another embodiment of the present invention.
The case where the embodiment of the figure is mounted on a wiring board is shown. A heat sink 8 for heat radiation is attached to the ceramic package 1,
It is attached to the wiring board 9 with a buffer material 6 such as an epoxy resin interposed therebetween. The external connection terminals of the lead frame 2 of the integrated circuit 3 are connected to the wiring 10 of the wiring board 9 by a method such as thermocompression bonding. [Effects of the Invention] As described above, the present invention has a mounting structure in which a lead frame of an integrated circuit can be used as an external connection terminal, so that a multi-pin, high-power integrated circuit can be manufactured in a simple manufacturing process. There is an effect that it can be mounted with a structure having an excellent heat radiation effect. In addition, by cutting and forming the lead frame in advance, the degree of freedom in the shape of the lead frame is increased, the manufacturing process is simplified, automation and production efficiency can be improved, and there is an effect that an inexpensive product can be provided. .
【図面の簡単な説明】
第1図は本発明の一実施例を示す断面図。
第2図は本発明の他の実施例を示す断面図。
第3図は従来例を示す断面図。
1、1a……セラミックパッケージ、2……リードフレー
ム、3……集積回路、4……セラミック板、5……ガラ
ス封止材、6、6a……緩衝材、7……キャップ、8……
放熱用ヒートシンク、9……配線基板、10……配線。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view showing an embodiment of the present invention. FIG. 2 is a sectional view showing another embodiment of the present invention. FIG. 3 is a sectional view showing a conventional example. 1, 1a ceramic package, 2 lead frame, 3 integrated circuit, 4 ceramic plate, 5 glass sealing material, 6a buffer material, 7 cap, 8
Heat sink for heat radiation, 9 ... wiring board, 10 ... wiring.
Claims (1)
て、 上記実装構造が、 あらかじめ所定の形に切断成形された上記集積回路と、 この集積回路があらかじめ所定の形状に切断成形された
リードフレームを外部接続用端子として使用可能に搭載
されたセラミックパッケージと、 このセラミックパッケージを封止材により気密封止した
セラミック板と を含んで構成され、前記リードフレームは前記封止され
たセラミックパッケージの内部と外部に跨って一体とし
て構成されることを特徴とする集積回路の実装構造。(57) [Claims] In a mounting structure of an integrated circuit of a tape carrier type, the mounting structure is formed by cutting the integrated circuit into a predetermined shape in advance, and the lead frame formed by cutting the integrated circuit into a predetermined shape is connected to an external connection terminal. And a ceramic plate hermetically sealed with a sealing material. The lead frame extends over the inside and outside of the sealed ceramic package. An integrated circuit mounting structure characterized by being integrally formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61029970A JP2740161B2 (en) | 1986-02-13 | 1986-02-13 | Integrated circuit mounting structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61029970A JP2740161B2 (en) | 1986-02-13 | 1986-02-13 | Integrated circuit mounting structure |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62188251A JPS62188251A (en) | 1987-08-17 |
JP2740161B2 true JP2740161B2 (en) | 1998-04-15 |
Family
ID=12290820
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61029970A Expired - Lifetime JP2740161B2 (en) | 1986-02-13 | 1986-02-13 | Integrated circuit mounting structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2740161B2 (en) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4355463A (en) * | 1980-03-24 | 1982-10-26 | National Semiconductor Corporation | Process for hermetically encapsulating semiconductor devices |
JPS5753371A (en) * | 1980-09-16 | 1982-03-30 | Ricoh Co Ltd | Tape carrier of thermal head and manufacture thereof |
JPS5796562A (en) * | 1980-12-09 | 1982-06-15 | Nec Corp | Semiconductor device and manufacture thereof |
JPS60259400A (en) * | 1984-06-01 | 1985-12-21 | 株式会社リコー | Method of cutting tape carrier |
-
1986
- 1986-02-13 JP JP61029970A patent/JP2740161B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS62188251A (en) | 1987-08-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100220154B1 (en) | Method manufacture of semiconductor package | |
JP2000133767A (en) | Laminated semiconductor package and its manufacture | |
KR19990013363A (en) | Chip scale package and manufacturing method thereof | |
JP3239640B2 (en) | Semiconductor device manufacturing method and semiconductor device | |
JPH09307051A (en) | Semiconductor device sealed by resin and method of manufacturing it | |
US5031025A (en) | Hermetic single chip integrated circuit package | |
JPH02310954A (en) | Lead frame and semiconductor device using same | |
JP2740161B2 (en) | Integrated circuit mounting structure | |
JPH09213878A (en) | Semiconductor device | |
JPH11307721A (en) | Power module device and manufacture therefor | |
JP2819282B2 (en) | Semiconductor package and manufacturing method thereof | |
JPS6390843A (en) | Structure for mounting integrated circuit | |
JPS5891646A (en) | Semiconductor device | |
JPH088384A (en) | Semiconductor device and manufacture thereof | |
JP2814006B2 (en) | Substrate for mounting electronic components | |
KR100704311B1 (en) | Semiconductor chip package having exposed inner lead and manufacturing method thereof | |
JPH03105957A (en) | Semiconductor integrated circuit device | |
JPH11219969A (en) | Semiconductor device | |
JPS61194861A (en) | Resin sealed type semiconductor device | |
JPS6094746A (en) | Ic mounting method | |
KR200149912Y1 (en) | Semiconductor package | |
KR930004294B1 (en) | Plastic multi-chip package | |
KR950008240B1 (en) | Semiconductor package | |
JP2504262Y2 (en) | Semiconductor module | |
JPH05175382A (en) | Semiconductor device |