JPH0666398B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JPH0666398B2 JPH0666398B2 JP17185784A JP17185784A JPH0666398B2 JP H0666398 B2 JPH0666398 B2 JP H0666398B2 JP 17185784 A JP17185784 A JP 17185784A JP 17185784 A JP17185784 A JP 17185784A JP H0666398 B2 JPH0666398 B2 JP H0666398B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- cutting
- lead frame
- semiconductor device
- heat sink
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims description 28
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 238000000034 method Methods 0.000 title description 10
- 238000005520 cutting process Methods 0.000 claims description 33
- 239000011347 resin Substances 0.000 claims description 28
- 229920005989 resin Polymers 0.000 claims description 28
- 238000007789 sealing Methods 0.000 claims description 5
- 230000017525 heat dissipation Effects 0.000 claims description 3
- 238000000465 moulding Methods 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 230000007547 defect Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000001816 cooling Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は、半導体装置の製造方法、詳しくは、リードフ
レームを樹脂で成形した後の樹脂封止半導体装置の不要
となる側のリードフレームの切断方法に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more specifically, a method for cutting a lead frame on a side of a resin-sealed semiconductor device after molding the lead frame with resin, which is unnecessary. It is about.
従来例の構成とその問題点 樹脂封止型半導体装置は、量産性ならびにコスト面で
は、金属外囲封止型半導体装置に勝っているが、動作時
に発生する熱を、放散させることでは、金属封止半導体
装置に劣っている。Configuration of conventional example and its problems The resin-encapsulated semiconductor device is superior to the metal-enclosed encapsulation type semiconductor device in terms of mass productivity and cost. However, by dissipating heat generated during operation, It is inferior to the encapsulated semiconductor device.
近年、半導体装置の樹脂封止化が進み、かなり大きな電
力を取り扱うことのできるトランジスタも樹脂封止構造
とされるに至っている。この場合、放熱をよくすること
が重要である。In recent years, semiconductor devices have been resin-encapsulated, and transistors capable of handling a considerably large amount of electric power have come to have a resin-encapsulated structure. In this case, it is important to improve heat dissipation.
以下図面を参照しながら、上述したような従来の樹脂封
止型半導体装置について説明する。The conventional resin-encapsulated semiconductor device as described above will be described below with reference to the drawings.
第１図ａ、ｂは、従来の樹脂封止型半導体装置の切断工
程を示す工程順断面図である。第１図ａにおいて、１は
半導体チップである。２はリードフレーム、３は樹脂外
囲体、４はリードフレームの切断刃物である。５はリー
ドフレームの切断でそりを生じたリード切断部、６はア
ルミニウム細線（ボンディングワイヤ）である。まず半
導体チップ１をリードフレーム２上にボンディングし、
チップ１のベース電極、エミッタ電極から、リードフレ
ーム２の左右に、それぞれ、アルミニウム細線６で結線
する。1A and 1B are cross-sectional views in order of the processes, showing a cutting process of a conventional resin-sealed semiconductor device. In FIG. 1a, 1 is a semiconductor chip. Reference numeral 2 is a lead frame, 3 is a resin envelope, and 4 is a cutting blade of the lead frame. Reference numeral 5 is a lead cutting portion which is warped by cutting the lead frame, and 6 is an aluminum thin wire (bonding wire). First, the semiconductor chip 1 is bonded onto the lead frame 2,
Aluminum wires 6 are connected from the base electrode and the emitter electrode of the chip 1 to the left and right of the lead frame 2.
次に、リードフレーム２のチップ１及びアルミニウム細
線６の樹脂封止を行う。樹脂外囲体３は、リードフレー
ム２の半導体チップ１を載置した表面側に樹脂層厚く、
反対の裏面側に樹脂層薄く形成し、樹脂層の薄い面を電
子機器（放熱体）に接触させて、放熱のよい構造にして
いる。そして、リードフレーム２の樹脂封止部から突出
する部分で、外部リードとは反対側に延在する不要とな
る側のリード端部は、切断方向を放熱板の取り付け側と
反対の方向から、放熱板の取り付け側の方向に、リード
フレームの切断刃４で、切断を行っていた。Next, the chip 1 of the lead frame 2 and the thin aluminum wire 6 are resin-sealed. The resin envelope 3 has a thick resin layer on the surface side of the lead frame 2 on which the semiconductor chip 1 is mounted,
A thin resin layer is formed on the opposite back surface side, and the thin surface of the resin layer is brought into contact with an electronic device (heat radiator) to provide a structure with good heat dissipation. Then, in the portion of the lead frame 2 protruding from the resin-sealed portion, the unnecessary lead end portion extending to the side opposite to the external lead has a cutting direction from a direction opposite to the mounting side of the heat sink, Cutting was performed by the cutting blade 4 of the lead frame in the direction of the attachment side of the heat sink.
しかしながら、上記のような構成では、切断部のそりに
ついて、工夫がなされておらず、第１図ｃのように切断
部が電子機器（放熱板）へ取り付けた際にその切断部の
先端と電子機器（放熱板）との間の距離が十分に保て
ず、トランジスタの実動作において絶縁耐圧の不良発生
を、引き起こすという欠点を有していた。However, in the above-described configuration, no contrivance is made on the warp of the cutting portion, and when the cutting portion is attached to the electronic device (heat sink) as shown in FIG. There is a drawback in that a sufficient distance from the device (heat sink) cannot be maintained, which causes a failure in the dielectric strength in the actual operation of the transistor.
発明の目的 本発明は樹脂外囲体から突出した不要となる側のリード
フレームを切断する工程の改善により、実回路の電子機
器への装着時にトランジスタの絶縁耐圧の不良発生を減
少することができ、信頼性の高い半導体装置（トランジ
スタ）を得るための製造方法を提供するものである。OBJECT OF THE INVENTION The present invention can reduce the occurrence of defects in the withstand voltage of a transistor when an actual circuit is attached to an electronic device by improving the process of cutting the unnecessary lead frame protruding from the resin envelope. The present invention provides a manufacturing method for obtaining a highly reliable semiconductor device (transistor).
発明の構成 本発明の半導体装置（トランジスタ）の製造方法は、半
導体チップ載置部を有するリードフレームの央部を樹脂
外囲体で、前記半導体チップ載置部側に樹脂層厚く、放
熱板への取り付け側に樹脂層薄く、封止成形したのち、
前記樹脂外囲体から突出する不要の前記リードフレーム
を切断する際に、切断用刃物を、前記樹脂外囲体の放熱
板への取り付け側から前記樹脂外囲体の放熱板への取り
付け側とは反対側の方向に、移動させて切断する工程を
そなえており、この構成によって、残存したリード切断
部のそりの方向を変更させることができ、電子機器（放
熱板）に取り付けた際に、絶縁耐圧特性の不良発生を減
少することができる。その結果、樹脂封止型半導体装置
の信頼性の向上をはかることになる。According to the method for manufacturing a semiconductor device (transistor) of the present invention, the central portion of the lead frame having the semiconductor chip mounting portion is a resin envelope, the resin layer is thick on the semiconductor chip mounting portion side, After the resin layer is thin on the mounting side of
When cutting the unnecessary lead frame projecting from the resin envelope, a cutting blade is used from the attachment side of the resin envelope to the radiator plate to the attachment side of the resin envelope to the radiator plate. Has a step of moving and cutting in the opposite direction, and with this configuration, the direction of the warp of the remaining lead cutting part can be changed, and when attached to the electronic device (heat sink), Occurrence of defective dielectric strength characteristics can be reduced. As a result, the reliability of the resin-encapsulated semiconductor device can be improved.
実施例の説明 以下本発明の一実施例について第２図ａ，ｂの工程順断
面図を参照しながら説明する。なお、第２図ａ，ｂの各
図は、第１図ａ，ｂのものとくらべてみると、樹脂封止
型半導体装置の構造では同じであるが、表裏反転させて
示している。第２図ａは、本発明の樹脂封止過程を経た
のちの状態を示す図である。まず半導体チップ１をリー
ドフレーム２上にダイボンディングし、同チップ１のベ
ース電極、エミッタ電極から、リードフレーム２の左右
にそれぞれアルミニウム細線６で結線する。次に、リー
ドフレーム２の央部、すなわち、チップ１及びアルミニ
ウム細線６の全部を覆うように樹脂外囲体３で封止を行
う。そして、第２図ｂのように、リードフレーム２の不
要となる側の切断工程に沿った切断方法において、切断
用刃物４の移動方向、すなわち、切断方向を封止樹脂面
からみて、電子機器（放熱板）の取り付け側、すなわ
ち、リードフレーム２の裏面側で樹脂外囲体３の薄層側
から、放熱板の取り付け側と反対の方向に切断する。Description of Embodiments One embodiment of the present invention will be described below with reference to the sectional views in order of steps of FIGS. 2A and 2B have the same structure as that of the resin-encapsulated semiconductor device as compared with those of FIGS. 1A and 1B, but the drawings are reversed. FIG. 2a is a diagram showing a state after undergoing the resin sealing process of the present invention. First, the semiconductor chip 1 is die-bonded onto the lead frame 2, and the base electrode and the emitter electrode of the chip 1 are connected to the left and right sides of the lead frame 2 by thin aluminum wires 6, respectively. Next, sealing is performed with the resin envelope 3 so as to cover the central portion of the lead frame 2, that is, the chip 1 and the entire aluminum thin wire 6. Then, as shown in FIG. 2B, in the cutting method along the cutting step on the unnecessary side of the lead frame 2, the moving direction of the cutting blade 4, that is, the cutting direction is viewed from the sealing resin surface, and the electronic device is cut. The (radiating plate) mounting side, that is, the back surface side of the lead frame 2 is cut from the thin layer side of the resin envelope 3 in the direction opposite to the mounting side of the cooling plate.
以上のように本実施例によれば、第２図ｂに示す様に切
断時の切断用刃物４の移動方向にしたがい、リード切断
部５のそりの方向を樹脂外囲体３の裏面側から遠くなる
向きにすることができ、第２図ｃのように電子機器（放
熱板）に取り付けた際に、その切断面が電子機器面から
十分に離れ、絶縁耐圧特性の不良発生の度合を減少させ
ることができ、信頼性の向上をはかることができる。第
３図は電子機器に取り付けた際の本発明実施例による樹
脂封止型半導体装置の耐圧特性をヒストグラム状に示し
た分布図で、従来例と対比して示す。As described above, according to the present embodiment, as shown in FIG. 2B, according to the moving direction of the cutting blade 4 at the time of cutting, the warp direction of the lead cutting portion 5 is changed from the rear surface side of the resin envelope body 3. It is possible to make the direction far away, and when attached to an electronic device (heat sink) as shown in FIG. 2c, the cut surface is sufficiently separated from the electronic device surface, and the degree of occurrence of defective dielectric strength characteristics is reduced. Therefore, the reliability can be improved. FIG. 3 is a distribution chart showing a withstand voltage characteristic of the resin-encapsulated semiconductor device according to the embodiment of the present invention when attached to an electronic device in a histogram form, in comparison with a conventional example.
発明の効果 以上のように、本発明は、裏面側の樹脂外囲体を層薄く
形成して、この面を電子機器（放熱板）に装着する構造
の樹脂封止半導体装置の製造過程で、樹脂封止工程後に
不要となるリードフレームの切断除去の際に、切断用刃
物の移動方向を、電子機器（放熱板）の取り付け側か
ら、電子機器（放熱板）の取り付け側と反対の方向に切
断することにより、樹脂外囲体の側面に残存する同切断
部の先端のそりの方向を電子機器への装着面から遠ざけ
る向きにすることで、電子機器（放熱板）に取り付けた
時の絶縁耐圧特性の不良発生度合を減少することがで
き、その実用的効果を大なるものがある。As described above, according to the present invention, in the process of manufacturing a resin-encapsulated semiconductor device having a structure in which the resin envelope on the back surface side is formed into a thin layer, and this surface is attached to an electronic device (heat sink), When cutting and removing the lead frame that is no longer needed after the resin sealing process, move the cutting blade from the mounting side of the electronic device (heat sink) to the opposite side of the mounting side of the electronic device (heat sink). Insulation when attached to an electronic device (heat sink) by cutting so that the direction of the warp of the tip of the same cutting portion remaining on the side surface of the resin envelope becomes away from the mounting surface of the electronic device. It is possible to reduce the degree of occurrence of defects in withstand voltage characteristics, and to bring about great practical effects.
第１図ａ，ｂは、従来の半導体封止装置の切断工程を示
す工程順断面図、第１図ｃは、従来の樹脂封止型半導体
装置を電子機器（放熱板）に取り付けた状態の断面図、
第２図ａ，ｂは、本発明の実施例による切断工程を示す
図、第２図ｃは、本発明実施例で得た樹脂封止型半導体
装置を電子機器（放熱板）に取り付けた図、第３図は、
従来型と本発明の実施により得た樹脂封止型半導体装置
の絶縁耐圧特性図である。 １……チップ、２……リードフレーム、３……樹脂、４
……リードフレーム切断刃、５……リード切断部、６…
…アルミワイヤ。1A and 1B are cross-sectional views in order of the steps showing a cutting process of a conventional semiconductor encapsulation device, and FIG. 1C shows a state in which a conventional resin-encapsulated semiconductor device is attached to an electronic device (heat sink). Cross section,
2A and 2B are views showing a cutting step according to the embodiment of the present invention, and FIG. 2C is a view showing the resin-sealed semiconductor device obtained in the embodiment of the present invention attached to an electronic device (heat sink). , Fig. 3 shows
FIG. 3 is a withstand voltage characteristic diagram of a conventional type and a resin-sealed semiconductor device obtained by carrying out the present invention. 1 ... Chip, 2 ... Lead frame, 3 ... Resin, 4
...... Lead frame cutting blade, 5 ...... Lead cutting part, 6 ...
… Aluminum wire.
フロントページの続き (56)参考文献 特開 昭57−147260（ＪＰ，Ａ) 実開 昭51−75554（ＪＰ，Ｕ) 実開 昭57−140739（ＪＰ，Ｕ)Continuation of the front page (56) Reference JP-A-57-147260 (JP, A) Actually open 51-75554 (JP, U) Actually open 57-140739 (JP, U)
Claims (1)
ムの央部を樹脂外囲体で、前記半導体チップ載置部側に
樹脂層厚く、放熱板への取り付け側に樹脂層薄く、封止
成形したのち、前記樹脂外囲体から突出する不要の前記
リードフレームを切断する際に、切断用刃物を、前記樹
脂外囲体の放熱板への取り付け側から前記樹脂外囲体の
放熱板への取り付け側とは反対側の方向に、移動させて
切断することを特徴とする半導体装置の製造方法。1. A central portion of a lead frame having a semiconductor chip mounting portion is a resin envelope, a resin layer is thick on the semiconductor chip mounting portion side, and a resin layer is thin on a mounting side to a heat dissipation plate, and sealing molding is performed. After that, when cutting the unnecessary lead frame projecting from the resin envelope, a cutting blade is attached from the side where the resin envelope is attached to the heat sink to the heat sink of the resin envelope. A method of manufacturing a semiconductor device, which comprises moving and cutting in a direction opposite to a mounting side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17185784A JPH0666398B2 (en) | 1984-08-17 | 1984-08-17 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17185784A JPH0666398B2 (en) | 1984-08-17 | 1984-08-17 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6149449A JPS6149449A (en) | 1986-03-11 |
| JPH0666398B2 true JPH0666398B2 (en) | 1994-08-24 |
Family
ID=15931066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17185784A Expired - Lifetime JPH0666398B2 (en) | 1984-08-17 | 1984-08-17 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0666398B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0718867B2 (en) * | 1987-05-15 | 1995-03-06 | 財団法人電力中央研究所 | Rock shear tester |
| FR2683945B1 (en) * | 1991-11-18 | 1998-01-16 | Sextant Avionique | METHOD FOR FORMING AND CUTTING LEGS OF AN ELECTRONIC PACKAGE AND DEVICE CARRYING OUT THE METHOD. |
-
1984
- 1984-08-17 JP JP17185784A patent/JPH0666398B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6149449A (en) | 1986-03-11 |
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