JPS6146975B2 - - Google Patents
Info
- Publication number
- JPS6146975B2 JPS6146975B2 JP54003250A JP325079A JPS6146975B2 JP S6146975 B2 JPS6146975 B2 JP S6146975B2 JP 54003250 A JP54003250 A JP 54003250A JP 325079 A JP325079 A JP 325079A JP S6146975 B2 JPS6146975 B2 JP S6146975B2
- Authority
- JP
- Japan
- Prior art keywords
- metal
- semiconductor
- wall member
- integrated circuit
- external leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP325079A JPS5595343A (en) | 1979-01-11 | 1979-01-11 | Container for semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP325079A JPS5595343A (en) | 1979-01-11 | 1979-01-11 | Container for semiconductor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5595343A JPS5595343A (en) | 1980-07-19 |
JPS6146975B2 true JPS6146975B2 (enrdf_load_stackoverflow) | 1986-10-16 |
Family
ID=11552207
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP325079A Granted JPS5595343A (en) | 1979-01-11 | 1979-01-11 | Container for semiconductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5595343A (enrdf_load_stackoverflow) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4953001A (en) * | 1985-09-27 | 1990-08-28 | Raytheon Company | Semiconductor device package and packaging method |
JPS62293624A (ja) * | 1986-06-13 | 1987-12-21 | Nippon Telegr & Teleph Corp <Ntt> | Icパツケ−ジ |
JPH0793392B2 (ja) * | 1986-10-25 | 1995-10-09 | 新光電気工業株式会社 | 超高周波素子用パツケ−ジ |
JPH0524399U (ja) * | 1991-09-02 | 1993-03-30 | コクヨ株式会社 | 額 縁 |
JPH0846073A (ja) * | 1994-07-28 | 1996-02-16 | Mitsubishi Electric Corp | 半導体装置 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5587461A (en) * | 1978-12-26 | 1980-07-02 | Fujitsu Ltd | Microwave integrated circuit package |
-
1979
- 1979-01-11 JP JP325079A patent/JPS5595343A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5595343A (en) | 1980-07-19 |
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