JPS6146962A - Controller of electronic copying machine - Google Patents

Abstract

PURPOSE:To reduce length and the number of wirings and make extension of input/output devices easy to improve reliability and maintainability by decoding transmission data by a decoding circuit in a branch to drive and control a load and transmitting detection information. CONSTITUTION:An address/data bus 38 which has one end connected to a central control unit 30 such as a microcomputer or the like is wired while passing near individual input/output devices (loads 10 and detecting sensors 11) arranged dispersedly in an electronic copying machine. Data is transmitted and received between devices 10 and 11 and the unit 30 in time division, and data transmitted from the unit 30 is decoded by circuits 18, and input interfaces 19 to which plural sensors 11 are connected are controlled by decoded outputs to receive detection signals from many sensors 11.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Application) The present invention relates to an electronic copying machine control device, and in particular, it is possible to communicate information between a plurality of input/output devices and a control unit using a small number of signal wires. The present invention relates to an electronic copying machine control device configured to send and receive information.

(Prior art) Various types of equipment, including electronic copying machines, have become more diverse,
As performance increases, various electrical and electronic components are increasingly used as input/output devices.

An example of this is schematically shown in Figure M2.

Central control units 30 are quite commonly known.

For example, a CPLJ 31 that executes various calculations for control, a ROM 32 that mainly stores control programs, a RAM 33 that mainly stores data and intermediate calculation results, and a controller that transmits information between the three. , and an input/output interface 36 connected to the common bus 34.

The input/output interface 36 also includes various output devices such as clutches, renoids, and relays, or loads 1.
0. Various detection sensors or input devices 11 such as microswitches are also connected.

Needless to say, the load 10 and the detection sensor 11 are installed in an electronic copying machine which is a controlled device.

(Problems to be Solved by the Invention) As can be seen from FIG. 2, the load 10 and the detection sensor 11 are each connected to the input/output interface 36 by a single wire pair. Furthermore, as the controlled devices become more diverse and have higher performance, the number of loads 10 and detection sensors 11 will also increase.

Therefore, the information detected by these parts (for example, data detected by microswitches and various sensors) can be transmitted to a control unit such as a microcomputer, or vice versa, the control signals obtained from the control unit can be output in various ways. Naturally, the number of wires and the length of wiring for transmitting data to the equipment will also increase.

As a result, there have been problems in that not only the cost of the entire device is increased, but also the reliability and maintainability of the entire device are lowered.

The present invention has been made to solve the above-mentioned problems.

(Means and Actions for Solving the Problems) In order to solve the above problems, the present invention distributes an address/data bus, one end of which is connected to a central control unit such as a microcomputer, within an electronic copying machine. The wiring should be routed so that it passes near each input/output device, and data and signals sent and received from the control section should be executed in a time-sharing manner between each input/output device and the control section. The present invention is capable of receiving and receiving detection signals from a large number of detection sensors by decoding the data and using the decoded output to control an input interface to which a plurality of detection sensors are connected.

(Example) The present invention will be described in detail below with reference to the drawings.

FIG. 3 is a schematic block diagram of one embodiment of the present invention. In addition, in the figure, the same reference numerals as in FIG. 2 refer to the same or equivalent parts.

One end of the address/data bus 38 is connected to a common bus 34 within the central controller 30 via a bidirectional bus buffer 37. The address/data bus 38 is wired so as to pass near each input/output Ia device (eg, load 10, detection sensor 11, etc.) distributed within the electronic copying machine.

From the address/data bus 38, branches B1. B2...B (n-1>
, B (n) are branched, and the detection sensor 11, load 10, etc. are connected to the input/output interface 19.

In FIG. 3, the address/data bus 38 can be composed of, for example, 12 signal lines, and their functions are designated as follows.

Signal line No., O~7...Transmission of branch selection address, load on/off control data, and sensor detection information Signal line No., 8.9...Mode instruction (or designation)
Transmission signal line No. 10 for signals a and b...Transmission signal line No. 11 for strobe signal C...Transmission of reset signal FIG. 1 shows details of the decoding circuit 18 and input/output interface 19 in FIG. It is a block diagram.

The bus buffer driver 20 transfers data transmitted on the address/data bus 38 to an address detection circuit 23.
, i10 program memory 26, and output latch 27
to be transmitted.

The interface 21 receives a mode instruction signal a.

b and strobe signal C to the decoder 24, and the interface 22 also supplies a reset signal to the control circuit 25 and the i10 program memory 26.

The address detection circuit 23 includes the bus buffer driver 20
It is determined whether the address transmitted onto the bus 38W via the address matches the own address 23A generated by the own address generator 29, and if they match, outputs an address match signal 23B. .

The decoder 24 determines the operating mode of the input/output device or terminal based on the mode instruction signals a and b, and outputs a control signal 24A (read data transmission).

24B (write data read) and 24C (program write) are generated.

Control circuit 25 controls the operation of decoder 24 when address match signal 23B is generated.

110 program memory 26 receives program write signal 2
Under the control of 4G, the program transmitted from bus 38W is stored.

Output latch 27 stores data transmitted from bus 38W under the control of self-load data read signal 24B.

Buffer 28 transfers the data of output latch 27 via output interface 39, if necessary, according to a program stored in i10 program memory 26 (determining whether the terminal in question is an input or an output). and outputs to the load 10, input interface selection decoder 42, etc.

The output interface 39 sends data to the load 10, and also sends data to the input terminals a, b of the input interface selection decoder 42, input interfaces 41a, 4.
1b, ...... is sent. This data transmission is performed under the control of write data read signal 24B.

Input interface selection decoder 42 operates when enabled by read data exit signal 24A and sends signals to its output terminals A, B, C and D according to the truth table of Table 1.

Table 1 Up to eight detection sensors can be connected to each of the input interfaces 41a, 41b, . . . , and the input interfaces 41a, 41b.

. . . when any one of the eight detection sensors is turned on, detection signals are read out from the eight detection sensors in parallel.

This sense signal is sent onto address/data bus 38 via bus 38R.

Next, the operation of the embodiment of the present invention will be described with reference to the timing charts of FIGS. 3, 1, and 4.

(1) When power is turned on, a reset signal is sent from central controller 30 onto address/data bus 38. As a result, the control circuit 25 and i10 program memory 26 shown in FIG. 1 are all initialized.

Note that initializing the i10 program memory 26 means putting the buffer 28 in a high impedance state, that is, in an input mode.

(2) During the period when mode instruction signals a and b are both O and strobe signal C is 1, exclusive OR of data on signal lines No., O to 7 of address/data bus 38 and self address 23A is executed by the address detection circuit 23.

If they match, then the address/data bus 38
The data transmitted above can be determined to be addressed to the user. Therefore, address match signal 23B is generated and held within control circuit 25 for the required period of time.

Note that signal lines No. 0 to 7 of the address/data bus 38
When the above data and the self address 23A do not match, the control circuit 25 does not perform any operation.

(3) If the mode instruction signal is a - Q, b = 1, it is program mode and the address/data bus 38
Program data that determines the input/output mode of this terminal is transmitted above.

Therefore, in this state, if there is an address match signal 23B in the determination in (2) above, the decoder 24 sets the program write signal 24G to 1 while the strobe signal C is 1.

As a result, the data (program) on the bus 38W is
10 is stored in the program memory 26, and the input/output mode setting of the buffer 128 is performed.

(4) In the next write mode (FIG. 4), the same determination as in (2J) is first made to determine whether the data on the address/data bus 38 is addressed to itself.

(5) If the mode instruction signal a-1,b=O, it is the write mode, and write data is being transmitted on the address/data bus 38.

Therefore, when the address match signal 23B is present and the strobe signal C is 1, the decoder 24 sets the write data read signal 24B to 1.

As a result, the data on bus 38W is stored in output latch 27, and the data is further transferred to buffer 28.

At this time, in the process of (3) above, the program:
If the terminal is directed to output mode, the buffer 72
8 and to the output end via the output interface 39.
i 11 or °“0” is output. In this manner, load 10 becomes controlled based on data on bus 38W.

(■ Even in the readout mode shown in Figure 4, first the above (2)
A similar determination is made to determine whether the data on the address/data bus 38 is addressed to itself.

(If mode instruction signals a and b are both 1, the read mode is selected.) When the address match signal 23B is present and the strobe signal C is 1, the decoder 24 sets the read data sending signal 24A to 1.

As a result, the input interface selection decoder 42
is enabled, and the input ink-face selection decoder 42 outputs a signal according to Table 1 from the output terminal based on the data obtained during the previous store-in mode. When an input interface is turned on by the signal, a detection signal is read out from the detection sensor connected to the input interface, and the detection signal is transferred to the bus 38R.
and is transmitted via bus 38 to central control unit 30 .

FIG. 5 is a schematic block diagram showing an example of the input interface selection decoder 42. As shown in FIG.

It is obvious that this circuit operates in accordance with the truth table shown in Table 1 without further explanation.

In the above embodiment, two bits (out Q, out l) of the input/output interface 19 are used for controlling the input interface selection decoder 42, but the present invention is not limited to this, and the input/output interface All 19 8 bits can be used for controlling the input interface selection decoder 42. In this case, a maximum of 8×28 detection sensors can be connected.

(Effects) As is clear from the above description, according to the present invention, one address/data bus 38 is provided within the controlled electronic copying machine, and the necessary number of branches are arranged at appropriate locations near the input/output devices. , a decoding circuit in this branch decodes the data transmitted from the central control unit on the address/data bus 38 in a time-division manner, and depending on the result, the address included in the data is matched with its own. When the load 10 is connected to each branch, the load 10 connected to each branch is driven and controlled, or the detection information from the detection sensor 11 is sent to the central control unit 30, which reduces the number of wires compared to the conventional configuration. and the length can be reduced.

Moreover, even if input/output devices are added, there is no need to increase the number of wires, so by preparing extra branches or providing connections in advance, you can reduce the need to increase the number of input/output devices. It can be done easily.

In general, according to the invention, the input/output interface 19
If the input bus is 8 bits, a maximum of 8 x 28 detection sensors can be connected, which is very effective in controlling equipment with a large number of detection sensors.

[Brief explanation of drawings]

FIG. 1 is a detailed block diagram of the decoding circuit and input/output interface in FIG. 3, FIG. 2 is a block diagram showing a schematic configuration of a conventional electronic copying machine control device, and FIG. 3 is a schematic diagram of an embodiment of the present invention. The block diagram, Fig. 4 is a timing chart for explaining the operation of Fig. 1, and Fig. 5 is a timing chart for explaining the operation of Fig. 1.
FIG. 3 is a detailed block diagram of the input interface selection decoder shown in the figure. DESCRIPTION OF SYMBOLS 10... Load, 11... Detection sensor, 18... Decode circuit, 19... Input/output interface, 20
...Bus buffer driver, 21.22...Interface, 23...Address detection circuit, 24-.
...Decoder, 25...Control circuit, 26...110
Program memory, 27... Output latch, 28...
Buffer, 29...Self address generator, 30...
Central control device, 31...CPU, 32...ROM,
33...RAM, 37...bidirectional bus buffer, 3
9... Output interface, 41a to 41d...
Input interface, 42... Input interface 1 Decoder for selecting the device Patent attorney Michito Hiraki and 1 other person Figure 2 Figure 5

Claims (1)

[Claims] (1) A central control unit consisting of a CPU, ROM, RAM, and a common bus for exchanging information between these units; one end of the central control unit is connected to the common bus via a bus buffer; an extended address/data bus, a plurality of branches located near input/output devices within the controlled electronic copying machine and connected to the address/data bus, and means for connecting the input/output devices to the branches; and each branch takes in the information being transmitted on the address/data bus, determines whether it is addressed to itself, and only if it is addressed to itself. , an electronic copying machine control device configured to enable information exchange between an input/output device connected thereto and a central control device, wherein means for connecting the input/output device to the branch is an output device. an interface, an input interface selection decoder that decodes part or all of the output of the output interface, and a bus that is selected by the output of the input interface selection decoder and, when selected, sends the detection signals of the plurality of detection sensors to the bus. What is claimed is: 1. An electronic copying machine control device comprising at least a plurality of input interfaces for leading to an electronic copying machine.