JPS6142411B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor integrated circuit device, and more particularly to a method for forming a group of impurity regions in which an impurity diffusion process is repeated.

Conventionally, a group of impurity regions in the same semiconductor substrate in a semiconductor integrated circuit device is created by first selectively opening a window in an oxide film formed on the surface of the semiconductor substrate and diffusing impurities through the window, regardless of the impurity diffusion method. After forming the impurity region, the surface of the semiconductor substrate is oxidized again to form an oxide film on the impurity region, and thereafter, such steps are sequentially repeated. At that time, the step created by the difference in the thickness of the oxide film on the impurity region formed first and the thickness of the other oxide film becomes the eye of the photo mask for subsequently forming the impurity region. Used in combination. Even when forming impurity regions by ion implantation, it is known that a photoresist film is sufficient as a mask for adding impurities, but the reason why an oxide film is used is because of the photoresist film. When a resist is used, there is no step difference in the photoresist film at the boundary between the first formed impurity region and other regions, making it impossible to align the photomask when subsequently forming the impurity region. It is from. However, when heat treatment is performed to form an oxide film, crystal defects such as stacking irregularities may occur in the semiconductor substrate due to stress between the oxide film and the surface of the semiconductor substrate, and heavy metals such as copper or iron released from the oxidation equipment may occur. Since the addition of oxide deteriorates electrical characteristics such as pn junction breakdown voltage, and the degree of deterioration depends on the number of heat treatments, it has been desired to find a way to reduce the number of times an oxide film is formed.

An object of the present invention is to reduce the number of oxide film formations by first etching the surface of the semiconductor substrate to which impurities are to be added, thereby making it possible to carry out the ion implantation method using the photoresist as a mask. It is an object of the present invention to provide a method for manufacturing a semiconductor integrated circuit device that can be used.

The present invention first coats and bakes a photoresist on a semiconductor substrate, then selectively removes the photoresist on the surface of the semiconductor substrate to which impurities are added, and then etches the surface of the semiconductor substrate. After that, impurities are added and finally photo
The resist is removed and an oxide film is formed over the entire surface of the semiconductor substrate.

According to the present invention, since the surface of the impurity region that is first formed in the semiconductor substrate is lower than other surfaces, when an oxide film is formed, oxidation occurs between the surface of the impurity region and the other substrate surface. A step appears on the membrane. Therefore, since this step makes it possible to align the photo mask when forming impurity regions later, the number of oxide film formations is reduced by one step compared to the conventional method, and the electrical characteristics are improved accordingly. .

Next, a description will be given with reference to the drawings.

FIGS. a to f are diagrams showing an embodiment in which the present invention is implemented in a p-channel MOS type semiconductor integrated circuit device.

First, after coating and baking a photoresist on the n-type silicon substrate 1 (Figure a), select the photoresist 2 on the regions 4 and 4' that will be the channel stopper in the future as the first impurity region to be formed. and then open the diffusion windows 3, 3' (Figure b). Then, the regions 4, 4' which will become the channel stoppers are etched (FIG. c). At this time, the etching depth is such that when the photoresist is removed later and an oxide film is formed on the silicon substrate 1, a clear step is formed in the oxide film at the channel stopper regions 4, 4'. 500 to 1000 Å, and etching is done by plasma etching using CF ₄ + O ₂ gas at a vacuum degree of 0.2 to 100 Å.
Run at 0.3 Torr and 100 to 200 W for 1 to 5 minutes.

Next, phosphorus ions 5,5'
is implanted at an acceleration voltage of 50 to 100 KeV at a density of about 10 ¹² /cm ² , but the phosphorus ions do not reach the semiconductor substrate under the photoresist (Figure d). Next, the photoresist 2 is removed using a plasma removal method or a phenol-based remover, and then diffused in an oxidizing atmosphere such as dry oxygen or steam at 1000 to 1200°C.
When the oxidation process is performed, phosphorus ions are diffused to form channel stoppers 6, 6', and an oxide film 7 with steps is formed on the surface of the n-type silicon substrate 1 (FIG. e).

Finally, after going through a normal masking process using the steps of the silicon oxide film 7 for alignment, boron is added into the n-type silicon substrate 1 to form source and drain regions 8 and 9, each metal wiring 10 ,1
1 and 12 to complete the process (Figure f).

As described above, according to the present invention, since the photoresist is used as a mask only when adding impurities to the impurity region that is formed first, the number of times of oxide film formation is reduced by one compared to the conventional method, and the number of times of oxide film formation is reduced by one, and the number of times of oxide film formation is reduced by one compared to the conventional method. The occurrence of crystal defects and the addition of heavy metals from the oxidizer are reduced, and the electrical characteristics are improved. Note that the above describes the present invention as a P channel.
Although one embodiment has been described in which the present invention is applied to a MOS type semiconductor integrated circuit device, it is also possible to apply the present invention to a bipolar type semiconductor integrated circuit device in which impurity regions are formed by performing impurity diffusion multiple times. Of course.

[Brief explanation of the drawing]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. a to f are diagrams showing one embodiment of the present invention in a P-channel MOS type semiconductor integrated circuit device. 1... N-type silicon substrate, 2... Photoresist film, 3, 3'... Diffusion window, 4, 4'... Region to be channel stopper, 5, 5'... Phosphorus ion, 6, 6 '... Channel stopper, 7... Oxide film, 8... Source region, 9... Drain region,
10, 11, 12...metal wiring.

Claims (1)

[Claims] 1. A step of forming only a photoresist film directly on the entire surface of a semiconductor substrate having a flat main surface into which no impurities have been introduced, in direct contact therewith, a step of patterning the photoresist film, and a step of patterning the photoresist film formed thereby. a step of selectively etching away the surface of the substrate using the film pattern as a mask to form a step; a step of introducing impurities into the substrate using the photoresist film pattern as a mask; and a step of forming an oxide film with steps on the surface of the substrate by performing necessary high-temperature treatment, and the step is characterized in that the step on the surface of the oxide film is used for alignment of a photomask in a later step. A method for manufacturing a semiconductor integrated circuit device.