JPS574124A - Manufacture of germanium semiconductor device - Google Patents

Manufacture of germanium semiconductor device

Info

Publication number
JPS574124A
JPS574124A JP7819280A JP7819280A JPS574124A JP S574124 A JPS574124 A JP S574124A JP 7819280 A JP7819280 A JP 7819280A JP 7819280 A JP7819280 A JP 7819280A JP S574124 A JPS574124 A JP S574124A
Authority
JP
Japan
Prior art keywords
film
stepped section
aperture
groove
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7819280A
Other languages
Japanese (ja)
Inventor
Shuzo Kagawa
Katsuji Honma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7819280A priority Critical patent/JPS574124A/en
Publication of JPS574124A publication Critical patent/JPS574124A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Abstract

PURPOSE:To easily perform the accurate positioning of mask for the subject semiconductor device by a method wherein a stepped section or a groove is formed on the surface of a Ge substrate by performing a selective etching and the subsequent mask positioning is performed based on said stepped section or the groove. CONSTITUTION:A photoresist film 2 is coated on the surface of a P type Ge wafer 1 and is used as a mask, an aperture is provided using photolithography and a guard ring region 3 is formed inside the wafer 1 exposed on the aperture by diffusing an Sb. Then, the surface of the region 3 is removed by 1,000Angstrom or thereabouts by performing an etching, the stepped section or the groove is created and the film 2 is removed using a resist exfoliating solution. Subsequently, an SiO2 film 5 is generated on the whole surface and a stepped section is formed on a film 5 corresponding to the stepped section 4. Then, based on this stepped section, an aperture is provided on the film 5 using photolithography, an As is diffused, a light-receiving section 6 is provided, an aperture is formed on the SiO2 film 5 and an Al electrode 7 is installed at the light-receiving section 6.
JP7819280A 1980-06-10 1980-06-10 Manufacture of germanium semiconductor device Pending JPS574124A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7819280A JPS574124A (en) 1980-06-10 1980-06-10 Manufacture of germanium semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7819280A JPS574124A (en) 1980-06-10 1980-06-10 Manufacture of germanium semiconductor device

Publications (1)

Publication Number Publication Date
JPS574124A true JPS574124A (en) 1982-01-09

Family

ID=13655123

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7819280A Pending JPS574124A (en) 1980-06-10 1980-06-10 Manufacture of germanium semiconductor device

Country Status (1)

Country Link
JP (1) JPS574124A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208723A (en) * 1983-05-12 1984-11-27 Mitsubishi Electric Corp Mask alignment mark
US7834704B2 (en) 2005-08-30 2010-11-16 Panasonic Corporation Low-noise amplifier circuit and receiving system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4929986A (en) * 1972-07-19 1974-03-16
JPS50161169A (en) * 1974-06-17 1975-12-26
JPS52125276A (en) * 1976-04-14 1977-10-20 Nec Corp Preparation of semiconductor integrated circuit device
JPS5459873A (en) * 1978-10-02 1979-05-14 Hitachi Ltd Production of semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4929986A (en) * 1972-07-19 1974-03-16
JPS50161169A (en) * 1974-06-17 1975-12-26
JPS52125276A (en) * 1976-04-14 1977-10-20 Nec Corp Preparation of semiconductor integrated circuit device
JPS5459873A (en) * 1978-10-02 1979-05-14 Hitachi Ltd Production of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208723A (en) * 1983-05-12 1984-11-27 Mitsubishi Electric Corp Mask alignment mark
US7834704B2 (en) 2005-08-30 2010-11-16 Panasonic Corporation Low-noise amplifier circuit and receiving system

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