JPS59103357A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain an element forming region without lattice defects by making the surface of SiO2 include N2 or subjected to gas plasma including N2 or N to form an oxidation-proof mask by which an Si substrate is selectively oxidized. CONSTITUTION:An SiO2 film 202 is formed on a P type Si substrate 201 and an SiO2 layer 203 including N is formed by implanting N ion in said SiO2 film 202. After patterning a P<+> layer 204 is formed by implanting B ion in an exposed part of the substrate 201. A field oxidized film 205 is formed by wet oxidation and a channel stopper 206 is formed out of the layer 204. The film 202 is removed and a gate oxidized film 207 and a polysilicon gate electrode 208 are formed after which As ion is implanted to form a source 209 and a drain 210 and electrodes 211 and 212 and a protective film 213 are formed. In this constitution, a field insulating film is selectively formed so that undesired lattice defects are not produced in the Si under a mask, thereby a semiconductor device of good quality can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming a field insulating film of a semiconductor device formed by a planar method.

Conventionally, a method using thick silicon dioxide as a field insulating film for a planar semiconductor device using a silicon semiconductor is well known. A thermal oxidation method is commonly used as a manufacturing method for forming silicon dioxide, and a method using, for example, silicon nitride as an oxidation-resistant mask for selective oxidation is well known.

However, while this silicon nitride film has properties as an excellent oxidation-resistant mask against thermal oxidation, if it is directly attached to a silicon surface and heated to a high temperature of, for example, around 1000°C, the thermal expansion coefficient of silicon and silicon nitride will change. Since the stress is different, the strain caused by the stress induces lattice defects in the silicon single crystal substrate wafer in the mask portion. For example, using a silicon nitride film with a thickness of about 200 OA,
A pattern is formed on it, selectively etched to form an oxidation-resistant mask, and thermally oxidized in saturated steam at 1000°C.
In the process of forming silicon dioxide with a thickness of about 1 micron in the non-masked area, a silicon wafer with a diameter of 5 inches will warp by an order of magnitude of several microns. Such a force is applied as stress between the silicon and silicon nitride in the mask portion, resulting in lattice defects in the silicon semiconductor in the mask portion. These lattice defects can cause leakage current in large-capacity random access memory devices, resulting in a significantly shortened memory retention time, and can also cause problems in high-speed integrated circuits, high-frequency integrated circuits, and acoustic integrated circuits. This was a cause of deterioration of the noise characteristics of the device. Also, i image' by C0D (charge transfer device)
For f-type devices, such defects also cause a total drop in image quality as so-called white scratches on the screen.

An object of the present invention is to eliminate such problems and to provide a technique for constructing a high-quality semiconductor device without unnecessary lattice defects in the device portion.

The present invention provides a method for manufacturing a silicon semiconductor device using a planar method, which includes a step of forming a boron dioxide film entirely on a silicon semiconductor, a step of including nitrogen near the surface of the silicon dioxide film,
This method of manufacturing a semiconductor device is characterized by comprising the step of selectively oxidizing all of the line semiconductors using the nitrogen-containing silicon dioxide film as an oxidation-resistant mask.

The present invention also provides a method for manufacturing a silicon semiconductor device using a planar method, which includes a step of forming a silicon dioxide film on a silicon semiconductor, and exposing the upper surface of the silicon dioxide film to high-temperature ammonia gas or ammonia gas plasma. This is a method for manufacturing a semiconductor device, comprising a step of selectively oxidizing the silicon semiconductor using the ammonia-treated silicon dioxide as an oxidation-resistant mask.

Furthermore, the present invention provides a method for manufacturing a silicon semiconductor device using a planar method, including a step of completely forming a boron dioxide film on a silicon semiconductor, a step of completely implanting nitrogen ions into the silicon dioxide film, and a step of completely implanting the nitrogen ions into the silicon dioxide film. This method of manufacturing a semiconductor device is characterized in that it includes a step of selectively oxidizing the silicon semiconductor using a boron dioxide film as a total oxidation-resistant mask. The present invention also provides a method for manufacturing a silicon semiconductor device using a planar method, which includes a step of forming a silicon dioxide film on a silicon semiconductor, and exposing the surface of the silicon dioxide film to plasma of nitrogen or a gas containing nitrogen. This method of manufacturing a semiconductor device is characterized by comprising a step of selectively oxidizing the silicon semiconductor using the nitrogen-treated silicon dioxide film as an oxidation-resistant mask.

The principle of the present invention is that by impregnating the surface of silicon dioxide with nitrogen or exposing it to nitrogen or gas plasma containing nitrogen, it becomes an oxidation-resistant mask, and silicon dioxide that is selectively formed on silicon with the oxidation-resistant mask It is based on the novel discovery that semiconductor devices can be manufactured using films as constituent elements.

Furthermore, the present invention has been made based on the discovery that by substantially matching the thermal expansion coefficients of the semiconductor and the mask material in contact with it, the leakage current characteristics and noise characteristics of the element formed in the semiconductor in the V% mass region are significantly improved. It is based on

According to the present invention, although a field insulating film is formed in which dilimited silicon is selectively buried in silicon, the characteristics of the semiconductor element that is subsequently formed in the silicon in the mask portion are low leakage and noise characteristics. Since this is good, the storage retention time of the high-density random access memory can be extended.

According to the present invention, even though an insulating film is selectively formed on a semiconductor, it is possible to improve the electrical characteristics of an element subsequently formed on the semiconductor portion of the mask portion.

Next, a non-inventive embodiment will be described with reference to all the drawings.

First, for comparison, a conventional manufacturing method will be explained with reference to FIG. FIG. 1 shows cross-sectional views of each process. First, as shown in FIG. 1N, a P-type silicon wafer 101 of, for example, 50 Ω·cm is prepared. Next, as shown in FIG. 1B, a silicon nitride film 102yk having a thickness of about 200 OA is formed on this 50 Ω·cm P-type silicon film 1101 by a chemical reaction of silane and ammonia at about 700°. Thereafter, the silicon nitride film 102' is selectively removed as shown in FIG. After that, the P-type silicon wafer 101 was placed in saturated steam at 1100℃ for about 8 hours.
A silicon dioxide film 104 with a thickness of 0.00 l is formed. At this time, the surface of the silicon nitride film 102 is also oxidized, but the oxidation rate is significantly slower than that of silicon, so the silicon nitride film 102 is sufficiently oxidized. This state is shown in Figure 1.At this time, the P+ layer 103 becomes deeper than C in Figure 1 due to thermal diffusion.This silicon dioxide layer 104 is usually formed as shown in Figure 1. Since it takes about 3 hours at a high temperature of ℃ or higher, the silicon wafer 101 and the silicon nitride film 1 are
02, stress is applied due to the difference in coefficient of thermal expansion, which adds strain to the crystal lattice, leading to the formation of many crystal defects in the most important parts of semiconductor devices in the future. The silicon nitride film 102 is then removed as shown in FIG.
A film is formed to a thickness of about 200 OA by fully utilizing thermal decomposition of silane at 00° C., and then selectively removed to form the entire gate electrode. Thereafter, source and drain regions 107 and 108 are formed, and source and drain electrode wirings 109 and 108 are formed, respectively.
Figure 1F shows the state in which the protective coating 111 has been completely formed.

FIG. 2 is a cross-sectional view sequentially illustrating the steps of the present invention which completely solves the stress problem between the silicon wafer and the silicon nitride film as described above. That is, as shown in Fig. 2 N, P of 50Ω・cm
A silicon wafer 201 is prepared, and a silicon dioxide film 202 of about 500 OA is formed on the surface by a conventional method as shown in FIG. 2B.

Next, in FIG. 2B, this silicon dioxide film 202 is coated with
1015-1018 N+ ions accelerated to 5Qkev
/cm2 to completely form a silicon dioxide layer 203 containing nitrogen. Thereafter, the silicon dioxide layer 203, 202'! to be removed.

After that, 5Qke was applied to the non-masked part of the P-type silicon wafer 201.
IIB+ ions klo12/cm2 accelerated to V are injected, a layer that will become the channel stopper 206 is pre-deposited, and the P+ layer 204 is completely formed (Fig. 2C). The silicon dioxide film 203 containing nitrogen serves as an oxidation-resistant mask,
A field oxide film 205 with a thickness of about 1 μm can be formed (FIG. 2 IJ). In this oxidation process, the P+ layer 204 is expanded and penetrated deeply to become a channel stopper 206. Thereafter, as shown in FIG. 2E, a silicon dioxide layer 202 was used as a mask.
is removed, and the silicon dioxide film 20'l is again coated with a thickness such that the threshold voltage of the designed value can be obtained, for example, 90% in an oxygen atmosphere.
After forming polycrystalline silicon 208 at 0°C, thermal decomposition reaction of silane at 700°C? The polycrystalline silicon is selectively completely removed to form a gate electrode. Thereafter, as shown in FIG. 2F, for example, arsenic ions As"t" are accelerated to 150 keV and implanted to a concentration of 5 x 1 o 15 /Crn 2 to form the entire source region 209 and drain region 210. Further, the source region 209 and the drain region 210If (, respectively, the source electrode wiring 2
11 and the drain electrode wiring 212 are attached, and the protective coating 2 is attached.
A cross-sectional view of the silicon dioxide film attached as No. 13 is shown in Figure 2F.
becomes.

In the step shown in FIG. 2B, other methods may be used instead of simply fully implanting nitrogen ions.

For example, as the second embodiment, a method of exposing to normal temperature ammonia gas may be used. That is, Ito et al. published an article from page 2248 of the Chemical Society (T
,Ito,etal,J,Electroc-hem,
Soc, 127.2248 (1980)) [states that the surface is quantified when silicon dioxide is heat-treated in a high-temperature ammonia atmosphere. For example, the silicon dioxide film 2 in FIG. 2B
02e When exposed to ammonia gas at 1000℃ for 2 hours,
A layer 203 containing nitrogen can be formed.

In this case, it is difficult to selectively etch the nitrogen-containing silicon dioxide layer 203 using wet etching using a normal photoresist method as in the first embodiment, so a carbon fluoride dry etching method is suitable. There is.

Further, as a third embodiment, a method may be adopted in which the step shown in FIG. 2B is performed by exposing the device to nitrogen gas plasma.

For example, when the temperature of the substrate wafer 1 is set to 700° C., nitrogen gas plasma +S is generated under reduced pressure, and the treatment is performed for about 1 hour, a layer 203 containing nitrogen is formed on the silicon dioxide 202.

According to the method of the present invention, the silicon nitride film 201 is not attached with the silicon nitride film 102, and the source region 209, the drain region 210, the polycrystalline silicon 208 that becomes the gate electrode, and the sand dioxide film that becomes the gate insulating film thereunder. The portion of the silicon wafer 201 near point 207 has distortions and lattice defects as shown in FIG. It can be significantly reduced.

Therefore, the areal density memory element manufactured by the method of the present invention is characterized by a small leakage current transmitted through defects and a long memory retention time. Furthermore, the semiconductor device manufactured by the method of the present invention has excellent noise characteristics.

Although all of the above embodiments have been described in which silicon is used as the semiconductor, the present invention is not limited to such a case, and other semiconductors may be used.

[Brief explanation of the drawing]

1A to F are cross-sectional views for sequentially explaining the steps of a conventional manufacturing method shown for comparison, and FIGS. 2 to F are cross-sectional views for sequentially explaining the steps of the present invention. . In addition, in the figure, 101.201...P-type silicon unino, 102
......Silicon nitride film, 103.204...
PH1,104*202.105,207...
Silicon dioxide film, 106.208...Polycrystalline silicon film, 167.209...Source region, 108.
210...mark/drain region, 109,211...
...Source electrode wiring, 110°212...Drain electrode wiring, 111,213...Protective coating,
203... Silicon dioxide layer containing nitrogen. Conclusion Figure 1 Figure Z

Claims (4)

[Claims] (1) In a method for manufacturing a silicon semiconductor device using a planar method, a step of forming a silicon dioxide film on a silicon semiconductor;
Manufacturing a semiconductor device comprising: a step of impregnating nitrogen near the surface of the silicon dioxide film; and a step of selectively oxidizing the silicon semiconductor using the silicon dioxide film impregnated with nitrogen as an oxidation-resistant mask. Method. (2) A method for manufacturing a silicon semiconductor device using a planar method, which includes a step of forming a silicon dioxide film on a silicon semiconductor, and a step of exposing the upper surface of the silicon dioxide film to high-temperature ammonia gas or ammonia gas plasma. A method for manufacturing a semiconductor device, comprising the steps of: selectively oxidizing the entire silicon semiconductor using the ammonia-treated silicon dioxide as an oxidation-resistant mask. (3) In a method for manufacturing a silicon semiconductor device using a planar method, a step of forming a silicon dioxide film on a silicon semiconductor, a step of implanting nitrogen ions into the silicon dioxide film, and a step of implanting the silicon dioxide into which the nitrogen ions are implanted. A method for manufacturing a semiconductor device, comprising the step of selectively oxidizing the silicon semiconductor using a film as an oxidation-resistant mask. (4) A method for manufacturing a silicon semiconductor device using a planar method, which includes a step of completely forming a silicon dioxide film on a silicon semiconductor, and a step of exposing the surface of the silicon dioxide film to plasma of nitrogen or a gas containing nitrogen. A method for manufacturing a semiconductor device, comprising the steps of: selectively oxidizing the silicon semiconductor using the nitrogen-treated silicon dioxide film as an oxidation-resistant mask.