JPS6132798U

JPS6132798U - Inverter control circuit

Info

Publication number: JPS6132798U
Application number: JP11556884U
Authority: JP
Inventors: 博章濱本
Original assignee: 富士電機株式会社
Priority date: 1984-07-28
Filing date: 1984-07-28
Publication date: 1986-02-27

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は本考案の実施例を示す回路図であり、第２図は
第１図に示す回路の動作波形区、第３図は電動機が低速
のときの動作波形図で第４図は電動機が高速のときの動
作波形図である。２・・・・・・整流器、３・・・・・・トランジスタイ
ンバータ、４・・・・・・誘導電動機、１１・・・・・
・電源電圧検出器、１２・・・・・・停電検出コンパレ
ータ、１３・・・・・・信号絶縁器、１４・・・・・・
インバータ停止回路、２１・・・・・・端子電圧検出器
、２２・・・・・・波形整形手段としてのコンパレータ
、２３・・・・・・信号絶縁器、２４・・・・・・遅延
手段としてのタイマ、３１・・・・・・積分器、３２・
・・・・・サンプルアンドホールド回路、３３・・−ｉ
＋＋ｘ器、３４・・・・・・電圧ソフトスタート回路、
４０・・・・・・停電時論理回路、４１・・・・・・Ａ
ＮＤ素子、４２・・・・・・反転素子、４３・・・・・
・ＮＡＮＤ素子、４４・・曲プリップフロッグ素子。Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is an operating waveform section of the circuit shown in Fig. 1, Fig. 3 is an operating waveform diagram when the motor is at low speed, and Fig. 4 is a diagram of the operating waveforms of the circuit shown in Fig. 1. FIG. 4 is an operation waveform diagram when is high speed. 2... Rectifier, 3... Transistor inverter, 4... Induction motor, 11...
・Power supply voltage detector, 12...Power failure detection comparator, 13...Signal isolator, 14...
Inverter stop circuit, 21... terminal voltage detector, 22... comparator as waveform shaping means, 23... signal isolator, 24... delay means as a timer, 31...integrator, 32.
...Sample and hold circuit, 33...-i
++x device, 34... Voltage soft start circuit,
40...Logic circuit during power outage, 41...A
ND element, 42...Inversion element, 43...
・NAND element, 44... Song prep frog element.

Claims

[Scope of utility model registration request]

In an inverter that outputs variable voltage/variable frequency alternating current power to operate an induction motor at a desired speed, a logic H signal and a logic L signal are alternately generated each time the alternating voltage appearing at the induction motor terminal passes a zero point. a waveform shaping means for shaping the appearing rectangular wave; a delay means for delaying a logic H signal and a logic L signal of the input rectangular wave for a predetermined time; and when the output of the delay means becomes a logic H signal, an integrating operation is started. an integrating means zero-shifted by a logic L signal;
sample-and-hold means for inputting the integrating means output signal and holding the integrating means output signal when the delay means input signal becomes a logic L signal; dividing means for converting the output signal of the dividing means into an inverter voltage command signal of a predetermined rate of change; voltage soft start means for converting the output signal of the dividing means into an inverter voltage command signal of a predetermined rate of change; is input to the delay means, and operates to fix the delay means input to the logic L signal at the same time as the output of the delay means changes to the logic L signal at or after the power outage is lifted. An inverter control circuit characterized by: