JPS6082276U

JPS6082276U - Phase sequence detection device

Info

Publication number: JPS6082276U
Application number: JP17366783U
Authority: JP
Inventors: 山内　聡見
Original assignee: 三菱電機株式会社
Priority date: 1983-11-11
Filing date: 1983-11-11
Publication date: 1985-06-07
Also published as: JPS6326778Y2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は従来の相順検出回路を示す回路図、第２図は三
相交流波形図、第３図は１正相ヨの場合の相順検出信号
波形図、第４図は１反相ヨの場合の相順検出信号波形図
、第５図はこの考案の一実施例を示す回路図、第６図は
この考案にがかる１正相ヨと１反相ヨの場合の相順検出
信号波形図である。図において、φ１．φ２．φ３は三相交流、１は三相交
流電源、２は負荷、３は電源線、５は光結合素子、１０
はＤフリップフロップ、１２は相順検出出力、２０はエ
クスクル−シブ・オアゲート、２２はスイッチである。なお、図中同一符号は同一または相当部分を示す。十−１−一一一丁［Figure 1 is a circuit diagram showing a conventional phase sequence detection circuit, Figure 2 is a three-phase AC waveform diagram, Figure 3 is a phase sequence detection signal waveform diagram for 1 positive phase, and Figure 4 is 1 negative phase. Fig. 5 is a circuit diagram showing an embodiment of this invention, and Fig. 6 is a phase sequence detection signal waveform diagram in the case of 1 positive phase and 1 reverse phase y according to this invention. FIG. In the figure, φ1. φ2. φ3 is three-phase AC, 1 is three-phase AC power supply, 2 is load, 3 is power line, 5 is optical coupling element, 10
1 is a D flip-flop, 12 is a phase sequence detection output, 20 is an exclusive OR gate, and 22 is a switch. Note that the same reference numerals in the figures indicate the same or corresponding parts. 10-1-111 [

Claims

[Scope of utility model registration request]

(1) Phase sequence detection is performed by extracting phase sequence detection signals using multiple optical coupling elements connected to a power line to which three-phase alternating current is applied, and comparing the phases of these signals using a flip-flop. In this case, an operating circuit for selectively inverting the logic level of the output of the flip-flop is connected to the output side of the optical coupling element using a switch, and the phase order of 1 positive phase is set to be reversed by operating the switch. A phase sequence detection device characterized in that it obtains the following:

(2) the operation circuit includes an exclusive or gate;
The output of one of the plurality of optical coupling elements is connected to one input terminal of the OR gate, and the logic level of the lid 2 is selectively set to "L" or "H" by the switch to the other input terminal of the OR gate. 2. The phase sequence detection device according to claim 1, wherein the output terminal of the OR gate is connected to the input terminal of the flip-flop.