JPS58100485U - Inverter gate signal generation circuit - Google Patents

Inverter gate signal generation circuit

Info

Publication number
JPS58100485U
JPS58100485U JP19309581U JP19309581U JPS58100485U JP S58100485 U JPS58100485 U JP S58100485U JP 19309581 U JP19309581 U JP 19309581U JP 19309581 U JP19309581 U JP 19309581U JP S58100485 U JPS58100485 U JP S58100485U
Authority
JP
Japan
Prior art keywords
circuit
output
generation circuit
generator
gate signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19309581U
Other languages
Japanese (ja)
Inventor
有司 神保
Original Assignee
東洋電機製造株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東洋電機製造株式会社 filed Critical 東洋電機製造株式会社
Priority to JP19309581U priority Critical patent/JPS58100485U/en
Publication of JPS58100485U publication Critical patent/JPS58100485U/en
Pending legal-status Critical Current

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  • Control Of Ac Motors In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は従来の正弦波変調方式によるゲート信
号、線間電圧を得る一例を示す波形図、第3図は従来の
正弦波変調方式により得られる出力線間パルスの代表す
る電圧波形を示す図、第4図、第5図は本考案の一実施
例を示すブロック図、各出力波形図、第6図は搬送波周
波数とインバータ周波数の関係例を示す説明図である。 1、l’、1″・・・・・・正弦波発生器、2・・・・
・・三角波発生器、3、・・・・・・パルス発生器、4
.4’、4″・・・・・・ホールド回路、5.5’、5
″・・・・・・比較器、WA、WB・・・・・・線間電
圧波形。 r J坐1ト −! 4坐炉 − 一多5圀 1−一一
Figures 1 and 2 are waveform diagrams showing an example of obtaining the gate signal and line voltage using the conventional sine wave modulation method, and Figure 3 is a representative voltage of the output line pulse obtained using the conventional sine wave modulation method. FIGS. 4 and 5 are block diagrams showing an embodiment of the present invention, and each output waveform is a diagram showing waveforms. FIG. 6 is an explanatory diagram showing an example of the relationship between carrier frequency and inverter frequency. 1, l', 1''...Sine wave generator, 2...
...Triangular wave generator, 3, ...Pulse generator, 4
.. 4', 4''...Hold circuit, 5.5', 5
″... Comparator, WA, WB... Line voltage waveform.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 誘導電動機の可変速駆動を行うパルス幅変調形インバー
タにおいて、三相正弦波を発生する第1の発生回路の出
力信号に零点を一致させた三角波信号を与える第2の発
生回路、該第2の発生回路の三角波折点ごとにパルス出
力を送出するパルス発生器と、該パルス発生器出力より
前記第1の発生回路の出力値を保持するホールド回路と
を備え、該ホールド回路と前記第2の発生回路の出力値
の交点より主制御素子のオンオフ信号を得るようにした
ことを特徴とするインバータのゲート信号発生回路。
In a pulse width modulation type inverter for variable speed driving of an induction motor, a second generating circuit that generates a triangular wave signal whose zero point coincides with the output signal of the first generating circuit that generates a three-phase sine wave; A pulse generator that sends out a pulse output at each triangular wave corner point of the generator circuit, and a hold circuit that holds the output value of the first generator circuit from the output of the pulse generator, the hold circuit and the second A gate signal generation circuit for an inverter, characterized in that an on/off signal for a main control element is obtained from an intersection of output values of the generation circuit.
JP19309581U 1981-12-28 1981-12-28 Inverter gate signal generation circuit Pending JPS58100485U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19309581U JPS58100485U (en) 1981-12-28 1981-12-28 Inverter gate signal generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19309581U JPS58100485U (en) 1981-12-28 1981-12-28 Inverter gate signal generation circuit

Publications (1)

Publication Number Publication Date
JPS58100485U true JPS58100485U (en) 1983-07-08

Family

ID=30106465

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19309581U Pending JPS58100485U (en) 1981-12-28 1981-12-28 Inverter gate signal generation circuit

Country Status (1)

Country Link
JP (1) JPS58100485U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4828924A (en) * 1971-08-21 1973-04-17
JPS5543916A (en) * 1978-09-20 1980-03-28 Hitachi Ltd Modulation device of pwm inverter

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4828924A (en) * 1971-08-21 1973-04-17
JPS5543916A (en) * 1978-09-20 1980-03-28 Hitachi Ltd Modulation device of pwm inverter

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