JPS5920314U - DC stabilized power supply - Google Patents
DC stabilized power supplyInfo
- Publication number
- JPS5920314U JPS5920314U JP7756083U JP7756083U JPS5920314U JP S5920314 U JPS5920314 U JP S5920314U JP 7756083 U JP7756083 U JP 7756083U JP 7756083 U JP7756083 U JP 7756083U JP S5920314 U JPS5920314 U JP S5920314U
- Authority
- JP
- Japan
- Prior art keywords
- pulse width
- wave generator
- power supply
- time
- stabilized power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のパルス巾制御方式直流安定化電源装置の
回路構成図、第2図は誤差増巾回路と積分回路の出力波
形を示す図、第3図は変圧器の出力波形を示す図、第4
図は本考案の回路構成図、第5図は矩形波発生回路の出
力波形を示す図。
1・・・矩形波発生回路、2・・・積分回路、3・・・
誤差増幅回路、4・・・直流出力端子、5・・・比較回
路、6・・・分周回路、7・・・乗算回路(1)、8・
・・乗算回路(2)、9・・・インバータ部、10・・
・トランジスタ+1)、11・・・トランジスタ(2)
、12・・・変圧器、13.14・・・インバータ部入
力端子、15・・・パルス幅制限回路、16・・・矩形
波発生回路、17・・・パルス幅制御回路、18・・・
整流回路。Figure 1 is a circuit configuration diagram of a conventional pulse width control type DC stabilized power supply, Figure 2 is a diagram showing the output waveforms of the error amplification circuit and the integrating circuit, and Figure 3 is a diagram showing the output waveform of the transformer. , 4th
The figure is a circuit configuration diagram of the present invention, and FIG. 5 is a diagram showing the output waveform of the rectangular wave generation circuit. 1... Rectangular wave generation circuit, 2... Integrating circuit, 3...
Error amplifier circuit, 4... DC output terminal, 5... Comparison circuit, 6... Frequency divider circuit, 7... Multiplier circuit (1), 8...
...Multiplication circuit (2), 9...Inverter section, 10...
・Transistor +1), 11...Transistor (2)
, 12... Transformer, 13.14... Inverter section input terminal, 15... Pulse width limiting circuit, 16... Rectangular wave generation circuit, 17... Pulse width control circuit, 18...
rectifier circuit.
Claims (1)
、該矩形波発生器の出力と誤差に応答して可変のパルス
幅の信号を発生するパルス幅制御回路を備えたパルス巾
制御方式のハーフブリッヂ形又は、ブリッヂ形トランジ
スタインバータを使用した直流安定化電源装置において
、前記パルス幅制御回路は、前記矩形波発生器の出力パ
ルスが低レベル(又は高レベル)の領域内でのみ動作し
、前記インバータ部のトランジスタが同時導通して直流
入力が短絡しないように前記矩形波発生器の出力パルス
の高レベル(又は低レベル)時間を、インバータ部を構
成するトランジスタのストレージ時間と降下時間と1ラ
ンジスタのベース駆動遅延時間との和に設定したことを
特徴とした直流安定化電源装置。A pulse width control type half bridge equipped with a rectangular wave generator composed of an astable multi-by-break, and a pulse width control circuit that generates a variable pulse width signal in response to the output and error of the rectangular wave generator. In the DC stabilized power supply device using a type or bridge type transistor inverter, the pulse width control circuit operates only in a region where the output pulse of the square wave generator is low level (or high level), The high level (or low level) time of the output pulse of the square wave generator is calculated by dividing the storage time and fall time of the transistors constituting the inverter section, and the storage time and fall time of the transistors constituting the inverter section, so that the DC input does not short-circuit due to simultaneous conduction of the transistors in the inverter section. A DC stabilized power supply device characterized by being set to the sum of the base drive delay time.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7756083U JPS605756Y2 (en) | 1983-05-25 | 1983-05-25 | DC stabilized power supply |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7756083U JPS605756Y2 (en) | 1983-05-25 | 1983-05-25 | DC stabilized power supply |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5920314U true JPS5920314U (en) | 1984-02-07 |
JPS605756Y2 JPS605756Y2 (en) | 1985-02-22 |
Family
ID=30207590
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7756083U Expired JPS605756Y2 (en) | 1983-05-25 | 1983-05-25 | DC stabilized power supply |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS605756Y2 (en) |
-
1983
- 1983-05-25 JP JP7756083U patent/JPS605756Y2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS605756Y2 (en) | 1985-02-22 |
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