JPS5834587U

JPS5834587U - phase control device

Info

Publication number: JPS5834587U
Application number: JP12746281U
Authority: JP
Inventors: 芦田　孝夫; 石沢　孝一
Original assignee: 株式会社明電舎
Priority date: 1981-08-28
Filing date: 1981-08-28
Publication date: 1983-03-07

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来の位相制御装置を示す具体的な回路構成図
、第２図Ａは交流入力電源の周波数が定格周波数の場合
と上昇した場合との対応関係を示す入力電源電圧波形図
、第２図Ｂはその場合の縦′　来装置で得られる三角波
信号を示す波形図、第３図は本考案による一実施例を示
す位相制御装置の具体的な回路構成図。゛１は交流入力電源、２　２ｔ　　２□は三角波発生回路
、ｊは電圧設定器、５は誤差電圧増幅器、６６ｉ　　６
□及び１０−１０□−１０゜はコンパレータ、７−７□
−７゜はパルス増幅回路、８−８□−８２はパルストラ
ンス、９−９．−９□はサイリスタ。Fig. 1 is a specific circuit configuration diagram showing a conventional phase control device, Fig. 2A is an input power supply voltage waveform diagram showing the correspondence between the case where the frequency of the AC input power supply is the rated frequency and the case where it increases. FIG. 2B is a waveform diagram showing a triangular wave signal obtained by the vertical device in that case, and FIG. 3 is a specific circuit configuration diagram of a phase control device showing an embodiment of the present invention.゛1 is an AC input power supply, 2 2t 2□ is a triangular wave generation circuit, j is a voltage setting device, 5 is an error voltage amplifier, 66i 6
□ and 10-10□-10° are comparators, 7-7□
-7° is a pulse amplifier circuit, 8-8□-82 is a pulse transformer, 9-9. -9□ is a thyristor.

Claims

[Scope of utility model registration request]

The level of the triangular wave signal according to the frequency of the AC input power supply,
The level of the control signal is matched, a gate pulse signal is generated at the point where these two signals intersect, and the phase of this gate pulse signal can be arbitrarily shifted by changing the level of the control signal. A phase control device characterized in that the maximum control angle of the gate pulse signal is regulated by a zero point detection signal in which the phase voltage of the phase to be commutated next shifts from negative to positive.