JPS5974409U - power control device - Google Patents

power control device

Info

Publication number
JPS5974409U
JPS5974409U JP16782282U JP16782282U JPS5974409U JP S5974409 U JPS5974409 U JP S5974409U JP 16782282 U JP16782282 U JP 16782282U JP 16782282 U JP16782282 U JP 16782282U JP S5974409 U JPS5974409 U JP S5974409U
Authority
JP
Japan
Prior art keywords
counter
circuit
power supply
oscillation
thyristor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16782282U
Other languages
Japanese (ja)
Inventor
正雄 山田
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP16782282U priority Critical patent/JPS5974409U/en
Publication of JPS5974409U publication Critical patent/JPS5974409U/en
Pending legal-status Critical Current

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  • Control Of Voltage And Current In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の電力制御装置の構成を示すブロック図、
第2図a ”−eは各々第1図装置の動作を説明するた
めの波形図、第3図は、本考案による実施例を示すブロ
ック図、第4図a−1は各々実施例の動作を説明するた
めの波形図であ名。 なお図においてζE・・・・・・交流入力電源、1・・
・・・・負荷、2・・・・・・サイリスク、3・・・・
・・全波整流回路、4・・・・・・ゼロクロス回路、5
・・・・・・全波整流回路、6・・・・・・積分回路、
7・・・・・・基準電圧発生回路、8・・間比較器、9
・・・・・・ランプ波形発生回路、10・曲・変成器、
11・・・・・・変成器、12・・・・・・発振回路、
13・・・・・・カウンタ、14・・・・・・メモリ、
15・・・・・・タイミング・パルス発生回路、16・
・・・・・プリセッタブル・ダウン・カウンタ、17・
・・・・・トリガパルス発生回路、a・・・・・・入力
交流電源波形、b・・・・・・入力全波整流波形、C・
・・・・・ゼロクロス信号、d・・四サイリスタトリガ
信号、e・・・・・・負荷波形、f・・・用発振回路出
力波形、g・・・・・・カウンタ13制御信号、h・・
・・・・メモリアクセス信号、i・・・・・・カウンタ
16制御信号、である。
FIG. 1 is a block diagram showing the configuration of a conventional power control device.
Figures 2a-e are waveform diagrams for explaining the operation of the apparatus in Figure 1, Figure 3 is a block diagram showing an embodiment of the present invention, and Figure 4a-1 is the operation of the embodiment. Named by a waveform diagram to explain. In the diagram, ζE... AC input power supply, 1...
...Load, 2...Syrisk, 3...
...Full wave rectifier circuit, 4...Zero cross circuit, 5
・・・・・・Full wave rectifier circuit, 6・・・・・・Integrator circuit,
7... Reference voltage generation circuit, 8... Comparator, 9
・・・・・・Ramp waveform generation circuit, 10, curve, transformer,
11...Transformer, 12...Oscillation circuit,
13...Counter, 14...Memory,
15...timing pulse generation circuit, 16.
...Presettable down counter, 17.
...Trigger pulse generation circuit, a...Input AC power supply waveform, b...Input full-wave rectification waveform, C.
...Zero cross signal, d... Four thyristor trigger signal, e... Load waveform, f... Oscillator circuit output waveform, g... Counter 13 control signal, h...・
. . . Memory access signal, i . . . Counter 16 control signal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 交流電源、負荷と直列に接続されたサイリスタを含む回
路と、前記交流電源のゼロ点でパルスを発生するゼロク
ロス回路と、前記交流電源の電圧値により発振周波数が
変化する発振回路と、前記発振回路の発振周波数を計数
するカウンタと、前・ 記カウンタの計数値をアドレス
入力とするメモリと、前記メモリの出力データを入力値
とする別のカウンタと、前記カウンタの出力に応じてサ
イリスタを点弧するパルスを発生する位相制御パルス発
生回路とを具備し、前記発振回路の発振周波数に応じて
、前記サイリスタの点弧角を制御することを特徴とする
電力制御装置。
An AC power supply, a circuit including a thyristor connected in series with a load, a zero cross circuit that generates a pulse at the zero point of the AC power supply, an oscillation circuit whose oscillation frequency changes depending on the voltage value of the AC power supply, and the oscillation circuit. a counter that counts the oscillation frequency of the counter, a memory that uses the count value of the counter as an address input, another counter that uses the output data of the memory as an input value, and a thyristor that fires in response to the output of the counter. a phase control pulse generation circuit that generates a pulse that controls the firing angle of the thyristor according to the oscillation frequency of the oscillation circuit.
JP16782282U 1982-11-05 1982-11-05 power control device Pending JPS5974409U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16782282U JPS5974409U (en) 1982-11-05 1982-11-05 power control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16782282U JPS5974409U (en) 1982-11-05 1982-11-05 power control device

Publications (1)

Publication Number Publication Date
JPS5974409U true JPS5974409U (en) 1984-05-21

Family

ID=30367060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16782282U Pending JPS5974409U (en) 1982-11-05 1982-11-05 power control device

Country Status (1)

Country Link
JP (1) JPS5974409U (en)

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