JPS5923246U - power circuit - Google Patents

power circuit

Info

Publication number
JPS5923246U
JPS5923246U JP11505382U JP11505382U JPS5923246U JP S5923246 U JPS5923246 U JP S5923246U JP 11505382 U JP11505382 U JP 11505382U JP 11505382 U JP11505382 U JP 11505382U JP S5923246 U JPS5923246 U JP S5923246U
Authority
JP
Japan
Prior art keywords
circuit
voltage
outputs
pulse width
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11505382U
Other languages
Japanese (ja)
Other versions
JPS642541Y2 (en
Inventor
中村　法一
好一 高橋
Original Assignee
ブラザー工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ブラザー工業株式会社 filed Critical ブラザー工業株式会社
Priority to JP11505382U priority Critical patent/JPS5923246U/en
Publication of JPS5923246U publication Critical patent/JPS5923246U/en
Application granted granted Critical
Publication of JPS642541Y2 publication Critical patent/JPS642541Y2/ja
Granted legal-status Critical Current

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  • Power Sources (AREA)
  • Dc-Dc Converters (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を説明するための電　　□子
回路図、第２図はその波形図である。 図中、Ｏ２０は発振回路、ＰＷＣはパルス幅制御回路、
ＰＳＣは電力供給回路、ＤＥＴは検出回路、１４は負荷
である。FIG. 1 is an electronic circuit diagram for explaining an embodiment of the present invention, and FIG. 2 is a waveform diagram thereof. In the figure, O20 is an oscillation circuit, PWC is a pulse width control circuit,
PSC is a power supply circuit, DET is a detection circuit, and 14 is a load.

Claims (1)

【実用新案登録請求の範囲】 負荷に印加される電圧を検出して、その電圧に比例した
直流電圧を出力する検出回路と、はぼ垂直に立上り、勾
配をもって直線的に変化した後はぼ垂直に立下る波形信
号を繰り返し出力する発振回路と、 前記検出回路から直流電圧と前記発振回路からの出力信
号とを比較し、その直流電圧の値が大きい程狭い幅のパ
ルス信号を出力するパルス幅制御回路と、 そのパルス幅制御回路からパルス信号が供給され、その
パルス幅に比例した電力を負荷へ供給する電力供給回路
とを備えたことを特徴とする電源回路。[Claims for Utility Model Registration] A detection circuit that detects the voltage applied to a load and outputs a DC voltage proportional to the voltage. an oscillation circuit that repeatedly outputs a falling waveform signal; and a pulse width that compares a DC voltage from the detection circuit with an output signal from the oscillation circuit, and outputs a pulse signal with a narrower width as the value of the DC voltage increases. A power supply circuit comprising: a control circuit; and a power supply circuit that receives a pulse signal from the pulse width control circuit and supplies power proportional to the pulse width to a load.
JP11505382U 1982-07-29 1982-07-29 power circuit Granted JPS5923246U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11505382U JPS5923246U (en) 1982-07-29 1982-07-29 power circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11505382U JPS5923246U (en) 1982-07-29 1982-07-29 power circuit

Publications (2)

Publication Number Publication Date
JPS5923246U true JPS5923246U (en) 1984-02-13
JPS642541Y2 JPS642541Y2 (en) 1989-01-20

Family

ID=30265724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11505382U Granted JPS5923246U (en) 1982-07-29 1982-07-29 power circuit

Country Status (1)

Country Link
JP (1) JPS5923246U (en)

Also Published As

Publication number Publication date
JPS642541Y2 (en) 1989-01-20

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