JPS5925428U - Flow rate integration circuit - Google Patents

Flow rate integration circuit

Info

Publication number
JPS5925428U
JPS5925428U JP12197482U JP12197482U JPS5925428U JP S5925428 U JPS5925428 U JP S5925428U JP 12197482 U JP12197482 U JP 12197482U JP 12197482 U JP12197482 U JP 12197482U JP S5925428 U JPS5925428 U JP S5925428U
Authority
JP
Japan
Prior art keywords
voltage
flow rate
frequency
circuit
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12197482U
Other languages
Japanese (ja)
Inventor
均 田中
周次 守尾
Original Assignee
株式会社山武
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社山武 filed Critical 株式会社山武
Priority to JP12197482U priority Critical patent/JPS5925428U/en
Publication of JPS5925428U publication Critical patent/JPS5925428U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例による流量積算回路の構成
を示すブロック図、第2図はその具体的な回路図、第3
図は第2図の回路の各部における  −信号波形図であ
る。 1・・・単安定マルチバイブレータ、2・・・周波数−
−電圧変換回路、3・・・電圧−電流変換回路、4・・
・積分回路。
FIG. 1 is a block diagram showing the configuration of a flow rate integration circuit according to an embodiment of this invention, FIG. 2 is a specific circuit diagram thereof, and FIG.
The figure is a signal waveform diagram at each part of the circuit of FIG. 2. 1... Monostable multivibrator, 2... Frequency -
- Voltage conversion circuit, 3...Voltage-current conversion circuit, 4...
・Integrator circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 流量に比例した周波数をもつ流量信号を入力に受け、こ
の入力信号の各パルスのパルス幅が周波数に関係なく一
定となるように整形する単安定マルチバイブレータ回路
と、この単安定マルチバイブレータ回路の出力信号が第
1の状態のときに充電し、第?の状態のときに放電して
前記流量信号の周波数に比例した電圧を出力する周波数
−電圧変換回路と、この周波数−電圧変換回路の電圧出
力を入力に受けて、その電圧に比例した電流を出力する
電圧−電流変換回路と、この電圧−電流変換回路からの
出力電流を積分回路とからなる流量積算回路。
A monostable multivibrator circuit that receives a flow rate signal with a frequency proportional to the flow rate and shapes the pulse width of each pulse of this input signal to be constant regardless of the frequency, and the output of this monostable multivibrator circuit. Charge when the signal is in the first state, and when the signal is in the first state? a frequency-voltage conversion circuit that discharges when the flow rate signal is in the state and outputs a voltage proportional to the frequency of the flow rate signal; and a frequency-voltage conversion circuit that receives the voltage output of the frequency-voltage conversion circuit as an input and outputs a current proportional to the voltage. A flow rate integration circuit consisting of a voltage-current conversion circuit that converts the voltage to the current, and a circuit that integrates the output current from the voltage-current conversion circuit.
JP12197482U 1982-08-10 1982-08-10 Flow rate integration circuit Pending JPS5925428U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12197482U JPS5925428U (en) 1982-08-10 1982-08-10 Flow rate integration circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12197482U JPS5925428U (en) 1982-08-10 1982-08-10 Flow rate integration circuit

Publications (1)

Publication Number Publication Date
JPS5925428U true JPS5925428U (en) 1984-02-17

Family

ID=30278974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12197482U Pending JPS5925428U (en) 1982-08-10 1982-08-10 Flow rate integration circuit

Country Status (1)

Country Link
JP (1) JPS5925428U (en)

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