JPS59130128U - Power supply voltage zero phase signal generator - Google Patents

Power supply voltage zero phase signal generator

Info

Publication number
JPS59130128U
JPS59130128U JP2451183U JP2451183U JPS59130128U JP S59130128 U JPS59130128 U JP S59130128U JP 2451183 U JP2451183 U JP 2451183U JP 2451183 U JP2451183 U JP 2451183U JP S59130128 U JPS59130128 U JP S59130128U
Authority
JP
Japan
Prior art keywords
power supply
supply voltage
phase signal
signal generator
zero phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2451183U
Other languages
Japanese (ja)
Inventor
健 中村
木内 光幸
今橋 久之
Original Assignee
松下電器産業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電器産業株式会社 filed Critical 松下電器産業株式会社
Priority to JP2451183U priority Critical patent/JPS59130128U/en
Publication of JPS59130128U publication Critical patent/JPS59130128U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のZVS装置の回路図、第2図は同装置の
電圧波形を示し、同図Aは交流電源の電圧波形図、同図
Bは定電圧ダイオードの両端の電圧波形図、同図Cは直
流電源の電圧波形図、同図りは制御装置の入力電圧波形
図、第3図は本考案の一実施例によるzVS装置の回路
図、第4図は同装置の電圧波形を示し、同図Aは交流電
源の電圧波形図、同図Bは定電圧ダイオードの両端の電
圧波形図、同図Cは直流電源の電圧波形図、同図りは 
。 制御装置の入力電圧波形図である。
Figure 1 is a circuit diagram of a conventional ZVS device, Figure 2 is a voltage waveform of the same device, Figure A is a voltage waveform diagram of an AC power supply, Figure B is a voltage waveform diagram at both ends of a constant voltage diode, Figure C is a voltage waveform diagram of a DC power supply, the same figure is an input voltage waveform diagram of a control device, Figure 3 is a circuit diagram of a zVS device according to an embodiment of the present invention, and Figure 4 is a voltage waveform of the same device. Figure A is a voltage waveform diagram of an AC power supply, Figure B is a voltage waveform diagram at both ends of a constant voltage diode, Figure C is a voltage waveform diagram of a DC power supply, and Figure B is a voltage waveform diagram of a DC power supply.
. FIG. 3 is an input voltage waveform diagram of the control device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 交流電源電圧を定電圧ダイオードと抵抗で分圧し、この
定電圧ダイオードの両端の電圧を電源電圧零位相信号と
して制御装置の入力端子と接地の間にアノードが接地す
るようにダイオードを接続した電源電圧零位相信号発生
装置。
The AC power supply voltage is divided by a voltage regulator diode and a resistor, and the voltage across the voltage regulator diode is used as the power supply voltage zero-phase signal.The power supply voltage is obtained by connecting a diode so that the anode is grounded between the input terminal of the control device and the ground. Zero phase signal generator.
JP2451183U 1983-02-22 1983-02-22 Power supply voltage zero phase signal generator Pending JPS59130128U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2451183U JPS59130128U (en) 1983-02-22 1983-02-22 Power supply voltage zero phase signal generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2451183U JPS59130128U (en) 1983-02-22 1983-02-22 Power supply voltage zero phase signal generator

Publications (1)

Publication Number Publication Date
JPS59130128U true JPS59130128U (en) 1984-09-01

Family

ID=30155552

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2451183U Pending JPS59130128U (en) 1983-02-22 1983-02-22 Power supply voltage zero phase signal generator

Country Status (1)

Country Link
JP (1) JPS59130128U (en)

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