JPS61488U

JPS61488U - rectifier circuit

Info

Publication number: JPS61488U
Application number: JP8444984U
Authority: JP
Inventors: 康弘松浦
Original assignee: シャープ株式会社
Priority date: 1984-06-06
Filing date: 1984-06-06
Publication date: 1986-01-06

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は先行技術の整流回路１の回路図、第２図１は整
流回路１に入力される電力の波形図、第２図２は整流回
路１のライン１１を流れる電流の波形図、第２図３は整
流回路１の負荷４の端子電圧の波形因、第３図は本考案
の一実施例の回路図、第４図は整流回路１０に関連する
電圧および電流の波形図、第５図は整流回路１０の作動
状態を説明するための図、第６図は負荷１３の端子電圧
の波形図、第７図は第１図の整流回路１と第３図の整流
回路１０との作動状態の相違を説明するための図である
。１０・・・整流回路、１１・・・半波整流回路、１２・
・・平滑回路、１３・・・負荷、Ｄ２，Ｄ３，Ｄ４，Ｄ
５・・・ダイオニド、Ｃ３，Ｃ４，Ｃ５・・・コンデン
サ、Ｒ３，Ｒ４・・・抵抗。1 is a circuit diagram of the rectifier circuit 1 of the prior art, FIG. 2 1 is a waveform diagram of the power input to the rectifier circuit 1, FIG. 2. FIG. 3 is a waveform factor of the terminal voltage of the load 4 of the rectifier circuit 1, FIG. 3 is a circuit diagram of an embodiment of the present invention, FIG. 4 is a waveform diagram of voltage and current related to the rectifier circuit 10, and FIG. 6 is a diagram for explaining the operating state of the rectifier circuit 10, FIG. 6 is a waveform diagram of the terminal voltage of the load 13, and FIG. 7 is an operation of the rectifier circuit 1 in FIG. 1 and the rectifier circuit 10 in FIG. 3. FIG. 3 is a diagram for explaining differences in states. 10... Rectifier circuit, 11... Half-wave rectifier circuit, 12.
...Smoothing circuit, 13...Load, D2, D3, D4, D
5... Dionide, C3, C4, C5... Capacitor, R3, R4... Resistor.

Claims

[Scope of utility model registration request]

a half-wave rectifier circuit that half-wave rectifies input power; a plurality of series-connected capacitors that are charged by the output power from the half-wave rectifier circuit; and during a period when there is no output from the half-wave rectifier circuit, the A rectification circuit comprising: a circuit that commonly derives the outputs of a plurality of capacitors.