JPS642541Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a power supply circuit that employs a switching method.

Conventionally, this type of power supply circuit uses a comparison circuit to compare an error signal from an error amplifier circuit that amplifies the difference between a voltage proportional to the voltage supplied to the load and a reference voltage, and a sawtooth wave signal from a sawtooth wave oscillation circuit. By outputting a pulse signal whose voltage is high only during the period when the voltage of the sawtooth wave signal is higher than the voltage of the error signal from the comparison circuit to the subsequent power supply circuit, the pulse width output from the comparison circuit can be adjusted. It was configured to supply proportional power to the load.

However, in such a power supply circuit, in order to stably supply power to the load, the width of the pulse signal from the comparison circuit needs to change greatly in response to a minute change in the output voltage to the load. Therefore, an amplifier circuit had to be used. Furthermore, although an operational amplifier circuit is generally used as this amplifier circuit, this circuit is susceptible to noise, drift, and the like.

An object of the present invention is to eliminate the above-mentioned conventional drawbacks and provide an inexpensive and stable power supply circuit.

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, the oscillation circuit OSC has a comparator 1 as its main component, the positive input terminal of which is connected to the positive power supply (+) V1 via a resistor 2 and grounded via a resistor 3, and its negative input terminal is grounded through a resistor 4 and a capacitor 5 in series. Further, the output terminal of the comparator 1 is connected to its positive input terminal via a resistor 6, and a resistor 7
It is connected to the power supply (+) V1 through the resistor 8, and to the common connection point between the resistor 4 and the capacitor 5 through the resistor 8. The resistor 9 is connected between the power supply (+) V1 and a common connection point between the resistor 4 and the capacitor 5. The positive input terminal of the comparator 10 constituting the pulse width control circuit PWC is connected to the output terminal of the comparator 1, and the output terminal is connected to the power supply circuit.
NPN type transistor 11 that makes up the PSC
connected to the base of. This transistor 1
The collector of transistor 1 is connected to the base of a PNP transistor 12, and the emitter is grounded. The emitter of transistor 12 is connected to the positive power supply (+) V2
The collector is connected to ground via an inductor 13 and a load 14 in series, and is also grounded via a diode 15 or a shot key barrier diode. A series circuit of a capacitor 16 and resistors 17 and 18 constituting the detection circuit DET is connected between the common connection point of the inductor 13 and the load 14 and the ground, respectively. Further, a common connection point between the resistor 17 and the resistor 18 is connected to the negative input terminal of the comparator 10.

Next, the operation of the above configuration will be explained with reference to FIGS. 1 and 2.

First, to explain the operation of the oscillation circuit OSC, immediately after turning on the power to this circuit, there is almost no charge in capacitor 5, so the positive input terminal of comparator 1 is at a higher voltage than the negative input terminal, and comparator 1 The output voltage of will be high voltage. Thereafter, when the capacitor 5 is charged via the resistors 7, 8, and 9 and its voltage becomes higher than the voltage at the positive input terminal of the comparator 1, the output of the comparator 1 is inverted and becomes a low voltage. After that, when the charge in capacitor 5 is discharged and becomes lower than the voltage at the positive input terminal of comparator 1, comparator 1
The output of is inverted again to a high voltage, and then this operation is repeated. By the way, even when the voltage of the capacitor 5 is lower than the voltage of the positive input terminal of the comparator 1 and the output terminal is at a high voltage, the capacitor 5 continues to be charged via the resistors 7, 8, and 9, so the output voltage value is gradually increases. Therefore,
The output waveform from the oscillation circuit OSC is as shown by the solid line in FIG. 2A.

The output of this oscillation circuit OSC and the detection circuit
The pulse width control circuit PWC compares the DC voltage obtained by dividing the voltage applied to the load 14 output from the DET (shown by the broken line in Figure 1), and as shown in Figure 2B. The larger the value of the DC voltage is, the narrower the width of the pulse signal is supplied to the transistor 11 of the power supply circuit PSC. This power circuit PSC is well known and supplies direct current power proportional to the width of a pulse signal repeatedly input to the transistor 11 to the load 14. Therefore, this circuit operates to reduce the power supplied to the load as the voltage applied to the load 14 increases, and the power supplied to the load remains constant.

The values of each element of the oscillation circuit OSC in this example are as follows.

Resistor 2 33k ohm Resistor 3 18k ohm Resistor 4 1k ohm Capacitor 5 0.027 microfahrad Resistor 6 680k ohm Resistor 7 10k ohm Resistor 8 10k ohm Resistor 9 33k ohm As detailed above, the power supply circuit of the present invention starts from the oscillation circuit. Since the output oscillation signal has a waveform that rises almost vertically, changes linearly with a slope, and then falls almost vertically, and the DC voltage that is proportional to the voltage applied to the load is compared, the oscillation signal Therefore, stable circuit operation can be expected with sufficient response to even small changes in the power supplied to the load, and there is no particular need for a conventional error signal amplification circuit. .

[Brief explanation of drawings]

FIG. 1 is an electronic circuit diagram for explaining an embodiment of the present invention, and FIG. 2 is a waveform diagram thereof. In the figure, OSC is an oscillation circuit, PWC is a pulse width control circuit, PSC is a power supply circuit, DET is a detection circuit,
14 is a load.

Claims (1)

[Claims for Utility Model Registration] A detection circuit that detects the voltage applied to a load and outputs a DC voltage proportional to the voltage; an oscillation circuit that repeatedly outputs a falling waveform signal; and a pulse that compares a DC voltage from the detection circuit with an output signal from the oscillation circuit, and outputs a pulse signal with a narrower width as the value of the DC voltage increases. A power supply circuit comprising: a width control circuit; and a power supply circuit that receives a pulse signal from the pulse width control circuit and supplies power proportional to the pulse width to a load.