JPS599778U - Gate pulse generation circuit - Google Patents

Gate pulse generation circuit

Info

Publication number
JPS599778U
JPS599778U JP6831583U JP6831583U JPS599778U JP S599778 U JPS599778 U JP S599778U JP 6831583 U JP6831583 U JP 6831583U JP 6831583 U JP6831583 U JP 6831583U JP S599778 U JPS599778 U JP S599778U
Authority
JP
Japan
Prior art keywords
switching element
circuit
generation circuit
pulse generation
gate pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6831583U
Other languages
Japanese (ja)
Other versions
JPS5930624Y2 (en
Inventor
井坂 正義
清 中村
奥村 義雄
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP6831583U priority Critical patent/JPS5930624Y2/en
Publication of JPS599778U publication Critical patent/JPS599778U/en
Application granted granted Critical
Publication of JPS5930624Y2 publication Critical patent/JPS5930624Y2/en
Expired legal-status Critical Current

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Landscapes

  • Power Conversion In General (AREA)
  • Thyristor Switches And Gates (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図A、  Bは広幅ゲートパルスを得るための提案
されているゲートパルス発生回路図、第2図は第1図A
、 Bの回路の動作説明図、第3図は本考案の一実施例
を示すゲートパルス発生回路図、第4図および第5図は
夫々本考案の他の実施例を示すゲートパルス発生回路図
、第6図は考えられる一案を示すゲートパルス発生回路
図、第7図および第8図は夫々本考案の更に他の実施例
を示すゲートパルス発生回路図である。 1・・・電源、2・・田イヤ発振器、3・・・狭幅パル
ス回路、A・・・信号入力端子、Tr□〜Tr3・・・
トランジスタ、P、Trl、PjTr2・・・ハルスト
ランス、d。 〜d3・・・ダイオード、R1−R6・・・電流制限用
抵抗、01〜C3・・・コンデンサ、C4・・・サージ
吸収用コンデンサ、d4・・勅−ジ吸収用ダイオード、
C5,R5・・・サージ吸収用コンデンサと抵抗。
Figures 1A and B are diagrams of the proposed gate pulse generation circuit for obtaining wide gate pulses, and Figure 2 is the diagram of Figure 1A.
, FIG. 3 is a gate pulse generation circuit diagram showing one embodiment of the present invention, and FIGS. 4 and 5 are gate pulse generation circuit diagrams showing other embodiments of the present invention, respectively. , FIG. 6 is a gate pulse generation circuit diagram showing one possible idea, and FIGS. 7 and 8 are gate pulse generation circuit diagrams showing still other embodiments of the present invention. 1...Power source, 2...Tear oscillator, 3...Narrow width pulse circuit, A...Signal input terminal, Tr□~Tr3...
Transistor, P, Trl, PjTr2... Hals transformer, d. ~d3...Diode, R1-R6...Resistor for current limiting, 01-C3...Capacitor, C4...Capacitor for surge absorption, d4...Diode for surge absorption,
C5, R5...Surge absorption capacitor and resistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 直流電源に対して直列接続されたロイヤー発振器の入力
端子と半導体開閉素子と、兄の開閉素子がオンしたとき
その初頭にのみ急峻なパルスを発生するように上記直流
電源に対して上記開閉素子を介在して接続された狭幅パ
ルス回路と、この狭幅パルス回路の出力と上記ロイヤー
発振器の出力を合成する回路と、上記開閉素子を一足時
間以上継続してオンさせる入力信号発生手段と、上記ロ
イヤー発振器の大力端子間と上記開閉素子のうちの少く
とも一方と並列にコンデンサを含むサージ吸収回路を備
えたことを特徴とするゲートパルス発生回路。
The input terminal of the Royer oscillator and the semiconductor switching element are connected in series to the DC power supply, and the switching element is connected to the DC power supply so that a steep pulse is generated only at the beginning when the older switching element is turned on. a narrow-width pulse circuit connected therebetween, a circuit for synthesizing the output of the narrow-width pulse circuit and the output of the Royer oscillator, an input signal generating means for turning on the switching element continuously for more than one hour; 1. A gate pulse generation circuit comprising a surge absorption circuit including a capacitor between the large power terminals of the Royer oscillator and in parallel with at least one of the switching elements.
JP6831583U 1983-05-06 1983-05-06 Gate pulse generation circuit Expired JPS5930624Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6831583U JPS5930624Y2 (en) 1983-05-06 1983-05-06 Gate pulse generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6831583U JPS5930624Y2 (en) 1983-05-06 1983-05-06 Gate pulse generation circuit

Publications (2)

Publication Number Publication Date
JPS599778U true JPS599778U (en) 1984-01-21
JPS5930624Y2 JPS5930624Y2 (en) 1984-08-31

Family

ID=30198493

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6831583U Expired JPS5930624Y2 (en) 1983-05-06 1983-05-06 Gate pulse generation circuit

Country Status (1)

Country Link
JP (1) JPS5930624Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6254619A (en) * 1985-06-18 1987-03-10 スパイロ アメリカ インコ−ポレ−テツド Hollow pipe cutter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6254619A (en) * 1985-06-18 1987-03-10 スパイロ アメリカ インコ−ポレ−テツド Hollow pipe cutter

Also Published As

Publication number Publication date
JPS5930624Y2 (en) 1984-08-31

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