JPS6132535A - Manufacture of sensor - Google Patents

Manufacture of sensor

Info

Publication number
JPS6132535A
JPS6132535A JP59154956A JP15495684A JPS6132535A JP S6132535 A JPS6132535 A JP S6132535A JP 59154956 A JP59154956 A JP 59154956A JP 15495684 A JP15495684 A JP 15495684A JP S6132535 A JPS6132535 A JP S6132535A
Authority
JP
Japan
Prior art keywords
layer
sensor
insulating layer
resin
bonding wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59154956A
Other languages
Japanese (ja)
Inventor
Tadahiko Tanaka
田中 忠彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP59154956A priority Critical patent/JPS6132535A/en
Publication of JPS6132535A publication Critical patent/JPS6132535A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4823Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Abstract

PURPOSE:To eliminate any dispersion in outer shape by utilizing a transfer mold while exposing a sensor layer more precisely by a method wherein an insulating layer is formed by means of photoetching process. CONSTITUTION:The surface of a sensor layer 2 to be exposed formed on an insulating substrate 1 comprising a thermooxide film of a silicon single crystal substrate is coated with an insulating layer 3. The insulating layer 3 is precisely formed by means of photoetching process after the overall surface thereof is coated with applicable polyimide resin or rubber base resin. Firstly the silicon substrate is bonded on a header 4 to connect a sensor electrode terminal to an outer lead 5 with a bonding wire 6. Secondly the substrate is placed in a specific metal mold to be transfer-molded. At this time, a part of the metal mold abuts against the insulating layer 3 to put the bonding wire 6 in a cavity. Thirdly the cavity is implanted with mold resin to bury the bonding wire 6 completely in a resin layer 7. Finally the insulating layer 3 may be removed by means of plasma etching process to expose the sensor layer 2 only.

Description

【発明の詳細な説明】 (−()産業上の利用分野 本発明は化合物半導体材料等を用いたセンサの製造方法
、特にボンディングワイヤにより接続を行うセyすの製
造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (-() Industrial Field of Application) The present invention relates to a method of manufacturing a sensor using a compound semiconductor material or the like, and particularly to a method of manufacturing a sensor in which connections are made using bonding wires.

(ロ)従来の技術 表面を露出して組立を行うセンサとして光センサ、温度
センサ、圧力センサ等がある。斯るセンサは絶縁基板(
11)上に化合物半導体材料あるいは適当なセンサ材料
を層状に蒸着してセンサ一層α邊を形成している。
(b) Conventional technology Sensors that are assembled with exposed surfaces include optical sensors, temperature sensors, and pressure sensors. Such a sensor uses an insulating substrate (
11) A compound semiconductor material or a suitable sensor material is deposited in a layered manner on top of the sensor to form a single layer α side of the sensor.

とのセンサを組立てるには第2図に示す如く金属ケース
のヘッダー(13上に絶縁基板αυを固着し、センナ層
(I3の両端の電極(図示せず)とヘッダーa■に植立
された外部ピン(14)とをボンディングワイヤa5で
接続し、中央部を切欠したキャップαeをヘッダー03
に圧着して封止していた。例えば%開開59−8379
号公報(HOI L 29/84)に同様の技術が開示
されている。
To assemble the sensor, as shown in Figure 2, the insulating substrate αυ is fixed on the header (13) of the metal case, and the electrodes (not shown) at both ends of the senna layer (I3) and the header a Connect the external pin (14) with the bonding wire a5, and attach the cap αe with a cutout in the center to the header 03.
It was crimped and sealed. For example, % opening 59-8379
A similar technique is disclosed in Publication No. HOI L 29/84.

またこのセンサを組立てる他の方法として第3図に示す
如く、絶縁基板Iを支持材−上に固着し、センサ層α4
0両端の電極(図示せず)と支持材住η上の電極(図示
せず)とをボンディングワイヤ(151で接続し、ボン
ディングワイヤ051近くにエポキシ樹脂08を滴下し
ていた。
As another method for assembling this sensor, as shown in FIG.
The electrodes (not shown) at both ends of 0 and the electrodes (not shown) on the support material η were connected by a bonding wire 151, and epoxy resin 08 was dropped near the bonding wire 051.

f今 発明が解決しようとする問題点 上述した第2図に示す組立方法ではボンディングワイヤ
a四が保護されていないので、長期的にはボンディング
ワイヤa!9の断線等を発生し信頼性を向上できない欠
点がある。
Problems to be Solved by the Invention In the above-described assembly method shown in FIG. 2, bonding wire a4 is not protected, so bonding wire a! There is a drawback that reliability cannot be improved due to the occurrence of disconnection of the wires.

また第3図に示す組立方法ではボンディングワイヤ09
の保護はなされるが、エポキシ樹脂01Gの広がりによ
りセンサ層αのの被覆面積にバラツキが生じ生産性も悪
い欠点があった。
In addition, in the assembly method shown in FIG. 3, the bonding wire 09
However, due to the spread of the epoxy resin 01G, the coverage area of the sensor layer α varies, resulting in poor productivity.

に)問題点を解決するための手綾 本発明は斯上した欠点に鑑みてなされ、トランスファー
モールド技術を用いることにより表面を露出するセンサ
に適した製造方法を実現するものである。
B) Solution to the Problems The present invention has been made in view of the above-mentioned drawbacks, and uses transfer molding technology to realize a manufacturing method suitable for sensors whose surfaces are exposed.

(ホ) 作用 本発明ではトランスファーモールド技術により常に一定
の領域のみ樹脂モールドされ、センサ層の所定部分のみ
露出できる。
(E) Function In the present invention, only a certain area is always resin-molded by transfer molding technology, and only a certain part of the sensor layer can be exposed.

(へ)実施例 本発明に依れば第1図(イ)に示す如く、0.2m厚の
シリコン単結晶基板を鏡面加工した主面に熱酸化膜を形
成した絶縁基板(1)を用い、この基板(1)の熱酸化
膜上に化合物半導体を蒸着してセンサ層(2)を形成し
ている。センナ層(2)の両端には取出電極を形成する
ため導電金属を蒸着してセンナ電極端子(図示せず)を
形成する。
(f) Example According to the present invention, as shown in FIG. 1(a), an insulating substrate (1) is used, in which a thermal oxide film is formed on the main surface of a mirror-finished silicon single crystal substrate with a thickness of 0.2 m. A compound semiconductor is deposited on the thermal oxide film of this substrate (1) to form a sensor layer (2). A conductive metal is deposited on both ends of the senna layer (2) to form extraction electrodes, thereby forming senna electrode terminals (not shown).

次に第1図(ロ)に示す如(、センサ層(2)の露出さ
せたい表面を絶縁層(3)で被覆する。絶縁層(3)と
してはポリイシド樹脂あるいはゴム系樹脂を用い、全面
に塗布した後ホトエツチングにより精度良く絶縁層(3
)を残す。なお絶縁層(3)としてCVDシリコン窒化
膜やCVDシリコン酸化膜も利用できる。
Next, as shown in FIG. 1 (B), the surface of the sensor layer (2) that is to be exposed is covered with an insulating layer (3). The insulating layer (3) is made of polyide resin or rubber resin, and the entire surface is covered with an insulating layer (3). After coating, the insulation layer (3
). Note that a CVD silicon nitride film or a CVD silicon oxide film can also be used as the insulating layer (3).

本発明の%徴は第1図(ハ)に示すトランスファーモー
ルド工程にある。本工程ではシリコン基板をチップ状に
して支持基板あるいはヘッダー(4)上に固着し、セン
サ電極端子と外部リード(5)とをボンディングワイヤ
(6)により接続を行う。然る後トランスファーモール
ドするために所定のモールド金型内に配置する。この際
金型の一部は絶縁層(3)を当接し、ボンディングワイ
ヤ(6)をキャビティ内に収める。そしてモールド樹脂
をキャビティ内に注入して樹脂層(7)でボンディング
ワイヤ(6)を完全に被覆する。なおセンナ層(2)の
露出したい部分は絶縁層(3)で保護されているので樹
脂層(カは全く形成されない。
The % characteristic of the present invention lies in the transfer molding process shown in FIG. 1(C). In this step, the silicon substrate is made into a chip and fixed on a support substrate or header (4), and the sensor electrode terminals and external leads (5) are connected by bonding wires (6). Thereafter, it is placed in a predetermined mold for transfer molding. At this time, a part of the mold comes into contact with the insulating layer (3), and the bonding wire (6) is housed in the cavity. Then, molding resin is injected into the cavity to completely cover the bonding wire (6) with the resin layer (7). Note that since the portion of the senna layer (2) that is desired to be exposed is protected by the insulating layer (3), no resin layer is formed at all.

続いて第1図に)に示す如く、絶縁層(3)を除去する
。即ちポリイシド樹脂を用いたときはヒドラジン又は0
雪プラズマによりエツチングし、ゴム系樹脂を用いたと
きは発燵硝酸又はJ−100等でエツチングする。この
結果絶縁層(3)で被覆した部分のセンサ層(2)のみ
が露出される。
Subsequently, as shown in FIG. 1), the insulating layer (3) is removed. That is, when using polyamide resin, hydrazine or 0
Etching is performed using snow plasma, and when a rubber resin is used, etching is performed using ignited nitric acid or J-100. As a result, only the portion of the sensor layer (2) covered with the insulating layer (3) is exposed.

(ト)発明の効果 本発明の第1の効果は絶縁層(3)をホトエツチングに
より形成しているので露出部分の位置精度が非常に良く
特性のバラツキが少なくなる。
(g) Effects of the Invention The first effect of the invention is that since the insulating layer (3) is formed by photoetching, the positional accuracy of the exposed portion is very good and variations in characteristics are reduced.

本発明の第2の効果はトランスファモールドの採用によ
り外形のバラツキがなくなり、生産性を大巾に向上でき
る。
The second effect of the present invention is that the use of transfer molding eliminates variations in the outer shape, which greatly improves productivity.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(イ)(ロ)(ハ)に)は本発明の製造方法を説
明する断面図、第2図および第3図は従来例を説明する
断面図である。 主な図番の説明 0)・・・絶縁基板、 (2)・・・センサ層、 (3
)・・・絶縁層、(6)・・・ボンディングワイヤ、 
(7)・・・樹脂層。 出願人 三洋電機株式会社 外1名 代理人 弁理士  佐 野 靜 夫 第1図(4) 第 1 図(ロ) 第1図(ハ) 第1図(り) 第2図
FIGS. 1(a), (b), and (c) are cross-sectional views for explaining the manufacturing method of the present invention, and FIGS. 2 and 3 are cross-sectional views for explaining the conventional example. Explanation of main drawing numbers 0)...Insulating substrate, (2)...Sensor layer, (3
)... Insulating layer, (6)... Bonding wire,
(7)...Resin layer. Applicant Sanyo Electric Co., Ltd. and one other representative Patent attorney Mamoru Sano Figure 1 (4) Figure 1 (B) Figure 1 (C) Figure 1 (R) Figure 2

Claims (1)

【特許請求の範囲】[Claims] (1)基板上にセンサ層とセンサ電極端子とを形成する
工程と、前記センサ層の露出予定部分を絶縁層で被覆す
る工程と、前記センサ電極端子にボンディングワイヤを
固着する工程と、前記ボンディングワイヤを含み前記絶
縁層のない部分を樹脂モールドする工程と、前記絶縁層
を除去して前記センサ層を露出する工程とを具備するこ
とを特徴とするセンサの製造方法。
(1) A step of forming a sensor layer and a sensor electrode terminal on a substrate, a step of covering a portion of the sensor layer to be exposed with an insulating layer, a step of fixing a bonding wire to the sensor electrode terminal, and a step of bonding the sensor layer to the sensor electrode terminal. A method for manufacturing a sensor, comprising the steps of resin-molding a portion including a wire and not having the insulating layer, and removing the insulating layer to expose the sensor layer.
JP59154956A 1984-07-25 1984-07-25 Manufacture of sensor Pending JPS6132535A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59154956A JPS6132535A (en) 1984-07-25 1984-07-25 Manufacture of sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59154956A JPS6132535A (en) 1984-07-25 1984-07-25 Manufacture of sensor

Publications (1)

Publication Number Publication Date
JPS6132535A true JPS6132535A (en) 1986-02-15

Family

ID=15595578

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59154956A Pending JPS6132535A (en) 1984-07-25 1984-07-25 Manufacture of sensor

Country Status (1)

Country Link
JP (1) JPS6132535A (en)

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6319878A (en) * 1986-07-12 1988-01-27 Canon Inc Semiconductor photodetector
US5037779A (en) * 1989-05-19 1991-08-06 Whalley Peter D Method of encapsulating a sensor device using capillary action and the device so encapsulated
JPH042152A (en) * 1990-04-19 1992-01-07 Mitsubishi Electric Corp Resin-sealed semiconductor device, and manufacture thereof
JPH0469958A (en) * 1990-07-10 1992-03-05 Mitsubishi Electric Corp Semiconductor device
JPH06120646A (en) * 1992-10-08 1994-04-28 Mitsubishi Heavy Ind Ltd Mounting method for thin film sensor
JPH07221278A (en) * 1994-01-24 1995-08-18 Lg Semicon Co Ltd Solid-state image pickup element and its preparation
WO2002069386A1 (en) * 2001-02-27 2002-09-06 Infineon Technologies Ag Semiconductor chip and production method for a housing
FR2839570A1 (en) * 2002-05-07 2003-11-14 Atmel Grenoble Sa METHOD OF MANUFACTURING FINGERPRINT SENSOR AND CORRESPONDING SENSOR
WO2005069363A1 (en) * 2004-01-13 2005-07-28 Mitsui Mining & Smelting Co., Ltd. Method for producing synthetic resin mold package, alcohol concentration sensor and apparatus for measuring alcohol concentration
JP2006186288A (en) * 2004-09-14 2006-07-13 Sony Chem Corp Functional element mounted module and manufacturing method thereof
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