JPS6130356B2 - - Google Patents
Info
- Publication number
- JPS6130356B2 JPS6130356B2 JP53160398A JP16039878A JPS6130356B2 JP S6130356 B2 JPS6130356 B2 JP S6130356B2 JP 53160398 A JP53160398 A JP 53160398A JP 16039878 A JP16039878 A JP 16039878A JP S6130356 B2 JPS6130356 B2 JP S6130356B2
- Authority
- JP
- Japan
- Prior art keywords
- address
- data
- read
- write data
- memory device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000012360 testing method Methods 0.000 claims description 30
- 238000010998 test method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 12
- 238000000034 method Methods 0.000 description 1
Landscapes
- Testing Relating To Insulation (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16039878A JPS5587396A (en) | 1978-12-25 | 1978-12-25 | Memory test system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16039878A JPS5587396A (en) | 1978-12-25 | 1978-12-25 | Memory test system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5587396A JPS5587396A (en) | 1980-07-02 |
JPS6130356B2 true JPS6130356B2 (cs) | 1986-07-12 |
Family
ID=15714074
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16039878A Granted JPS5587396A (en) | 1978-12-25 | 1978-12-25 | Memory test system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5587396A (cs) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59191197A (ja) * | 1983-04-12 | 1984-10-30 | Usac Electronics Ind Co Ltd | メモリ・テスタ |
-
1978
- 1978-12-25 JP JP16039878A patent/JPS5587396A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5587396A (en) | 1980-07-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6636998B1 (en) | Semiconductor memory device and parallel bit test method thereof | |
US6536004B2 (en) | On-chip circuit and method for testing memory devices | |
EP0620556B1 (en) | Semiconductor memory device having register for holding test resultant signal | |
US7719914B2 (en) | Semiconductor memory and test system | |
JPH0645451A (ja) | 半導体記憶装置 | |
US7246279B2 (en) | Static random access memory (SRAM) unit and method for operating the same | |
US5659549A (en) | Memory test system having a pattern generator for a multi-bit test | |
JP2004086996A (ja) | メモリテスト回路 | |
JPS6130356B2 (cs) | ||
JPH10106297A (ja) | 半導体メモリ装置の並列ビットテスト回路 | |
JPH0512900A (ja) | テスト機能を有する半導体記憶装置及びそのテスト方法 | |
JP2003503813A (ja) | ランダムアクセスメモリ用の組込形自動試験回路機構および試験用アルゴリズム | |
JP2002042485A (ja) | 半導体メモリ試験装置 | |
JPH04119434A (ja) | パリティ・エラー検出装置 | |
JP2001167597A (ja) | 半導体メモリ試験装置 | |
JPS585681A (ja) | 半導体メモリ試験装置 | |
JPS6132756B2 (cs) | ||
JPH05342113A (ja) | 組み込み型システムのramの故障検出方法 | |
JPH10125090A (ja) | メモリ試験装置 | |
JPS58155599A (ja) | メモリテスタ− | |
SU1376121A2 (ru) | Устройство дл записи и контрол программируемой посто нной пам ти | |
JPH1186595A (ja) | 半導体メモリ試験装置 | |
JPS5838879B2 (ja) | フエイルメモリ | |
JPH05101699A (ja) | メモリ装置 | |
JPH07192495A (ja) | 半導体記憶装置のテスト回路 |