JPS61289616A - Manufacture of single-crystal thin film - Google Patents

Manufacture of single-crystal thin film

Info

Publication number
JPS61289616A
JPS61289616A JP13076385A JP13076385A JPS61289616A JP S61289616 A JPS61289616 A JP S61289616A JP 13076385 A JP13076385 A JP 13076385A JP 13076385 A JP13076385 A JP 13076385A JP S61289616 A JPS61289616 A JP S61289616A
Authority
JP
Japan
Prior art keywords
semiconductor layer
insulator
thin film
recrystallization
grooves
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13076385A
Other languages
Japanese (ja)
Inventor
Hisao Hayashi
久雄 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP13076385A priority Critical patent/JPS61289616A/en
Publication of JPS61289616A publication Critical patent/JPS61289616A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent a crack from causing in the single-crystal thin film owing to stress by a method wherein the semiconductor layer is formed on the insulator, wherein grooves are formed, and after the semiconductor layer is made to fuse, the semiconductor layer is cooled and is made to recrystallinze. CONSTITUTION:Resists 6 are patterned on an insulator 1, grooves 2 are formed by performing an etching by an RIE method and a semiconductor layer 3 is formed thereon. Then the semiconductor layer 3 is made to fuse by heating using a proper heating means, such as a laser beam 4 to be emitted from the energy source 41 of an Ar laser, for example, and after that, the semiconductor layer is cooled and is made to recrystallize and a single-crystal thin film 5 is obtained. According to this way, the recrystallization is started from the parts of the grooves 2. As a result, a crack can be prevented from causing in the single-crystal thin film 5 during the process of recrystallization.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、薄膜単結晶の製造方法に関する0本発明は、
半導体に係る産業分野において薄膜単結晶を製造する場
合に利用され、例えば 5ol(Silicon  o
n  In5ulator)の製造に用いることができ
る。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for producing a thin film single crystal.
It is used in the production of thin film single crystals in the semiconductor industry, for example, 5ol (Silicon o
n In5lator).

〔発明の概要〕[Summary of the invention]

本発明は、絶縁物上の半導体層を薄膜単結晶とする方法
において、絶縁物として溝が形成されたものを用い、こ
の上に形成された半導体層を溶融させた後冷却して再結
晶化させることにより、溝部分からの再結晶化や、溝で
半導体領域を区切ることによるクランク発生防止などを
可能ならしめたものである。
The present invention is a method for forming a thin single crystal semiconductor layer on an insulator, using an insulator with grooves formed thereon, melting the semiconductor layer formed on the insulator, and then cooling and recrystallizing the semiconductor layer. By doing so, it is possible to perform recrystallization from the groove portion and prevent cranking by dividing the semiconductor region with the groove.

〔従来の技術〕[Conventional technology]

従来より、半導体層にエネルギービームを照射するなど
の手段で該半導体層を溶融した後再結晶化させることに
よって、薄膜単結晶を得ることが行われている0例えば
、絶縁体上の多結晶シリコンを再結晶化させることによ
って、単結晶シリコンが製造されている。これはS O
I  (S11icon onInsulator)技
術と称される。
Conventionally, thin film single crystals have been obtained by melting the semiconductor layer by irradiating the semiconductor layer with an energy beam or the like and then recrystallizing the semiconductor layer. For example, polycrystalline silicon on an insulator Single-crystal silicon is manufactured by recrystallizing. This is S.O.
It is called S11icon on Insulator (I) technology.

このようなSol技術にあっては、例えば石英上に単結
晶を形成しようとする場合、単純には第5図に示すよう
に石英基板a上に多結晶シリコンをCVD法などで成長
させ、該多結晶シリコン膜すをレザー光線、赤外線、電
子ビーム等の加熱手段dで溶かして、その後再結晶成長
させ、単結晶膜eとする。しかしこれだけでは、膜のス
トレスのため、膜にクランクが入り、正常な単結晶シリ
コンは得られない、(なお第5図中Cは加熱手段dの走
査方向である。) このため、l5land法と称される、溶融前に多結晶
シリコンを分離しておいて、ストレスを緩和して再結晶
させる方法がとられているが、一層簡単に良好な単結晶
を得る方法が望まれている。
In such Sol technology, when trying to form a single crystal on quartz, for example, as shown in FIG. 5, polycrystalline silicon is simply grown on a quartz substrate a by CVD method, The polycrystalline silicon film is melted by heating means d such as laser beams, infrared rays, and electron beams, and then recrystallized to form a single crystal film e. However, if this is done alone, the film will be cranked due to stress on the film, and normal single crystal silicon will not be obtained. (C in Fig. 5 is the scanning direction of the heating means d.) Although a method known as "recrystallization" in which polycrystalline silicon is separated before melting, stress is alleviated, and then recrystallized is used, there is a need for a method for obtaining a good single crystal more easily.

また一方、絶縁物上に単結晶を形成するには、溶融後あ
る一点から再結晶を開始させることにより、種(種晶)
なしでも単結晶が得られるようになっている。このよう
な再結晶を開始させる平面上の一点を設定するためには
、多結晶シリコンの形状を工夫する必要があり、このよ
うな工夫は様々になされている。しかしかかる形状につ
いての工夫は、次のプロセスでデバイスを作るうえでの
制限となる。つまり、再結晶開始のための形状設定が、
デバイス作製の時の制限を与えることになり、好ましく
ない。
On the other hand, in order to form a single crystal on an insulator, starting recrystallization from a certain point after melting, seeds (seed crystals) are formed.
Single crystals can be obtained even without it. In order to set a single point on the plane where such recrystallization starts, it is necessary to devise the shape of the polycrystalline silicon, and various such ideas have been used. However, such ingenuity regarding the shape poses a restriction when manufacturing a device in the next process. In other words, the shape setting for starting recrystallization is
This is not preferable because it imposes restrictions on device fabrication.

〔発明が解決すべき問題点〕 上記のように、従来技術にあっては、ストレスを緩和し
て正常な単結晶を得るのが必ずしも簡便な技術によって
は行えず、かつ再結晶の開始点を設定するために形状の
工夫をすることがデバイス製作上の制限となってしまう
という問題がある。
[Problems to be solved by the invention] As mentioned above, in the conventional technology, it is not always possible to relieve stress and obtain a normal single crystal using simple techniques, and it is difficult to obtain a normal single crystal by relieving stress. There is a problem in that devising the shape for setting becomes a restriction in device production.

本発明は、上記問題点を解決せんとするもので、本発明
の目的は、絶縁物上に全面に半導体を載せて溶融しても
ストレスが大きくならず、従って所望の正常な単結晶を
簡便な手法で得ることができ、しかも、再結晶の開始点
が爾後の加工の制限等をもたらさず、従って後工程での
デバイスの作製の点でパターンに余裕をもたせることが
可能な、単結晶の製造方法を提供することにある。
The present invention is intended to solve the above-mentioned problems, and an object of the present invention is to prevent stress from increasing even if a semiconductor is placed on the entire surface of an insulator and melted, so that a desired normal single crystal can be easily produced. Furthermore, the starting point of recrystallization does not impose restrictions on subsequent processing, and therefore, it is possible to provide a pattern with leeway in terms of device fabrication in the subsequent process. The purpose is to provide a manufacturing method.

〔問題を解決する技術的手段〕[Technical means to solve the problem]

本発明に係る薄膜単結晶の製造方法は、第1図に示すよ
うに、工程Iで、溝が形成された絶縁物上に半導体層を
形成し、工程■で、この半導体層を溶融させた後冷却し
て再結晶化させる。
As shown in FIG. 1, the method for manufacturing a thin film single crystal according to the present invention includes forming a semiconductor layer on an insulator in which a groove is formed in step I, and melting this semiconductor layer in step 2. After cooling and recrystallization.

工程Iにおいては、もともと溝の付いた絶縁物を用いて
もよいし、まず絶縁物に溝を形成しく工程1a)、次い
でこの絶縁物上に半導体を形成する(工程1b)ように
してもよい。
In step I, an insulator that originally has a groove may be used, or a groove may be first formed in the insulator (step 1a), and then a semiconductor may be formed on this insulator (step 1b). .

本発明の構成について、後記詳述する実施例を示す第2
図乃至第4図の例示を用いて説明すると、次の遺りであ
る。
Regarding the configuration of the present invention, a second example showing an example to be described in detail later.
The following will be explained using the examples shown in FIGS. 4 to 4.

まず溝2付きの絶縁物1を得る0図示例では第2図のよ
うに絶縁物1上にレジスト6をパターニングし、RIE
によりエツチングして第3図のような溝2が形成された
絶縁物1とする0次にこの上に半導体層3を形成する6
以上が工程!である。
First, the insulator 1 with grooves 2 is obtained. In the illustrated example, a resist 6 is patterned on the insulator 1 as shown in FIG.
The insulator 1 is etched to form a groove 2 as shown in FIG. 3. Next, a semiconductor layer 3 is formed thereon.
That’s all the process! It is.

次に、第4図に略示するように半導体N3を適宜の加熱
手段で、例えばArレザー装置などのエネルギー源41
からのレザー光4などで加熱溶融させ、その後冷却して
再結晶化させ、薄膜単結晶5を得る。矢印42は加熱手
段の走査方向である。
Next, as schematically shown in FIG. 4, the semiconductor N3 is heated by an energy source 41 such as an Ar laser device, etc.
The thin film single crystal 5 is obtained by heating and melting with laser light 4 etc., and then cooling and recrystallizing. Arrow 42 is the scanning direction of the heating means.

〔発明の作用〕[Action of the invention]

本発明によれば、溝2の部分から再結晶化がなされる。 According to the present invention, recrystallization is performed from the groove 2 portion.

開始点を作るために特に形状を工夫する必要はない、溝
2の底部から冷却が開始するので、ここが開始点となる
からである。従って平面上の形状の加工ということは必
要ない、このため後の工程、例えばデバイスの製作など
に対する阻害は生じず、自由度のある、余裕をもった製
作が可能々ならしめられる。
There is no need to particularly devise a shape to create a starting point, since cooling starts from the bottom of the groove 2, which serves as the starting point. Therefore, it is not necessary to process a shape on a plane, so that subsequent steps such as device manufacturing, etc., are not hindered, and manufacturing with a degree of freedom and leeway is possible.

本発明によれば、再結晶化の過程で膜にクラックが入る
ことが防止される。即ち、絶縁物1と半導体層2とでは
熱膨張係数が異なり、一般に再結晶化の過程で半導体層
2が絶縁物1に対して縮もうとして半導体層2にクラン
クが入り、結局良好な薄膜単結晶5が得られないことに
なるわけであるが、本発明では溝2が形成されているた
め、この縮む力が緩和されて、クランク発生が防がれる
According to the present invention, cracks are prevented from forming in the film during the recrystallization process. That is, the insulator 1 and the semiconductor layer 2 have different coefficients of thermal expansion, and generally, during the recrystallization process, the semiconductor layer 2 tries to shrink with respect to the insulator 1 and the semiconductor layer 2 is cranked, resulting in a good thin film. Although this means that the crystal 5 cannot be obtained, since the groove 2 is formed in the present invention, this shrinking force is alleviated and the occurrence of cranks is prevented.

縮む力が溝2の所で分断乃至は方向が変わり、大きなス
トレスとならないためと考えられ、またストレスが生じ
ても溝2で区分されるので集中せず、クラックが入りに
くくなるからと考えられ−る。
This is thought to be because the shrinking force is divided or changes direction at groove 2, so it does not create a large stress.Also, even if stress occurs, it is separated by groove 2, so it is not concentrated and cracks are less likely to occur. -ru.

〔発明の実施例〕[Embodiments of the invention]

以下本発明の一実施例について、第2図乃至第4図を参
照して説明する。この実施例は、本発明を、多結晶シリ
コンより成る半導体層を薄膜単結晶シリコンとするSo
l技術に適用した例である。
An embodiment of the present invention will be described below with reference to FIGS. 2 to 4. In this embodiment, the present invention will be described in detail below.
This is an example applied to l technology.

本実施例において、絶縁物1は石英である。これに前述
の如く溝2を形成して第3図の構造として、多結晶シリ
コンを低圧CVDなどでこの上に成長させ、その後レザ
ー光4などで溶融・再結晶させて、薄膜単結晶5を得る
In this embodiment, the insulator 1 is quartz. Grooves 2 are formed in this as described above, and polycrystalline silicon is grown on this by low-pressure CVD or the like to form the structure shown in FIG. obtain.

本実施例においては、溶融・再結晶に際して、次のよう
な作用が呈される。
In this embodiment, the following effects are exhibited during melting and recrystallization.

半導体層3の材料である多結晶シリコンは、絶縁物lた
る石英と熱膨張係数に差があり、多結晶シリコンの方が
熱膨張係数が大のため、この多結晶シリコンは溶融径再
結晶化の過程で石英に対し縮もうとする。連続な膜であ
ると、その力が大となって、シリコンの結合が切れて、
クランクとなる。この結果正常な単結晶シリコン5も得
られないことになる。ところが、溝2が形成されている
と、このようなりラックは生じにくくなる6石英に対し
ての縮む力は、その溝の所で方向が違ってくるために、
連続した力とはならずに、クランクは入らないためと考
えられる。また溝で区切られるので、ストレスが生じた
としてもこれは溝2により区分される。その結果ストレ
スが集中せずむしろ溝2にクランクが生じようとする力
が加わるが、溝2の部分は損傷しにくく、クランクが入
るのが防がれるためと考えられる。ただし、クラックと
、溝20間隔とには関係があり、あまり広すぎるとクラ
ンクが入り易い傾向となる。
Polycrystalline silicon, which is the material of the semiconductor layer 3, has a different thermal expansion coefficient from quartz, which is an insulator, and since polycrystalline silicon has a larger thermal expansion coefficient, this polycrystalline silicon has a melt diameter recrystallization. During the process, it tries to shrink against quartz. If it is a continuous film, the force will be large enough to break the silicon bonds.
It becomes a crank. As a result, normal single crystal silicon 5 cannot be obtained either. However, if the grooves 2 are formed, racks like this will be less likely to occur.6 The shrinking force on the quartz will be directed in a different direction at the grooves.
This is thought to be because the force is not continuous and the crank does not engage. Moreover, since they are separated by grooves, even if stress occurs, it will be separated by the grooves 2. As a result, stress is not concentrated, but rather a force is applied to the groove 2 that tends to produce a crank, but this is thought to be because the groove 2 is less likely to be damaged and the crank is prevented from entering. However, there is a relationship between cracks and the spacing between the grooves 20, and if the cracks are too wide, there is a tendency for cranks to enter.

またこのように溝2を作り、溶融再結晶させると、一番
先に冷えてくるのは、溝2の底部である。
Furthermore, when the grooves 2 are formed in this manner and melted and recrystallized, the bottom of the grooves 2 cools down first.

従って、再結晶化は、溝2の底からのみ起こり、ここが
開始点となって単結晶ができる。即ち溝2底部が種とな
って、3次元的パターンで再結晶化が起こる。溝2が細
かい程この作用は大きく、■溝の方がより効果は大であ
る。■溝にした場合、その角度は、結晶成長上重要なフ
ァクターになる。
Therefore, recrystallization occurs only from the bottom of groove 2, and this becomes the starting point to form a single crystal. That is, the bottom of groove 2 serves as a seed, and recrystallization occurs in a three-dimensional pattern. The finer the groove 2, the greater this effect, and the groove 2 has a greater effect. ■If grooves are formed, the angle becomes an important factor in crystal growth.

なお実施に際しては、石英から成る絶縁物1と多結晶シ
リコンから成る半導体層3との間に5ift層を形成し
た構造を用いることができる。
In actual practice, a structure in which a 5ift layer is formed between the insulator 1 made of quartz and the semiconductor layer 3 made of polycrystalline silicon can be used.

〔発明の効果〕〔Effect of the invention〕

上述の如く、本発明に係る薄膜単結晶の製造方法によれ
ば、絶縁物上の半導体を溶融して再結晶化させた場合で
も膜にストレスが入らず、この場合絶縁物上全面に半導
体を載せた場合でもかかるストレスによるクランクは防
止できる。しかも本発明においては、この効果を溝の形
成という簡便な手段によって達成できる。かつ本発明に
よれば、溝を再結晶の開始点とすることができるので、
かかる再結晶の開始点は爾後の加工の制限等をもたらさ
ず、従って後工程でのパターンの余裕・自由度をもたせ
ることができる。
As described above, according to the method for producing a thin film single crystal according to the present invention, even when the semiconductor on the insulator is melted and recrystallized, no stress is applied to the film, and in this case, the semiconductor is not applied to the entire surface of the insulator. Even if it is placed on top, cranking due to stress can be prevented. Moreover, in the present invention, this effect can be achieved by the simple means of forming grooves. According to the present invention, the groove can be used as a starting point for recrystallization.
Such a starting point for recrystallization does not impose any restrictions on subsequent processing, and therefore allows for margin and freedom in patterning in subsequent steps.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を示す工程図である。第2図乃至第4図
は本発明の一実施例を、工程順に断面図で示すものであ
る。第5図は従来例を示す。 l・・・絶縁物、2・・・溝、3・・・半導体層、4・
・・加熱手段(レザー光)、5・・・薄膜単結晶。
FIG. 1 is a process diagram showing the present invention. FIGS. 2 to 4 are cross-sectional views showing an embodiment of the present invention in the order of steps. FIG. 5 shows a conventional example. l...Insulator, 2... Groove, 3... Semiconductor layer, 4...
... Heating means (laser light), 5... Thin film single crystal.

Claims (1)

【特許請求の範囲】 1、溝が形成された絶縁物上に半導体層を形成し、 該半導体層を溶融させた後冷却して再結晶化させる薄膜
単結晶の製造方法。
[Claims] 1. A method for manufacturing a thin film single crystal, which comprises forming a semiconductor layer on an insulator in which a groove is formed, melting the semiconductor layer, and then cooling and recrystallizing the semiconductor layer.
JP13076385A 1985-06-18 1985-06-18 Manufacture of single-crystal thin film Pending JPS61289616A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13076385A JPS61289616A (en) 1985-06-18 1985-06-18 Manufacture of single-crystal thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13076385A JPS61289616A (en) 1985-06-18 1985-06-18 Manufacture of single-crystal thin film

Publications (1)

Publication Number Publication Date
JPS61289616A true JPS61289616A (en) 1986-12-19

Family

ID=15042073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13076385A Pending JPS61289616A (en) 1985-06-18 1985-06-18 Manufacture of single-crystal thin film

Country Status (1)

Country Link
JP (1) JPS61289616A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004134533A (en) * 2002-10-09 2004-04-30 Seiko Epson Corp Method for fabricating semiconductor device, semiconductor device, electro-optical device, and electronic apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004134533A (en) * 2002-10-09 2004-04-30 Seiko Epson Corp Method for fabricating semiconductor device, semiconductor device, electro-optical device, and electronic apparatus

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