JPS59121826A - Fabrication of semiconductor single crystal film - Google Patents

Fabrication of semiconductor single crystal film

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Publication number
JPS59121826A
JPS59121826A JP57227592A JP22759282A JPS59121826A JP S59121826 A JPS59121826 A JP S59121826A JP 57227592 A JP57227592 A JP 57227592A JP 22759282 A JP22759282 A JP 22759282A JP S59121826 A JPS59121826 A JP S59121826A
Authority
JP
Japan
Prior art keywords
layer
semiconductor layer
laser beam
insulating layer
polycrystalline
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57227592A
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Japanese (ja)
Inventor
Yoichi Akasaka
洋一 赤坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
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Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP57227592A priority Critical patent/JPS59121826A/en
Publication of JPS59121826A publication Critical patent/JPS59121826A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683—Continuous wave laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691—Scanning of a beam

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To obtain large single-crystallized area by irradiating laser beam or the like to a semiconductor layer on a main surface of an insulating layer on which cavities or projections are formed so as to fuse the polycrystalline or amorphous semiconductor layer and to recrystallize it. CONSTITUTION:Surface of an insulator layer 12 consisting of silicon dioxide film is coated with photoresist and printed a pattern of streak grooves by usual photolithography method followed by removal to form a mask 31. After that, the insulator layer 12 is etched by reactive ion etching using the mask 31 which is then removed. Next, a semiconductor layer 13 consisting of polycrystalline silicon is formed on main surface of the insulator layer 12 by chemical gas phase growing method and successively an insulator layer 15 consisting of silicon nitride film is formed. This layer 15 is coated with photoresist and a resist pattern is formed by photolithography method and further the layer 15 at the position opposite to a projection 21 and a recession 22 on the main surface of the insulator layer 12 is left by reactive ion etching. For recrystallization of polycrystalline silicon forming the semiconductor layer 13, laser beam of continuous ocillation is irradiated from the upper to recrystallize the irradiated parts by the laser beam of the polycrystalline silicon.

Description

【発明の詳細な説明】 この発明は絶縁物層上に半導体の単結晶層を形成する半
導体単結晶膜の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor single crystal film in which a semiconductor single crystal layer is formed on an insulating layer.

最近、絶縁層、特に二酸化シリコン膜上にシリコン単結
晶膜を得る技術は８口（Ｓｉｌｉｃｏｎ　ｏｎより一５
ｕ１ａｔｏｎ）技術と呼はれ、その単結晶膜はｓＯ工と
呼はれて注目されている。これは、従来がら絶縁物上の
シリコン結晶として用いられているＳＯＳ　（Ｓｉｌｉ
ｃｏｎ　ｏｎ　５ａｐｐｈｉｒｅ）が非常に尚速の０Ｍ
０８回路に最適と言われながら、旨価格と、本質的なシ
リコン−サファイヤ界面の結晶性の悪さが改善されない
ことに対し、ｓＯ工ではＳＯＳの良さを生がしつつ、低
価格および界面特性の大きな改善が可能であることに起
因しているものである。Recently, the technology for obtaining a silicon single crystal film on an insulating layer, especially a silicon dioxide film, has been developed.
The single crystal film is called SO technology and is attracting attention. This is SOS (Silicon), which has traditionally been used as silicon crystal on an insulator.
con on 5apphire) is very fast 0M
Although it is said to be ideal for 08 circuits, it is expensive and does not improve the inherent poor crystallinity of the silicon-sapphire interface.In contrast, the SO process takes advantage of the advantages of SOS, but is also low cost and has excellent interface characteristics. This is due to the fact that major improvements are possible.

しかるに、このＳｏ工でも同品質のシリコン結晶膜を二
酸化シリコン膜上の広い面積に形成することは、いまだ
困難であり、限られた面積を単結晶化する手法が確立さ
れているのみである。特に、種結晶を用いない場合は、
単結晶化のみならず、結晶粒界の位置制御することもで
きていない状況である。However, even with this SO process, it is still difficult to form a silicon crystal film of the same quality over a wide area on a silicon dioxide film, and only a method for monocrystallizing a limited area has been established. In particular, when seed crystals are not used,
The current situation is that not only single crystallization but also control of the position of grain boundaries has not been achieved.

第１図は上記従来技術を用いて種結晶を用いないで、絶
縁膜上に大きな結晶粒径をもった半導体層を得たものの
一例の構造断面図であり、図において、（ＩＩ）はシリ
コン単結晶基板、（１２１はこのシリコン単結晶基板の
一生面上に熱生成によって形成された厚さ１．０μｍの
二酸化シリコン膜からなる絶縁物層、（１３）はこの絶
縁物層上に化学的気相成長方法によって６１０℃で形成
された厚さ７００ＯＡの多結晶シリコン膜からなる多結
晶半導体層、（１４）１４レーザー光が照射され、上記
多結晶半導体層（１３）が溶融再結晶化されたシリコン
層、（１６）は上記多結晶半導体層上に形成され、レー
ザー光によるこの多結晶半導体層（１３）の溶融時に多
結晶半導体層（１３）が剥離しな゛いように表面保映の
役割をはたしている厚み６０Ａの窒化シリコン膜からな
る絶縁膜、（１６）は波長４８８ＯＡ　ト５１４５Ａの
アルゴンレーザー光で、上記多結晶半導体層（１３）を
シリコン層に変換する際に用いられレーサービームスポ
ットサイズが４０μｍ程度に絞られ、パワーはＦＩＶ／
　Ｋ　調整され、図示矢印Ａ方向に走査速度１０ｃｍ／
ｓｅｃで走査されるものである。FIG. 1 is a structural cross-sectional view of an example of a semiconductor layer with a large crystal grain size obtained on an insulating film without using a seed crystal using the above-mentioned conventional technique. A single-crystal substrate, (121 is an insulating layer made of a silicon dioxide film with a thickness of 1.0 μm formed by thermal generation on the entire surface of this silicon single-crystal substrate, and (13) is a chemically insulating layer on this insulating layer. A polycrystalline semiconductor layer (14) consisting of a polycrystalline silicon film with a thickness of 700 OA formed at 610° C. by a vapor phase growth method, irradiated with 14 laser beams to melt and recrystallize the polycrystalline semiconductor layer (13). A silicon layer (16) is formed on the polycrystalline semiconductor layer, and the surface is protected so that the polycrystalline semiconductor layer (13) does not peel off when the polycrystalline semiconductor layer (13) is melted by laser light. (16) is an argon laser beam with a wavelength of 488 OA and 5145 A, which is used to convert the polycrystalline semiconductor layer (13) into a silicon layer. The spot size is narrowed down to about 40μm, and the power is FIV/
K is adjusted and the scanning speed is 10cm/in the direction of arrow A in the figure.
It is scanned in seconds.

しかるに、このように細く絞ったレーサー光（１６）で
多結晶半導体層（１３）を走査しながら＋＋ｎ　１１．
ｔシて、多結晶半導体層（１３）全シリコン層ｆ＋４）
　Ｋ変換したものにおいてに、レーザー光（！６）のレ
ーザービーム内のパワー分布に反映されるため、多結晶
半導体層（１３）内での横方向の温度分布は第２図に示
すようにビーム中央の照射をうけた部分の温度が一番關
く、中央から離れるに従い温度は下がり、ビーム周囲で
略溶融点温度に設定され、さらにビーム周辺部において
温度が低くなっているものである。従って、溶融・同化
が始まるのはビーム周辺部であり、いくつもの結晶成長
面が中央部で出合うため結晶粒界が形成され、溶融され
た領域が単結晶になることはないものである。However, while scanning the polycrystalline semiconductor layer (13) with the narrowly focused laser light (16), ++n 11.
t, polycrystalline semiconductor layer (13) total silicon layer f+4)
Since the K-converted signal is reflected in the power distribution within the laser beam (!6), the lateral temperature distribution within the polycrystalline semiconductor layer (13) changes as shown in Figure 2. The temperature of the irradiated part at the center is the most important, and the temperature decreases as you move away from the center, and the temperature around the beam is set to approximately the melting point temperature, and the temperature is lower at the periphery of the beam. Therefore, melting and assimilation begin at the periphery of the beam, and since many crystal growth planes meet at the center, grain boundaries are formed, and the melted region does not become a single crystal.

さらに、レーザー光（１Ｇ）を走査した場合は第３図に
示すようにレーザー光（１０の垂直方向Ａの中心に向か
う結晶成長が生じ、単結晶化は望めないものであった。Furthermore, when the laser beam (1G) was scanned, crystal growth occurred toward the center in the vertical direction A of the laser beam (10) as shown in FIG. 3, and single crystallization could not be expected.

な２、（１ηは結晶成長時の固液界面、（１８）は結晶
成長方向を示すものである。2, (1η is the solid-liquid interface during crystal growth, and (18) is the direction of crystal growth.

この発明は上記した点に鑑みてなされたものであり、絶
縁物層の一主面に凹部又は凸部を形成しこの四部又は凸
部が形成された絶縁物層の一生面上に多結晶又は非晶質
の半導体層を形成し、さらに半専体層表面の所望部位に
絶縁物層を形成し、この半導体層にレーザー光等を照射
して、多結晶又は非晶質の半導体層（ｉｌ−浴融、再結
晶化させるようにして、大きな単結晶化領域を得るよう
にしたものである。This invention has been made in view of the above points, and includes forming concave portions or convex portions on one principal surface of an insulating layer, and forming polycrystalline or A polycrystalline or amorphous semiconductor layer (il - A large single crystal region is obtained by bath melting and recrystallization.

以下にこの発明の一実施例を第４図ないし第８図に基つ
いて説明する。An embodiment of the present invention will be described below with reference to FIGS. 4 to 8.

まず、第４図に示すように、シリコン単結晶基板（ｌｌ
　ｆ　９５０℃の酸化雰囲気に長時間さらし、その−主
面上に厚さ１．０μｍの二酸化シリコン膜からなる絶縁
物層（１２１を形成し、この絶縁物層（１２１の表面に
フォトレジストを塗布し、通常のフォトソグラフイのｔ
法で条溝のパターン（この実施例においては幅２μｍ１
間隔８μｒｎの平行な１６不の凸状部が残されたものを
示している。）を焼きつけ、除去しマスク６υを形成す
る。その後、第５図に示すようにマスクＧυを用いて反
応性イオンエツチングにより約２００ＯＡの深さに絶縁
物層（１２Ｉをエツチングし、マスクの１）を除去する
。この時、絶縁物層（１２１の主面に゛ある。次Ｇて、
第６図に示すようして、このｒ色縁物層（１２１の主面
上に化学的気相成長法により厚さ７０００Ａの多結晶シ
リコンからなる半導体層（１３）を形成し、続い−て厚
さ６５０人の窒化シリコン膜からなる絶縁物層（１６１
を形成する。そして、この絶−緑物層（１５）上にフォ
トレジストヲ塗布し、フォトソクラフィの手法で、レジ
ストパターンを形成し、さらに反応性イオンエツチング
によって上記絶縁物（１２）の主面上の凸部シυ凹部（
イ）に対向する位置の絶縁物層（１６）全残存させる。First, as shown in FIG.
f Exposure to an oxidizing atmosphere at 950°C for a long time, form an insulating layer (121) made of a silicon dioxide film with a thickness of 1.0 μm on the main surface, and apply photoresist on the surface of this insulating layer (121). t of normal photolithography
According to the method, the groove pattern (in this example, the width is 2 μm1)
It shows what remains of 16 parallel convex portions with an interval of 8 μrn. ) is burned and removed to form a mask 6υ. Thereafter, as shown in FIG. 5, the insulating layer (12I of the mask) is removed by reactive ion etching to a depth of about 200 OA using the mask Gυ. At this time, the insulating layer (on the main surface of 121)
As shown in FIG. 6, a semiconductor layer (13) made of polycrystalline silicon having a thickness of 7000 Å is formed on the main surface of this r-color edge layer (121) by chemical vapor deposition, and then An insulating layer consisting of a silicon nitride film with a thickness of 650 mm (161 mm)
form. Then, a photoresist is applied on this insulating material layer (15), a resist pattern is formed by photolithography, and the convexities on the main surface of the insulating material (12) are formed by reactive ion etching. Part si υ recess (
The insulator layer (16) at the position opposite to (b) is entirely left.

そして半導体層（１３）である多結晶シリコンを再結晶
化させるため、波長４８ＢＯＡおよび５１４５人の連続
発振のレーザー光をおよそレーザービームスポット５０
μｍ程度の絞り、４〜５Ｗ、（７）　／＜　＋７−　テ
絶縁物層（Ｉ５）の上方から照射して、第８図に示すよ
うに多結晶シリコンのレーザー光照射部分を再結晶化サ
セル。この時、レーザー光の走査方向は絶縁物層（１２
）における凸部■υ及び凹部＠に対して平行方向に行な
い、その速度は１００ｍ／６θＣビームの重ね合（１）
は５〜１０％程贋となるよう、レーザー光の走査ごとの
移動距離は４０μｍ　ＶＣｌ、である。なお、第８図に
おいて、（１４）は多結晶シリコンの再結晶さ示す左右
方向の熱分布は第９図に示すように絶縁物層（Ｉ２）に
おける凸部Ｑυに対向する部位の温度が高く、凹部（４
）に対向する部位の温度が低くなるものである。In order to recrystallize the polycrystalline silicon that is the semiconductor layer (13), a continuous wave laser beam with a wavelength of 48 BOA and 5,145 beams is applied to the laser beam spot of approximately 50 mm.
Aperture on the order of μm, 4-5W, (7) . At this time, the scanning direction of the laser beam is set to the insulating layer (12
) in the direction parallel to the convex part ■υ and the concave part @, and the speed is 100 m/6θC beam superposition (1)
The moving distance of the laser beam for each scan is 40 μm VCl so that the number of errors is about 5 to 10%. In addition, in FIG. 8, (14) indicates recrystallization of polycrystalline silicon.The heat distribution in the left and right direction indicates that the temperature of the portion facing the convex portion Qυ in the insulator layer (I2) is high, as shown in FIG. , recess (4
) The temperature of the area facing the area becomes lower.

このことは、先ずレーザー光自身のノくワー分布が半導
体層（１３）である多結晶シリコン層内部に生じさせる
熱分布を表面にコートされた絶縁物層（１６）である窒
化シリコン膜により平均化されること、従って第２に絶
縁物層（１２）の厚みの差による溶融カニ生じるレーザ
ー光のパワーの域値の差が大きく影響するようになり、
絶縁物層（１２１における凸部■υに対向する部位では
温度が凋〈なり凹部（ハ）に対向する部位ではそれより
も低い温度となるのである。このため、レーザー光によ
る半導体層（１３［おける結晶成長は第１０図に示すよ
うに温度が低い部分（凹部（４）に対向する部位）から
高い部分（凸部Ｑジに対向する部位）へと常に起ること
になり、凹部轍に対向する半一：４体層（１３）である
多結晶シＩＪコン内では常しこ第１０図図示において前
方外側へ結晶成長が生じて単結晶となり、凸部Ｉ２１）
に対向する多結晶させた場合の半導体層（圃が溶融する
に必要なレーザー光のレーザーパワーを調べた結果を承
すものである。この図から明らかなように絶縁物層（１
２１が厚いほど低いレーザーパワーで半導体層（１３）
を溶融でき、つまり同一のレーザーパワーにあっては絶
縁物層（１２１が厚いほど誦温になることがわかる。First of all, the heat distribution generated inside the polycrystalline silicon layer which is the semiconductor layer (13) by the thermal distribution of the laser beam itself is averaged by the silicon nitride film which is the insulator layer (16) coated on the surface. Therefore, secondly, the difference in the threshold power of the laser beam that causes melting crabs due to the difference in the thickness of the insulating layer (12) has a large influence.
The temperature decreases in the portion of the insulating layer (121) facing the convex portion ■υ, and the temperature decreases in the portion facing the concave portion (c).For this reason, the temperature of the semiconductor layer (13 [ As shown in Fig. 10, crystal growth always occurs from the lower temperature part (the part facing the recess (4)) to the higher temperature part (the part facing the convex part Qji). In the polycrystalline silicon IJ which is the opposing half-1:4 body layer (13), crystal growth occurs forward and outward as shown in Figure 10, resulting in a single crystal, and the convex portion I21)
This is based on the results of a study on the laser power of the laser beam required to melt the semiconductor layer (field) in the case of a polycrystalline semiconductor layer facing the insulating layer (1
The thicker 21 is, the lower the laser power is for semiconductor layer (13)
In other words, with the same laser power, the thicker the insulating layer (121), the higher the temperature.

したがって、上記実施例において、絶縁物層（Ｉ２１に
おける凸部（２］）に対向する部位の温１νが制＜、凹
部＠に対向する部位の温度が低くなることが理解されよ
う。Therefore, it will be understood that in the above embodiment, when the temperature 1v of the portion facing the insulating layer (the convex portion (2) in I21) is controlled, the temperature of the portion facing the concave portion @ becomes lower.

なお、上記実施例において、−主面上に凹凸部■υ（４
）を有した絶縁物層（１２Ｉ上に半導体層（＋３）を形
成して、この半導体層（１３）をレーザー光によって再
結晶化する原理は、いわゆるグラフオエピタキシーでは
ないので、再結晶の結果得られる結晶性は凸部Ｑυ又は
凹部（イ）の形状には左右されないものであるから、凸
部を格子状に設けても良いものである。Note that in the above embodiment, there is an uneven portion ■υ (4
) The principle of forming a semiconductor layer (+3) on an insulator layer (12I) and recrystallizing this semiconductor layer (13) with laser light is not so-called grapho-epitaxy, so the result of recrystallization is Since the crystallinity obtained is not affected by the shape of the convex portions Qυ or the concave portions (a), the convex portions may be provided in a lattice shape.

また、凸部（２υ又は凹部（イ）の相互間隔も、結晶成
長論的な尺麿から決められるものではなく、レーザー光
のスポットサイズとパワー分布全平滑化できる最上層の
絶縁物層（１５）の特性によってのみ決定るグラフオエ
ピタキシーでは実現されない大結晶粒が得られることを
示したが、凸部ＣＤ相互間隔が２ｆｉｍと小さなもので
も、半導体層（＋３）を単結晶化できるものであること
は言うまでもないことである。In addition, the mutual spacing between the convex portions (2υ) or the concave portions (A) is not determined from the theory of crystal growth, but rather the uppermost insulating layer (15 ) It was shown that large crystal grains, which cannot be achieved with graphoepitaxy, which is determined only by the characteristics of This goes without saying.

さらに、上記実施例では、半導体層（１３）を再結晶化
するにあたり、一方向において制限のない場合金示した
が、第１２図（Ａ）（ｌｊに示すように半導体層（１３
）の一部分のみを再結晶化する場合とけ、再結晶化する
部位相当部における絶）浸物層（Ｉ２）の−主表面に四
部＠全形成し、この絶縁物層（１２Ｉにおける凹部（２
）対向部位に絶ｉｔ物層（１５）を形成して、レーザー
光を長手方向に走査して照射１〜、半導体層θ３）の再
結晶化を行なっても同様の効果を公するものである。Further, in the above embodiment, when recrystallizing the semiconductor layer (13), gold was shown when there was no restriction in one direction, but as shown in FIG.
), four parts are formed on the entire main surface of the dipping layer (I2) in the area corresponding to the recrystallized area, and the recesses (2) in this insulating layer (12I)
) A similar effect can be obtained even if an insulator layer (15) is formed on the opposing portion and the laser beam is scanned in the longitudinal direction to irradiate 1 to 3) and recrystallize the semiconductor layer θ3). .

また、上記第１２図（Ａ）　（Ｂ）に示すものの凹部（
２）におけるパターン幅がレーザー光のレーザービーム
スポットサイズより大きい場合には、第１３図（Ａ）（
Ｂ）　（ｃ）に示すように、絶縁物層（１２１における
凹部（イ）内に長手方向に沿って相互間隔がレーザービ
ームスポットサイズより小さくなるように直線状の凸部
？１）を設け、長手方向にレーザー光を照射して半導体
層（１３）の再結晶化を行なっても同様の効果を奏すも
良く、またレーザー光のかわりに電子ビームあるいは強
力なラング光であっても臼いものである。In addition, the recesses (
If the pattern width in 2) is larger than the laser beam spot size of the laser beam, the pattern width in FIG. 13(A) (
B) As shown in (c), linear convex portions (1) are provided in the recesses (A) in the insulating layer (121) along the longitudinal direction so that the mutual spacing is smaller than the laser beam spot size, The same effect may be obtained by recrystallizing the semiconductor layer (13) by irradiating the semiconductor layer (13) with a laser beam in the longitudinal direction, and even if an electron beam or strong Lang light is used instead of the laser beam, it will not be possible to achieve the same effect. be.

この発明は以上に述べたように、絶縁物層上に半導体の
単結晶層ヶ形成する製造方法において、絶縁物層の一生
表面に四部又は凸部を形成し、少なくともこの四部又は
凸部に対向する半導体層上に表面保穫膜として絶縁物層
全形成し、レーザー光、電子ビーム、あるいは強力々ラ
ング光を照射して半導体層の再結晶化を行なったので、
絶縁物層の厚みの変化により熱分布の制御ができ、かつ
表面保護膜としての絶縁物層がレーザー光、電子ビーム
、あるいけ強力なラング光自身の゛パワー分布を平均化
できるため、種のない絶縁物層上において、容易にかつ
面品質で、しかも大きな結晶粒径をもった単結晶半導体
層が得られるという効果があるものである。As described above, the present invention provides a manufacturing method in which a single crystal layer of semiconductor is formed on an insulating layer, in which four parts or convex parts are formed on the entire surface of the insulating material layer, and at least four parts or convex parts are formed opposite to the four parts or convex parts. The entire insulating layer was formed as a surface protection film on the semiconductor layer, and the semiconductor layer was recrystallized by irradiation with laser light, electron beam, or powerful Lang light.
The heat distribution can be controlled by changing the thickness of the insulating layer, and the insulating layer as a surface protective film can even out the power distribution of laser light, electron beams, and even the powerful Lang light itself, making it possible to This has the effect that a single-crystal semiconductor layer having a large crystal grain size can be easily obtained on an insulating layer with high surface quality and a large crystal grain size.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来の絶縁膜上でレーザーによる多結晶シリコ
ンの再結晶化によって４１峙晶を′４た場合の構造断面
図、第２図はレーザーが照射された多結晶シリコン層内
の温度分布を示す図、第３図は第４図ないし第８図に基
づいて製造されたものにおける多結晶シリコン層内の温
度分布を示す図、第１０図は第４図ないし第８図に示す
実施例における多結晶シリコン層の結晶成長方向を示す
図、第１１図は絶縁物層（１２１の厚みに対する多結晶
シリコンの解融するレーザーパワーの関係を示す図、第
１２図（Ａ）　（Ｂ）はそれぞれこの発明の他の実施例
を示す構造断面図及び平面図、第１３図（Ａ）　（Ｂ）
　（ｃ）はそれぞれこの発明のさらに他の実施例を示す
構造断面図、平面図、及びＣ−ａ断面図である。 図において、（１１）はシリコン基板、ｇ２＋は絶縁物
層、（Ｉ３）は半導体層、（１４）は溶触、再結晶化さ
れたシリコン層、（１５）は表面保護のための絶縁物層
、（１６）は連続発振のレーザー光、（８υは凸部、（
４）は四部である。 出願人　　工業技術院長　石板誠− 第１図 第３図 第４図 第６図 第７図 第８図 イｉＬ工 第１０し１Figure 1 is a cross-sectional view of the structure when a 41 diagonal crystal is formed by recrystallizing polycrystalline silicon using a laser on a conventional insulating film. Figure 2 is the temperature distribution within the polycrystalline silicon layer irradiated with the laser. FIG. 3 is a diagram showing the temperature distribution in the polycrystalline silicon layer manufactured based on FIGS. 4 to 8, and FIG. 10 is the embodiment shown in FIGS. 4 to 8. FIG. 11 is a diagram showing the relationship between the laser power for melting polycrystalline silicon and the thickness of the insulating layer (121). FIGS. 12 (A) and (B) are 13A and 13B are structural cross-sectional views and plan views showing other embodiments of the present invention, respectively.
(c) is a structural cross-sectional view, a plan view, and a C-a cross-sectional view showing still other embodiments of the present invention, respectively. In the figure, (11) is a silicon substrate, g2+ is an insulating layer, (I3) is a semiconductor layer, (14) is a melted and recrystallized silicon layer, (15) is an insulating layer for surface protection, (16) is a continuous wave laser beam, (8υ is a convex part, (
4) is in four parts. Applicant Makoto Ishiita, Director of the Agency of Industrial Science and Technology

Claims (3)

【特許請求の範囲】[Claims] （１）絶縁物層の一生面に凹部又は凸部全形成する工程
、この四部又は凸部が形成された絶縁物層の一生面上に
多結晶又は非晶質の半導体層を形成する工程、この半導
体層上の少なくとも上記凹部又は凸部と対向する位置に
絶縁物層を形成する工程、連続発振のレーザー光、電子
ビーム、又ハ強力なラング光を照射し、絶縁物層の四部
又は凸部上の多結晶又は非晶質の半導体層を溶融、再結
晶させる工程を具備した半導体単結晶膜の製造方法。(1) A step of forming all the concave portions or convex portions on the whole surface of the insulating material layer, a step of forming a polycrystalline or amorphous semiconductor layer on the whole surface of the insulating material layer on which the four portions or the convex portions are formed, A step of forming an insulating layer on the semiconductor layer at least at a position facing the concave or convex portions, irradiating the insulating layer with a continuous wave laser beam, an electron beam, or a strong Lang light, A method for producing a semiconductor single crystal film, comprising a step of melting and recrystallizing a polycrystalline or amorphous semiconductor layer on the part. （２）絶縁物層の一生面上に゛形成される凹部又は凸部
は直線状に形成されるとともに、凹部又は凸部は火数個
有し、かつ、連続発振のレーザー光。 電子ビーム、又は強力なラング光の走査方向は上記凹部
又は凸部と平行な方向としたことを特徴とする特許請求
の範囲第１項記載の半導体単結晶膜の製造方法。(2) The recesses or protrusions formed on the entire surface of the insulating layer are formed in a straight line, and the recesses or protrusions have several numbers, and a continuous wave laser beam is used. 2. The method of manufacturing a semiconductor single crystal film according to claim 1, wherein the scanning direction of the electron beam or the strong rung light is parallel to the concave or convex portions. （３）絶縁物層の一生面上に形成される凹部又は凸部は
格子状に形成されたことを特徴とする特許請求の範囲第
１項記載の半導体単結晶膜の製造方法。(3) The method for manufacturing a semiconductor single crystal film according to claim 1, wherein the concave portions or convex portions formed on the entire surface of the insulating layer are formed in a lattice shape.
JP57227592A 1982-12-28 1982-12-28 Fabrication of semiconductor single crystal film Pending JPS59121826A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57227592A JPS59121826A (en) 1982-12-28 1982-12-28 Fabrication of semiconductor single crystal film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57227592A JPS59121826A (en) 1982-12-28 1982-12-28 Fabrication of semiconductor single crystal film

Publications (1)

Publication Number Publication Date
JPS59121826A true JPS59121826A (en) 1984-07-14

Family

ID=16863331

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57227592A Pending JPS59121826A (en) 1982-12-28 1982-12-28 Fabrication of semiconductor single crystal film

Country Status (1)

Country Link
JP (1) JPS59121826A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62206817A (en) * 1986-03-07 1987-09-11 Agency Of Ind Science & Technol Semiconductor device
JPH01281735A (en) * 1988-05-07 1989-11-13 Fujitsu Ltd Manufacture of gettering source

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62206817A (en) * 1986-03-07 1987-09-11 Agency Of Ind Science & Technol Semiconductor device
JPH01281735A (en) * 1988-05-07 1989-11-13 Fujitsu Ltd Manufacture of gettering source

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