JPS6017911A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6017911A
JPS6017911A JP58124694A JP12469483A JPS6017911A JP S6017911 A JPS6017911 A JP S6017911A JP 58124694 A JP58124694 A JP 58124694A JP 12469483 A JP12469483 A JP 12469483A JP S6017911 A JPS6017911 A JP S6017911A
Authority
JP
Japan
Prior art keywords
semiconductor layer
layer
film
island shape
nitride film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58124694A
Other languages
Japanese (ja)
Inventor
Kazuyuki Sugahara
和之 須賀原
Yoichi Akasaka
洋一 赤坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP58124694A priority Critical patent/JPS6017911A/en
Publication of JPS6017911A publication Critical patent/JPS6017911A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02491Conductive materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02598Microstructure monocrystalline
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02689Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To obtain a uniform single-crystal layer over a whole semiconductor layer by providing a film which reflects infrared rays or visual light rays on an insulator beneath the semiconductor layer. CONSTITUTION:A nitride film 4 is deposited on an insulating substrate 1 and a resist 6 is applied on the film 4 along the peripheral part of a domain in which an island shape semiconductor layer is to be formed. When the resist 6 is removed after etching, the nitride film 4 remains along the peripheral part of the island shape semiconductor layer. Polycrystalline silicon is deposited to form the island shape semiconductor layer. A laser beam is applied to the island shape polycrystalline silicon layer 2 along the longer side direction. Because the nitride film has a larger refractive index than an oxide film, it reflects thermal rays (infrared rays and visual light rays) from smelted silicon layer so that the heat is not discharged from the polycrystalline silicon layer 2. Therefore, the silicon of the peripheral part of the semiconductor layer is kept at higher temperature than that of the center part and the growth from random nuclei is suppressed so that the whole island of the semiconductor layer is single-crystallized.

Description

【発明の詳細な説明】 この発明は半導体装置の製造方法、特に絶縁体上に半導
体単結晶膜を形成する方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming a semiconductor single crystal film on an insulator.

従来、この種半導体装置の製造方法について、半導体装
置の高速化、高密度化のため、半導体活性層を多数積層
するいわゆる二次元回路素子を製造する試みがなさ扛て
おり、そのため、誘電体上に半導体単結晶質?形成する
方法が考えられている。この誘電体上に半導体単結晶を
形成する方法として、絶縁体上に多結晶または非晶質の
半導体を堆積し、その表面にレーザ光、電子線などのエ
ネルギー線を照射することにより表面層のみを加熱し、
融解して、単結晶の半導体膜を形成する方法があった。
Conventionally, with regard to the manufacturing method of this type of semiconductor device, there has been no attempt to manufacture so-called two-dimensional circuit elements in which many semiconductor active layers are laminated in order to increase the speed and density of semiconductor devices. Semiconductor single crystal? A method of forming it is being considered. The method of forming a semiconductor single crystal on this dielectric is to deposit a polycrystalline or amorphous semiconductor on an insulator, and then irradiate the surface with energy beams such as laser light or electron beams, so that only the surface layer can be formed. heat the
There was a method of melting to form a single crystal semiconductor film.

を7000X堆積する0次に第1図(C)に示すように
950℃で酸化して酸化膜(3)を形成した後、減圧C
VD法による窒化膜(4)全堆積し、写真製版による窒
化膜(4)のパターニングを行う。さらに950C酸化
雰囲気中に長時間さらした後、パターニングさ扛た窒化
膜(4)及び酸化膜(3)を除去すると、第1図(d)
に示すように、基板(1)上に多結晶または非晶質の半
導体、この場合はポリシリコン、が形成される。(5)
は酸化されたポリシリコン層である。
Next, as shown in Figure 1 (C), oxidize at 950°C to form an oxide film (3), and then oxidize at a reduced pressure of C.
A nitride film (4) is entirely deposited by the VD method, and patterned by photolithography. After further exposure to a 950C oxidation atmosphere for a long time, the patterned nitride film (4) and oxide film (3) are removed, as shown in Figure 1(d).
As shown in FIG. 1, a polycrystalline or amorphous semiconductor, in this case polysilicon, is formed on a substrate (1). (5)
is an oxidized polysilicon layer.

第1図(e)は第11m1(d)の平面図を示す。次に
第1図(e)の島状のポリシリコン層(2)に短辺の1
倍から2倍程度のスポットに絞ったレーザ光をパターン
の長手方向に走査しながら照射する。この時、ポリシリ
コン層(2)は溶融し、照射後固化すると同時に再結晶
化する。さらにこのポリシリコンの再結晶化層にM O
S )ヲンジスタを公知のプロセンで形成する。
FIG. 1(e) shows a plan view of No. 11m1(d). Next, the island-shaped polysilicon layer (2) shown in FIG.
A laser beam narrowed to a spot about twice to twice as large is irradiated while scanning in the longitudinal direction of the pattern. At this time, the polysilicon layer (2) is melted, solidified after irradiation, and simultaneously recrystallized. Furthermore, M O is added to this polysilicon recrystallized layer.
S) Form the resistor using known prosene.

ところがかかる従来の方法において、使用されるレーザ
光の強度分布が中心部が強く周辺部が弱いといういわゆ
るガウス型分布のため、照射を受けたポリシリコン島の
温度分布は、中央部が高く、下の絶縁体に接して赤外線
または可視光線に対する反射膜を設けることによって、
上記半導体層の周辺部において熱が逃げにくくなるので
、ガウス型分布のレーザ光等に対しても上記半導体層全
体に亘って均一な単結晶層を形成しうる新規な半導体装
置の製造方法を提供するものである。
However, in this conventional method, the intensity distribution of the laser beam used is a so-called Gaussian distribution in which the intensity is strong in the center and weak in the periphery, so the temperature distribution of the irradiated polysilicon island is high in the center and low in the bottom. By providing a reflective film for infrared or visible light in contact with the insulator,
Provided is a novel method for manufacturing a semiconductor device that can form a uniform single crystal layer over the entire semiconductor layer even with a Gaussian distribution laser beam, etc., since heat is difficult to escape in the peripheral area of the semiconductor layer. It is something to do.

以下、この発明の一実施例を図に基づいて説明する。第
2図4a)において、(1)は基板となるべき石英基板
(Jot)である。第2図(b)に示すように窒化膜(
Si、N、) (4)金100OA堆積して、将来島状
半導体層を作成するべき領域の周辺部に相当する部分に
レジスト(5)を塗布する。次に反応性イオンエツチン
グ法により、半導体層の周辺部に相当する部分以下をエ
ツチングする。しかる後レジスト(6)を除去すると、
第2図(c)に示すように・島状半導体層の周辺部に相
当する部分にのみ窒化膜(4)が残る。しかる後、従来
の方法と同様に、ポリシリコンを堆積し、島状半導体層
を作成したのが第2図(d)である。第2図1(e)は
第2[9(d)の平面図を表わす。しかる後レーザ光を
島状ポリシリコン層の長コン層から逃げないようになる
。そのため半導体層の周辺部のシリコンは中央部より高
温に保たれる。したがって同化は中央部から周辺部に向
って起こるので、ランダムな核からの成長が抑えられて
半導体層の島全体が単結晶になる。
Hereinafter, one embodiment of the present invention will be described based on the drawings. In FIG. 2 4a), (1) is a quartz substrate (Jot) that is to be a substrate. As shown in Figure 2(b), the nitride film (
(Si, N,) (4) 100 OA of gold is deposited and a resist (5) is applied to a portion corresponding to the periphery of the region where an island-shaped semiconductor layer is to be formed in the future. Next, a portion below the peripheral portion of the semiconductor layer is etched using a reactive ion etching method. After that, when the resist (6) is removed,
As shown in FIG. 2(c), the nitride film (4) remains only in a portion corresponding to the peripheral portion of the island-shaped semiconductor layer. Thereafter, as in the conventional method, polysilicon was deposited to form an island-shaped semiconductor layer, as shown in FIG. 2(d). FIG. 2(e) shows a plan view of the second [9(d)]. Thereafter, the laser beam is prevented from escaping from the long contact layer of the island-shaped polysilicon layer. Therefore, the silicon at the periphery of the semiconductor layer is kept at a higher temperature than at the center. Therefore, since assimilation occurs from the center toward the periphery, growth from random nuclei is suppressed and the entire semiconductor layer island becomes a single crystal.

なお上記実施例では、反射膜として異種の絶縁体の界面
を利用したが、第8図に示すように1絶縁体上にモリブ
デン(Mo) やタングステン(ト)等の薄い金属膜(
7)ヲ設けても、また第4図のように絶縁体内に埋め込
んでも(ロ)様の効果が得られる。
In the above embodiment, the interface between different types of insulators was used as the reflective film, but as shown in Fig. 8, a thin metal film (Mo), tungsten (T), etc.
Even if 7) is provided, or even if it is embedded in an insulator as shown in FIG. 4, the effect shown in (b) can be obtained.

以上のように、この発明は半導体層の周辺部下の絶縁体
に接して熱線に対する反射膜を形成したので、半導体層
の周辺部の熱が逃げにくくなり、半導体層全体に亘って
均一な単結晶の半導体層金錫ることができる。
As described above, this invention forms a reflective film against heat rays in contact with the insulator below the periphery of the semiconductor layer, making it difficult for heat to escape from the periphery of the semiconductor layer, resulting in uniform single crystal formation throughout the semiconductor layer. The semiconductor layer can be gold-tin.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(d)は従来の半導体装置の製造方法を
示す断面図、第1図(e)は第1図(d)の平面図、第
2図(a) ?’ (d)はこの発明の一実施例を示す
断面図、第2[9(e)は第2図(d)の平面図、第8
図及び第4(2)は図において、(1)は絶縁体(また
は石英) 、 (2)はポリシリコン層、(3)は酸化
膜、(4)は窒化膜、(5)はポリシリコンの酸化膜、
(6)はレジスト、(7)は金属膜である。 出願人 工業技術院長 川田裕部 第1図 第2図 第3区 来 51− 7
1(a) to 1(d) are cross-sectional views showing a conventional method of manufacturing a semiconductor device, FIG. 1(e) is a plan view of FIG. 1(d), and FIG. 2(a). ' (d) is a cross-sectional view showing one embodiment of the present invention, No. 2 (e) is a plan view of FIG.
In the figure and No. 4 (2), (1) is an insulator (or quartz), (2) is a polysilicon layer, (3) is an oxide film, (4) is a nitride film, and (5) is a polysilicon layer. oxide film,
(6) is a resist, and (7) is a metal film. Applicant Hirobe Kawada, Director of the Agency of Industrial Science and Technology, Figure 1, Figure 2, Ward 3, 51-7

Claims (1)

【特許請求の範囲】[Claims] (1) 絶縁体上に周囲が絶縁物によって囲ま扛た多結
晶または非晶質の半導体層を形成し、この半導体層の中
央部に沼ってレーザ光または電子ビームを照射せしめて
上記半導体層を結晶化する方法型の製造方法。
(1) A polycrystalline or amorphous semiconductor layer surrounded by an insulator is formed on an insulator, and a laser beam or an electron beam is irradiated to the center of the semiconductor layer to form the semiconductor layer. Method of crystallizing mold manufacturing method.
JP58124694A 1983-07-11 1983-07-11 Manufacture of semiconductor device Pending JPS6017911A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58124694A JPS6017911A (en) 1983-07-11 1983-07-11 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58124694A JPS6017911A (en) 1983-07-11 1983-07-11 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6017911A true JPS6017911A (en) 1985-01-29

Family

ID=14891772

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58124694A Pending JPS6017911A (en) 1983-07-11 1983-07-11 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6017911A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS627111A (en) * 1985-07-03 1987-01-14 Agency Of Ind Science & Technol Manufacture of semiconductor single crystal layer
JPS6464182A (en) * 1987-09-03 1989-03-10 Hitachi Maxell Tape cartridge
JPH04108138U (en) * 1991-02-12 1992-09-18 神鋼電機株式会社 Exhaust gas treatment equipment in co-generation system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814525A (en) * 1981-07-17 1983-01-27 Fujitsu Ltd Manufacturing semiconductor device
JPS5821319A (en) * 1981-07-30 1983-02-08 Fujitsu Ltd Annealing by laser
JPS5880831A (en) * 1981-11-10 1983-05-16 Fujitsu Ltd Manufacture of substrate for semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5814525A (en) * 1981-07-17 1983-01-27 Fujitsu Ltd Manufacturing semiconductor device
JPS5821319A (en) * 1981-07-30 1983-02-08 Fujitsu Ltd Annealing by laser
JPS5880831A (en) * 1981-11-10 1983-05-16 Fujitsu Ltd Manufacture of substrate for semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS627111A (en) * 1985-07-03 1987-01-14 Agency Of Ind Science & Technol Manufacture of semiconductor single crystal layer
JPH0351290B2 (en) * 1985-07-03 1991-08-06 Kogyo Gijutsuin
JPS6464182A (en) * 1987-09-03 1989-03-10 Hitachi Maxell Tape cartridge
JPH04108138U (en) * 1991-02-12 1992-09-18 神鋼電機株式会社 Exhaust gas treatment equipment in co-generation system

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