JPH0722120B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

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Publication number
JPH0722120B2
JPH0722120B2 JP59132571A JP13257184A JPH0722120B2 JP H0722120 B2 JPH0722120 B2 JP H0722120B2 JP 59132571 A JP59132571 A JP 59132571A JP 13257184 A JP13257184 A JP 13257184A JP H0722120 B2 JPH0722120 B2 JP H0722120B2
Authority
JP
Japan
Prior art keywords
film
single crystal
silicon film
semiconductor layer
crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59132571A
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Japanese (ja)
Other versions
JPS6112019A (en
Inventor
良一 向井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
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Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59132571A priority Critical patent/JPH0722120B2/en
Publication of JPS6112019A publication Critical patent/JPS6112019A/en
Publication of JPH0722120B2 publication Critical patent/JPH0722120B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02516—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683—Continuous wave laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691—Scanning of a beam

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 ［産業上の利用分野］ 本発明は半導体装置の製造方法のうち、特にSOI構造半
導体装置における島状半導体層のビームアニール方法に
関する。Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a beam annealing method for an island-shaped semiconductor layer in an SOI structure semiconductor device.

半導体集積回路（IC）はLSI,VLSIと二次元（平面的）領
域で微細化，高集積化されてきたが、その微細化にも限
度があつて、それを更に高集積化するための手段とし
て、現在、立体的に積み上げる三次元LSIが大きくクロ
ーズアップしてきている。Semiconductor integrated circuits (ICs) have been miniaturized and highly integrated in two-dimensional (planar) areas with LSIs and VLSIs, but there is a limit to the miniaturization, and means for further high integration. As a result, three-dimensional LSIs that are stacked three-dimensionally are now in the spotlight.

このような三次元LSIの基礎となるのが、SOI（Silicon
On Insulator）構造の半導体素子であつて、それは、絶
縁基板上に非単結晶性半導体層を被着し、ビームアニー
ルして単結晶化し、その島状にした単結晶半導体層に素
子を形成する方法によつて作成される。SOI (Silicon) is the basis of such 3D LSI.
On Insulator) semiconductor device, in which a non-single crystal semiconductor layer is deposited on an insulating substrate, beam-annealed to single crystal, and the device is formed on the island-shaped single crystal semiconductor layer. Created by the method.

かくして、このような半導体素子が絶縁膜を介して多層
に積み上げられて三次元LSIに形成されるが、上記のビ
ームアニールして単結晶化する工程は特に重要で、出来
るだけ結晶品質の良い単結晶半導体層が形成されること
が要望されている。Thus, such a semiconductor element is stacked in multiple layers via an insulating film to form a three-dimensional LSI. The above-described step of beam annealing for single crystallization is particularly important, and a single crystal with a crystal quality as good as possible is used. It is desired that a crystalline semiconductor layer be formed.

［従来の技術］ ところで、従来の島状の単結晶半導体層を形成する方法
を説明すると、その一実施例を第２図に示している。そ
れは、シリコン基板１の上面に二酸化シリコン（SiO2）
膜２を形成し、その上に非単結晶性のシリコン膜３を化
学気相成長（CVD）法によつて被着させる。尚、非単結
晶性のシリコン膜とは多結晶シリコン膜，アモルファス
シリコン膜などのことである。[Prior Art] By the way, a conventional method for forming an island-shaped single crystal semiconductor layer will be described. One example thereof is shown in FIG. It is made of silicon dioxide (SiO 2 ) on the upper surface of the silicon substrate 1.
A film 2 is formed, and a non-single crystalline silicon film 3 is deposited on the film 2 by a chemical vapor deposition (CVD) method. The non-single-crystal silicon film is a polycrystalline silicon film, an amorphous silicon film, or the like.

次いで、非単結晶性シリコン膜の上から連続アルゴンレ
ーザ（CW−Ar Laser）ビームをスキャンニング（走査）
して加熱し、それを単結晶シリコン膜３に変成させる。
この場合、例えば、シリコン膜の表面に帯状の窒化シリ
コン（Si3N4）膜４を図示のように形成し、このSi3N4膜
を反射防止膜として、レーザビームを走査（紙面に垂直
方向に走査）する。そうすると、結晶品質の良い単結晶
シリコン膜の作成が容易になる。Next, a continuous argon laser (CW-Ar Laser) beam is scanned from above the non-single crystalline silicon film.
Then, the single crystal silicon film 3 is transformed by heating.
In this case, for example, a band-shaped silicon nitride (Si 3 N 4 ) film 4 is formed on the surface of the silicon film as shown in the figure, and the Si 3 N 4 film is used as an antireflection film to scan with a laser beam (perpendicular to the paper surface. Scan in the direction). Then, it becomes easy to form a single crystal silicon film having good crystal quality.

しかし、上記実施例は結晶方位が一定した単結晶シリコ
ン膜を得ることは難しい。即ち、任意の結晶方位をもつ
た種（シード）が溶融した非単結晶シリコン膜内に生
じ、そのシードによつて結晶方位が決定されるから、所
定の結晶方位をもつた結晶シリコン膜を形成することが
できない。However, it is difficult to obtain a single crystal silicon film having a uniform crystal orientation in the above embodiment. That is, a seed (seed) having an arbitrary crystal orientation is generated in the melted non-single crystal silicon film, and the crystal orientation is determined by the seed, so that a crystal silicon film having a predetermined crystal orientation is formed. Can not do it.

そのため、第３図（ａ）に示す実施例のように、非単結
晶シリコン膜13の一部をシリコン基板11と接した状態に
して、ビームアニールする方法が採られている。この場
合にも、同様にSi3N4膜14を反射防止膜として用いる
が、この方法は、シリコン基板11と接している部分から
の熱の逸散が大きいために、反射防止膜の形成は特に必
要になる。尚、12はSiO2膜を示す。Therefore, as in the embodiment shown in FIG. 3 (a), a method of beam annealing in which a part of the non-single crystal silicon film 13 is in contact with the silicon substrate 11 is adopted. In this case as well, the Si 3 N 4 film 14 is similarly used as the antireflection film, but this method does not form the antireflection film because heat is largely dissipated from the portion in contact with the silicon substrate 11. Especially required. In addition, 12 shows a SiO 2 film.

本実施例では、単結晶シリコン膜13に変成した後に、島
状のシリコン膜に形成するため、フォトプロセスを用い
てパターンニングし、単結晶シリコン膜の両側部分を酸
化してSiO2膜15を生成して、第３図（ｂ）のように仕上
げる。そうすると、第２図と同様に島状の単結晶シリコ
ン膜13が形成され、而も、これが結晶方位が一定した単
結晶シリコン膜である。In this embodiment, since the island-shaped silicon film is formed after being transformed into the single crystal silicon film 13, patterning is performed using a photo process, and both sides of the single crystal silicon film are oxidized to form the SiO 2 film 15. It is generated and finished as shown in FIG. Then, an island-shaped single crystal silicon film 13 is formed as in FIG. 2, and this is a single crystal silicon film having a constant crystal orientation.

［発明が解決しようとする問題点］ しかしながら、第３図に説明した実施例の形成方法は、
上記したように熱伝導の良いシリコン基板１と接してい
るため、熱の逸散が起こつて、ビームアニールの条件や
反射防止膜の膜厚など、条件設定が大変に難しい形成方
法である。[Problems to be Solved by the Invention] However, the forming method of the embodiment described in FIG.
Since it is in contact with the silicon substrate 1 having good thermal conductivity as described above, heat is dissipated, which makes it very difficult to set conditions such as beam annealing conditions and the thickness of the antireflection film.

即ち、高パワーのレーザアニール条件を与えると、露出
したシリコン膜の領域が加熱し過ぎて、球状になつて剥
がれが起こり、低パワーのレーザアニール条件を与える
と、シリコン基板11との接触部から熱が逃げて、その部
分が十分に溶融しない。That is, when a high-power laser annealing condition is applied, the exposed region of the silicon film is overheated and peeled off into a spherical shape, and when a low-power laser annealing condition is applied, a contact portion with the silicon substrate 11 is removed. Heat escapes and the part does not melt sufficiently.

従つて、後者の実施例は一定の結晶方位をもつた単結晶
シリコン膜13が形成される方法であるにもかかわらず、
再現性に乏しくて製造歩留が余り芳しくない。本発明
は、この第３図に示す実施例のようなビームアニール方
法を用い、その問題点を解消させたビームアニール方法
を提案するものである。Therefore, although the latter embodiment is a method in which the single crystal silicon film 13 having a constant crystal orientation is formed,
The reproducibility is poor and the production yield is not very good. The present invention proposes a beam annealing method using the beam annealing method as in the embodiment shown in FIG. 3 and solving the problem.

［問題点を解決するための手段］ その問題点は、一部が単結晶体に接し、他部が絶縁体上
に設けられている非単結晶半導体層を、ビームアニール
して単結晶半導体層に変換する単結晶化アニール工程に
おいて、該非単結晶半導体層の上面に、前記ビームを吸
収して蓄熱するキャップ層を分離層を介して設け、前記
ビームを照射して加熱した前記キャップ層を熱源として
前記非単結晶半導体層を間接的に加熱し、単結晶化する
ようにした工程が含まれてなることを特徴とする半導体
装置の製造方法によって達成される。[Means for Solving the Problems] The problem is that the non-single-crystal semiconductor layer, part of which is in contact with the single crystal body and the other part of which is provided over the insulator, is subjected to beam annealing to perform the single crystal semiconductor layer. In the single crystallization annealing step for converting into a single layer, a cap layer that absorbs the beam and stores heat is provided on the upper surface of the non-single crystal semiconductor layer through a separation layer, and the cap layer that is heated by irradiating the beam is a heat source. The method for manufacturing a semiconductor device is characterized by including the step of indirectly heating the non-single-crystal semiconductor layer to single crystallize it.

［作用］ 即ち、本発明はキャップ層を設けて、そのキャップ層を
ビームアニールして加熱する、いわゆる傍熱加熱方式
で、間接的に非単結晶半導体層を一様に加熱溶融し、更
にその加熱された非単結晶半導体層が、シリコン基板と
の接触部から固化するようにして、単結晶半導体層を形
成するビームアニール方法である。[Operation] That is, the present invention indirectly heats and melts the non-single-crystal semiconductor layer uniformly by a so-called indirect heating method in which a cap layer is provided and the cap layer is beam-annealed and heated. This is a beam annealing method in which a single crystal semiconductor layer is formed by solidifying a heated non-single crystal semiconductor layer from a contact portion with a silicon substrate.

［実施例］ 以下，図面を参照して実施例によつて詳細に説明する。[Examples] Hereinafter, examples will be described in detail with reference to the drawings.

第１図（ａ）なしい（ｃ）は本発明にかかるビームアニ
ール方法の工程順断面図を示す。まず、第１図（ａ）に
示すように、シリコン基板21の上にSiO2膜22を生成して
パターンニングし、そのSiO2膜22の上に膜厚4000Å位の
非単結晶シリコン膜23（非単結晶半導体層）をCVD法で
被着する。この非単結晶シリコン膜23は両側でシリコン
基板21に接している。1 (a) and 1 (c) show sectional views in order of steps of the beam annealing method according to the present invention. First, as shown in FIG. 1A, a SiO 2 film 22 is formed and patterned on a silicon substrate 21, and a non-single-crystal silicon film 23 having a film thickness of about 4000 Å is formed on the SiO 2 film 22. (Non-single crystal semiconductor layer) is deposited by the CVD method. The non-single crystal silicon film 23 is in contact with the silicon substrate 21 on both sides.

次いで、第１図（ｂ）に示すように、非単結晶シリコン
膜の表面を高温酸化して、膜厚360ÅのSiO2膜24を生成
し、その上に膜厚800ÅのSi3N4膜25,膜厚2500Åの多結
晶シリコン膜26を、何れもCVD法で被着する。ここに、S
iO2膜24とSi3N4膜25とは分離層，多結晶シリコン膜26が
キャップ層である。Then, as shown in FIG. 1 (b), the surface of the non-single-crystal silicon film is oxidized at a high temperature to form a SiO 2 film 24 having a film thickness of 360 Å, and a Si 3 N 4 film having a film thickness of 800 Å is formed thereon. A polycrystalline silicon film 26 having a thickness of 25 and a thickness of 2500 Å is deposited by the CVD method. Where S
The iO 2 film 24 and the Si 3 N 4 film 25 are separation layers, and the polycrystalline silicon film 26 is a cap layer.

このようにして、キャップ層を被着した上面から、CWア
ルゴンレーザを照射して走査する。走査方向は紙面に垂
直な方向で、条件はシリコン基板21を約450℃に加熱
し、レーザ出力を10W,ビームスポット径を50μｍφ，走
査速度を10cm/secにする。In this way, the CW argon laser is irradiated and scanned from the upper surface on which the cap layer is deposited. The scanning direction is perpendicular to the paper surface, and the conditions are that the silicon substrate 21 is heated to about 450 ° C., the laser output is 10 W, the beam spot diameter is 50 μmφ, and the scanning speed is 10 cm / sec.

そうすると、レーザ光の照射によつて非単結晶シリコン
膜23が一様の温度に加熱され、次いで、照射後の冷却時
に、溶融したシリコン膜23はシリコン基板21との接触部
から凝固しはじめ、シリコン基板の結晶方位に沿った単
結晶シリコン膜（例えば、シリコン基板が＜111＞面の
場合には、＜111＞面をもつた単結晶シリコン膜23）が
形成される。次いで、公知のエッチング方法によつて全
面エッチングして、キャップ層と分離膜を除去し、単結
晶シリコン膜23を露出させた後、第１図（ｃ）に示すよ
うに、島状のシリコン膜に形成するために、フォトプロ
セスを用いてパターンニングし、単結晶シリコン膜23の
両側部分を酸化してSiO2膜27を生成する。そうすると、
単結晶シリコン膜23が島状領域に分離される。ここに、
公知のエッチング法とは、SiO2膜とシリコンとのエッチ
ング比の相違を利用したドライエッチング法で、例えば
塩素系ガスを用いたエッチングである。Then, the non-single-crystal silicon film 23 is heated to a uniform temperature by the irradiation of the laser beam, and then, at the time of cooling after the irradiation, the melted silicon film 23 begins to solidify from the contact portion with the silicon substrate 21, A single crystal silicon film is formed along the crystal orientation of the silicon substrate (for example, when the silicon substrate is the <111> plane, the single crystal silicon film 23 having the <111> plane). Then, the entire surface is etched by a known etching method to remove the cap layer and the separation film and expose the single crystal silicon film 23. Then, as shown in FIG. 1 (c), an island-shaped silicon film is formed. Patterning is performed using a photo process to oxidize both sides of the single crystal silicon film 23 to form a SiO 2 film 27. Then,
The single crystal silicon film 23 is separated into island regions. here,
The known etching method is a dry etching method that utilizes the difference in etching ratio between the SiO 2 film and silicon, and is, for example, etching using a chlorine-based gas.

このようにすれば、非単結晶シリコン膜が一様に加熱さ
れて、ビームアニールの条件設定が従来法より容易にな
り、島状の一定結晶方位をもつた高品位な単結晶シリコ
ン膜を再現性良く作成することができる。By doing so, the non-single-crystal silicon film is heated uniformly, the beam annealing condition setting becomes easier than in the conventional method, and a high-quality single-crystal silicon film having an island-like constant crystal orientation is reproduced. It can be created with good quality.

［発明の効果］ 以上の説明から判るように、本発明によれば三次元LSI
の製造方法において、高結晶品位の単結晶シリコン層を
容易に形成することができ、三次元LSIの品質を向上さ
せる効果が大きいものである。[Effects of the Invention] As can be seen from the above description, according to the present invention, a three-dimensional LSI is provided.
In the above manufacturing method, a single crystal silicon layer of high crystal quality can be easily formed, and the effect of improving the quality of the three-dimensional LSI is great.

【図面の簡単な説明】[Brief description of drawings]

第１図（ａ），（ｂ），（ｃ）は本発明にかかる形成方
法を説明するための工程順断面図、 第２図は従来の一実施例の形成方法を説明するための工
程断面図、 第３図（ａ），（ｂ）は従来の他の実施例の形成方法を
説明するための形成工程順断面図である。 図において、 1,11,21はシリコン基板、 2,12,15,22,24,27はSiO2膜、 3,13,23は非単結晶性のシリコン膜あるいは単結晶シリ
コン膜、 4,14,25はSi3N4膜、 を示している。1 (a), (b), and (c) are process cross-sectional views for explaining a forming method according to the present invention, and FIG. 2 is a process cross-sectional view for explaining a forming method of a conventional example. FIGS. 3A and 3B are sectional views in order of the forming steps for explaining the forming method of another conventional example. In the figure, 1,11,21 are silicon substrates, 2,12,15,22,24,27 are SiO 2 films, 3,13,23 are non-single crystalline silicon films or single crystalline silicon films, 4,14 , 25 are Si 3 N 4 films.

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】一部が単結晶体に接し、他部が絶縁体上に
設けられている非単結晶半導体層を、ビームアニールし
て単結晶半導体層に変換する単結晶化アニール工程にお
いて、 該非単結晶半導体層の上面に、前記ビームを吸収して蓄
熱するキャップ層を分離層を介して設け、前記ビームを
照射して加熱した前記キャップ層を熱源として前記非単
結晶半導体層を間接的に加熱し、単結晶化するようにし
た工程が含まれてなることを特徴とする半導体装置の製
造方法。1. A single crystallization annealing step of beam-annealing a non-single-crystal semiconductor layer, a portion of which is in contact with a single crystal body and the other portion of which is provided on an insulator, to a single crystal semiconductor layer, A cap layer that absorbs the beam and stores heat is provided on the upper surface of the non-single-crystal semiconductor layer via a separation layer, and the non-single-crystal semiconductor layer is indirectly used by using the cap layer heated by irradiating the beam as a heat source. A method of manufacturing a semiconductor device, which comprises the step of heating to a single crystal so as to form a single crystal.
JP59132571A 1984-06-26 1984-06-26 Method for manufacturing semiconductor device Expired - Lifetime JPH0722120B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59132571A JPH0722120B2 (en) 1984-06-26 1984-06-26 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59132571A JPH0722120B2 (en) 1984-06-26 1984-06-26 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6112019A JPS6112019A (en) 1986-01-20
JPH0722120B2 true JPH0722120B2 (en) 1995-03-08

Family

ID=15084419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59132571A Expired - Lifetime JPH0722120B2 (en) 1984-06-26 1984-06-26 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0722120B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE68927970T2 (en) * 1988-09-08 1997-10-09 Canon Kk Point image data output device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Ａｐｐｌ．Ｐｈｙｓ．Ｌｅｔｔ．４４（１０），（１９８４−５−１５），ＰＰ．９９４−９９６

Also Published As

Publication number Publication date
JPS6112019A (en) 1986-01-20

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