JPS61255027A - ドライエツチング方法 - Google Patents

ドライエツチング方法

Info

Publication number
JPS61255027A
JPS61255027A JP9632685A JP9632685A JPS61255027A JP S61255027 A JPS61255027 A JP S61255027A JP 9632685 A JP9632685 A JP 9632685A JP 9632685 A JP9632685 A JP 9632685A JP S61255027 A JPS61255027 A JP S61255027A
Authority
JP
Japan
Prior art keywords
gas
etching
dry etching
etching method
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9632685A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0467777B2 (enExample
Inventor
Keiji Horioka
啓治 堀岡
Haruo Okano
晴雄 岡野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP9632685A priority Critical patent/JPS61255027A/ja
Publication of JPS61255027A publication Critical patent/JPS61255027A/ja
Publication of JPH0467777B2 publication Critical patent/JPH0467777B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Drying Of Semiconductors (AREA)
JP9632685A 1985-05-07 1985-05-07 ドライエツチング方法 Granted JPS61255027A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9632685A JPS61255027A (ja) 1985-05-07 1985-05-07 ドライエツチング方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9632685A JPS61255027A (ja) 1985-05-07 1985-05-07 ドライエツチング方法

Publications (2)

Publication Number Publication Date
JPS61255027A true JPS61255027A (ja) 1986-11-12
JPH0467777B2 JPH0467777B2 (enExample) 1992-10-29

Family

ID=14161881

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9632685A Granted JPS61255027A (ja) 1985-05-07 1985-05-07 ドライエツチング方法

Country Status (1)

Country Link
JP (1) JPS61255027A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63237530A (ja) * 1987-03-26 1988-10-04 Toshiba Corp ドライエツチング方法
JPS6489519A (en) * 1987-09-30 1989-04-04 Toshiba Corp Dry etching
JPH0344030A (ja) * 1989-06-30 1991-02-25 American Teleph & Telegr Co <Att> 半導体デバイスの製作方法
US5356515A (en) * 1990-10-19 1994-10-18 Tokyo Electron Limited Dry etching method
JP2008198996A (ja) * 2007-01-11 2008-08-28 Tokyo Electron Ltd 微小特徴部位において欠陥を減少させたシリコン又はシリコンゲルマニウムの堆積

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57154834A (en) * 1981-03-20 1982-09-24 Toshiba Corp Etching method by reactive ion
JPS5846637A (ja) * 1981-09-14 1983-03-18 Toshiba Corp 反応性イオンエツチング方法
JPS58201362A (ja) * 1982-05-20 1983-11-24 Toshiba Corp 半導体装置の製造方法
JPS5922374A (ja) * 1982-07-28 1984-02-04 Matsushita Electric Ind Co Ltd 緑色発光ダイオ−ドの製造方法
JPS5967635A (ja) * 1982-07-06 1984-04-17 テキサス・インスツルメンツ・インコ−ポレイテツド シリコンの異方性エツチングの為のプラズマエツチング用化学組成

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57154834A (en) * 1981-03-20 1982-09-24 Toshiba Corp Etching method by reactive ion
JPS5846637A (ja) * 1981-09-14 1983-03-18 Toshiba Corp 反応性イオンエツチング方法
JPS58201362A (ja) * 1982-05-20 1983-11-24 Toshiba Corp 半導体装置の製造方法
JPS5967635A (ja) * 1982-07-06 1984-04-17 テキサス・インスツルメンツ・インコ−ポレイテツド シリコンの異方性エツチングの為のプラズマエツチング用化学組成
JPS5922374A (ja) * 1982-07-28 1984-02-04 Matsushita Electric Ind Co Ltd 緑色発光ダイオ−ドの製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63237530A (ja) * 1987-03-26 1988-10-04 Toshiba Corp ドライエツチング方法
JPS6489519A (en) * 1987-09-30 1989-04-04 Toshiba Corp Dry etching
JPH0344030A (ja) * 1989-06-30 1991-02-25 American Teleph & Telegr Co <Att> 半導体デバイスの製作方法
US5356515A (en) * 1990-10-19 1994-10-18 Tokyo Electron Limited Dry etching method
JP2008198996A (ja) * 2007-01-11 2008-08-28 Tokyo Electron Ltd 微小特徴部位において欠陥を減少させたシリコン又はシリコンゲルマニウムの堆積

Also Published As

Publication number Publication date
JPH0467777B2 (enExample) 1992-10-29

Similar Documents

Publication Publication Date Title
US7087998B2 (en) Control of air gap position in a dielectric layer
TW507293B (en) Undoped silicon dioxide as etch stop for selective etch of doped silicon dioxide
US6423630B1 (en) Process for forming low K dielectric material between metal lines
US6140224A (en) Method of forming a tungsten plug
US20030057184A1 (en) Method for pull back SiN to increase rounding effect in a shallow trench isolation process
JP2006501634A (ja) 基板をエッチングするための方法及び装置
TW200300980A (en) Process for selectively etching dielectric layers
GB2216336A (en) Forming insulating layers on substrates
US6479388B2 (en) Methods of forming materials over uneven surface topologies, and methods of forming insulative materials over and between conductive lines
JP2913918B2 (ja) 半導体装置の製造方法
US7329610B2 (en) Method of high selectivity SAC etching
US6365523B1 (en) Integrated high density plasma chemical vapor deposition (HDP-CVD) method and chemical mechanical polish (CMP) planarizing method for forming patterned planarized aperture fill layers
JP3331979B2 (ja) 半導体のエッチング方法
US5837615A (en) Integrated circuit device fabrication by plasma etching
JPS61255027A (ja) ドライエツチング方法
EP0050972B1 (en) Method of manufacturing a semiconductor device with an interconnection electrode layer
US7300881B2 (en) Plasma etching method
US6117764A (en) Use of a plasma source to form a layer during the formation of a semiconductor device
US7709343B2 (en) Use of a plasma source to form a layer during the formation of a semiconductor device
KR19990040443A (ko) 미세한 선폭과 고 종횡비를 갖는 영역에 절연막을 채우는 방법
US20020123231A1 (en) Etching gas composition for silicon oxide and method of etching silicon oxide using the same
US7573116B2 (en) Etch aided by electrically shorting upper and lower sidewall portions during the formation of a semiconductor device
JPH11214355A (ja) 異方性ドライエッチング方法
EP1110238B1 (en) Method of etching doped silicon dioxide with selectivity to undoped silicon dioxide with a high density plasma etcher
US6716769B1 (en) Use of a plasma source to form a layer during the formation of a semiconductor device

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term