JPH0467777B2 - - Google Patents

Info

Publication number
JPH0467777B2
JPH0467777B2 JP60096326A JP9632685A JPH0467777B2 JP H0467777 B2 JPH0467777 B2 JP H0467777B2 JP 60096326 A JP60096326 A JP 60096326A JP 9632685 A JP9632685 A JP 9632685A JP H0467777 B2 JPH0467777 B2 JP H0467777B2
Authority
JP
Japan
Prior art keywords
etching
gas
film
deposited film
sidewall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60096326A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61255027A (ja
Inventor
Keiji Horioka
Haruo Okano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP9632685A priority Critical patent/JPS61255027A/ja
Publication of JPS61255027A publication Critical patent/JPS61255027A/ja
Publication of JPH0467777B2 publication Critical patent/JPH0467777B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Drying Of Semiconductors (AREA)
JP9632685A 1985-05-07 1985-05-07 ドライエツチング方法 Granted JPS61255027A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9632685A JPS61255027A (ja) 1985-05-07 1985-05-07 ドライエツチング方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9632685A JPS61255027A (ja) 1985-05-07 1985-05-07 ドライエツチング方法

Publications (2)

Publication Number Publication Date
JPS61255027A JPS61255027A (ja) 1986-11-12
JPH0467777B2 true JPH0467777B2 (enExample) 1992-10-29

Family

ID=14161881

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9632685A Granted JPS61255027A (ja) 1985-05-07 1985-05-07 ドライエツチング方法

Country Status (1)

Country Link
JP (1) JPS61255027A (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63237530A (ja) * 1987-03-26 1988-10-04 Toshiba Corp ドライエツチング方法
JPS6489519A (en) * 1987-09-30 1989-04-04 Toshiba Corp Dry etching
US4919748A (en) * 1989-06-30 1990-04-24 At&T Bell Laboratories Method for tapered etching
US5356515A (en) * 1990-10-19 1994-10-18 Tokyo Electron Limited Dry etching method
US8263474B2 (en) * 2007-01-11 2012-09-11 Tokyo Electron Limited Reduced defect silicon or silicon germanium deposition in micro-features

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57154834A (en) * 1981-03-20 1982-09-24 Toshiba Corp Etching method by reactive ion
JPS5846637A (ja) * 1981-09-14 1983-03-18 Toshiba Corp 反応性イオンエツチング方法
JPS58201362A (ja) * 1982-05-20 1983-11-24 Toshiba Corp 半導体装置の製造方法
US4450042A (en) * 1982-07-06 1984-05-22 Texas Instruments Incorporated Plasma etch chemistry for anisotropic etching of silicon
JPS5922374A (ja) * 1982-07-28 1984-02-04 Matsushita Electric Ind Co Ltd 緑色発光ダイオ−ドの製造方法

Also Published As

Publication number Publication date
JPS61255027A (ja) 1986-11-12

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term