JPS61251953A - Data processing system - Google Patents

Abstract

PURPOSE:To improve the data processing efficiency of a master system by controlling I/O bus connection to the data collecting memories of the master system and a slave one according to a data transfer command outputted from the slave system. CONSTITUTION:When the data transfer command is outputted from the transfer controller 33 of the slave system through a control line G, a bus controller 31 acts so as to connect buses b1 and b2. The controller 33 accesses the inner memories 27 and 28 of a data collecting device 15 through the buses b1 and b2, while the transfer controller 32 of the master system separates electrically the bus b1 from a CPU 11 when it receives the data transfer command from the controller 33. When the slave system requests the transfer of data collected by the device 15, the CPU 11 is interrupted from data input controllers 23 and 24 in the same manner to connect the buses b1 and b2. Thus the data processing efficiency of the master system can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a dual-configuration data processing system consisting of master and slave systems with the same basic processing system.

[Technical Background of the Invention and Problems Thereto Conventionally, a dual configuration system has been used in a data processing system that requires safety or resilience. For example, as shown in FIG. 2, a dual-configuration data processing system includes a master system and a slave system with the same processing system.

Each system includes a CPU 11.12, main memory 13.14, data collection device 15.16, and external memory 17.1.
8 and electric it for data collection device! 19.20 respectively.

The data collection device 1115.16 is the transfer controller 2
1°22. The data collection device 15 includes data input controllers 23, 24 for inputting data from lines di and d2. Each data input controller 23.24 is provided with an internal memory 27.28, respectively, and has a line d1. Store data from d2 in each internal memory 27,28. On the other hand, the data collection device 16 similarly includes a data input controller 25.2f3 having an internal memory 29.30.

By the way, in a dual configuration system, if the master system is in an operating state, the slave system is in a standby state. Now, hypothetically, in the master system, CP
Assume that U11 activates the transfer controller 21 via bus a1. The transfer controller 21 activates the data input controllers 23 and 24 via the bus b1. As a result, data from the lines di and d2 is input and stored in the internal memory 27.28 of each controller 23.24. The CPU 11 accesses each internal memory 27, 28 through the transfer controller 21 and the bus b1, stores the read data in the main memory 13, 14, and performs various processes. Here, in each of the master and slave systems, the bus at,
a2, bus b1. b2 and bus f1. f2 are buses including a data bus, an address bus, and a command line, respectively.

By the way, when the slave system uses the data input to the data collection device 15 of the master system, the data is transferred to the main memory 14 of the slave system through the main memory 13, external memory 17, bus "1" and external memory 18. The slave system performs the same operations as the master system when in standby mode, and takes over the processing of the master system if a problem occurs with the master system.However, in the above configuration, each system Main memory 1
3, the operation of the slave system will affect the operation of the master system (particularly the operation of the CPU 11). Therefore, the processing efficiency of the master system decreases, and when a problem occurs in the master system, it may become impossible to transfer data to the slave system.

[Object of the Invention] An object of the present invention is to minimize the influence on the master system when transferring data between the master and slave systems in a dual configuration system, and to improve the processing efficiency of the entire system. The object of the present invention is to provide a data processing system that can reliably realize operation switching between systems.

[Summary of the Invention] The present invention provides a data processing system with a dual configuration consisting of a master system and a slave system, in which data transfer commands output from the slave system are used to control the input/output bus of the data collection memory of the master system. It includes bus control means for connecting the input/output bus of the data collection memory of the slave system. Data is transferred from the master system to the slave system through each input/output bus connected by this bus control means.

During this data transfer, the input/output bus of the data collection memory is cut off from the processing system of the master system.

With such a configuration, when data is transferred between each system, the influence on the processing system of the master system can be minimized, and reliable data transfer can be achieved.

[Embodiment of the Invention] An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a block diagram showing the configuration of a data processing system according to an embodiment. As shown in FIG. 1, the data processing system consists of a master system and a slave system, each of which has a bus b1. A bus controller 31 is provided to control the connection between the terminals b2 and b2. The bus controller 31 is the transfer controller 3 of the slave system.
3 outputs a data transfer command through the control line G, the buses b1. It operates to connect between b2. The transfer controller 33 accesses the internal memories 27 and 28 of the data acquisition device 15 through the connected buses bl and b2. On the other hand, upon receiving the data transfer command from the transfer controller 33, the transfer controller 32 of the master system transfers data to the bus b.
1 electrically disconnects CP Ll 1 of the master system.
Shut off from 1.

In addition, since the other configuration is the same as that shown in FIG. 2,
The same reference numerals are used to omit the explanation.

The operation of this embodiment in such a dual configuration data processing system will be explained. First, the CPU 11 of the master system outputs a start command to start the transfer controller 32. The transfer controller 32 will activate the data input controllers 23 and 24 via the bus b1.

At this time, the bus controller 31 is logically separated from the bus b1. Data input controller 2
3.24 are the lines d1. The data from d2 is input and stored in each internal memory 27 and 28.

The CPU 11 accesses each internal memory 27.28 through the transfer controller 32 and the bus b1, and transfers the data stored in each internal memory 27.28 to the main memory 13.
Store in. As a result, the cpu ii will perform various processes based on the data collected by the data collection device 15.

Here, the slave system stores the data collected by the data collection device 15 of the master system (i.e., the main memory 1
Assume that a request is made to transfer data stored in 3). The transfer controller 33 of the slave system is CPU 1
2, a data transfer command is output to the control line G. A data transfer command from the transfer controller 33 is output through a control line G to the bus controller 31 and the transfer controller 32 of the master system. The transfer controller 32 of the master system electrically disconnects the bus b1 according to the data transfer command, and
Cut off between J 11 and data input controllers 23 and 24. On the other hand, the bus controller 31 receives the data transfer command from the bus b1.
Electrically connect b2.

The transfer controller 33 of the slave system accesses each internal memory 27, 28 of the master system through the connected buses bl, b2, and transfers the internal memories 27, 28.
Read data stored in . Transfer controller 3
3 transfers data read from the internal memories 27 and 28 to buses b1. c p U of slave system through b2
Transfer to 12. The CP Ll 12 stores the data transferred from the master system in the main memory 14,
Processing similar to that of CP LJ 11 of the master system will be executed.

In this way, the slave system can cause data to be transferred from the master system by outputting a data transfer command. This data transfer is performed through a bus separate from the CPU 11 of the master system. Therefore, the data transfer operation to the slave system does not affect the CPU processing of the master system. Thereby, it is possible to prevent the processing efficiency of the CPU 11 of the master system from decreasing. Also, the master system CPU
Even if a problem occurs in ii (system down), data transfer is reliably executed to the slave system. Therefore, when a problem occurs in the master system, the slave system can reliably take over the processing of the master system.

[Effects of the Invention] As detailed above, according to the present invention, in a dual-configuration data processing system, when data is transferred between the master and slave systems, the influence on the processing of the master system can be minimized. Can be done. Therefore, the data processing efficiency of the master system can be significantly improved over conventional systems. Furthermore, when the master system goes down, data transfer to the slave system can be reliably realized, so system switching from the master to the slave can be reliably performed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a dual configuration data processing system according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of a conventional dual configuration data processing system. 11, 12... CPU 113. 14... Main memory, 15, 16... Data collection device, 31... Bus controller.

Claims (1)

[Claims] In a dual-configuration data processing system consisting of a master and slave system, data collection memory provided in each of the master and slave systems and a data transfer command output from the slave system are used to control the master system. bus control means for connecting an input/output bus of the data collection memory and an input/output bus of the data collection memory of the slave system;
slave transfer control means for reading data from the data collection memory of the master system through each of the input/output buses connected by the bus control means and transferring it to the slave system; A data processing system comprising master transfer control means for cutting off an input/output bus of the data collection memory from a processing system of a master system.