JPS61228684A - Semiconductor light emitting element - Google Patents

Semiconductor light emitting element

Info

Publication number
JPS61228684A
JPS61228684A JP60069713A JP6971385A JPS61228684A JP S61228684 A JPS61228684 A JP S61228684A JP 60069713 A JP60069713 A JP 60069713A JP 6971385 A JP6971385 A JP 6971385A JP S61228684 A JPS61228684 A JP S61228684A
Authority
JP
Japan
Prior art keywords
layer
type
active layer
concentration
carrier concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60069713A
Other languages
Japanese (ja)
Inventor
Hiroshi Okuda
奥田 寛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP60069713A priority Critical patent/JPS61228684A/en
Publication of JPS61228684A publication Critical patent/JPS61228684A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004Devices characterised by their operation
    • H01L33/002Devices characterised by their operation having heterojunctions or graded gap

Abstract

PURPOSE:To prevent position deviation due to the diffusion of impurities at a P-N junction and to make it possible to obtain high speed response and a high-power emitted light output, by setting the carrier concentration of an active layer, which is formed between a first clad layer in an N-type region, and a second clad layer formed in a P-type region, at a value larger than those of the first and second clad layers. CONSTITUTION:An active layer is made to be an N-type region. The carrier concentration of the active layer is made larger than the carrier concentration of first and second clad layers 2 and 4. For example, on an N-type InP substrate 1 having a concentration of Te 1X10<18>cm<-3>, the following layers are sequentially formed by a liquid phase epitaxial growing method: an N-type InP clad layer 2 having a concentration of Te 1X10<18>cm<-3>; an N-type InGaAsP active layer 3 having a concentration of Te 5X10<18>cm<-3>; a P-type InP clad layer 4 having a concentration of Zn 1X10<18>cm<-3>; and a P-type InGaAsP contact layer 5 having a concentration of Zn 3X10<18>cm<-3>. In this way, Te, which is the N-type impurities, is added in the active layer 3, and the P-N junction is formed at an interface between the active layer 3 and the P-type clad layer 4. The carrier concentration of the P-type clad layer 4 is decreased to 1X10<18>cm<-3>. Thus the occurrence of a tunnel phenomenon is prevented.

Description

【発明の詳細な説明】 11↓Ω困月公! 本発明は、ダブルへテロ接合を有する半導体発光素子に
関する。
[Detailed description of the invention] 11↓Ω Kozuki! The present invention relates to a semiconductor light emitting device having a double heterojunction.

従来の技術 近年のオプトエレクトロニクスの発展に伴い、半導体レ
ーザを含めて発光ダイオードの研究が進んでいる。発光
ダイオードは小形であり、寿命が長く、信頼性が高い等
の特長を有しているが、光通信用としてはさらに発光出
力が高くかつ応答速度が速いことが望まれており、半導
体材料として石英系光ファイバの低損失域に発光波長を
有する高品質なエピタキシャル結晶が使用され、0.7
〜0.9μm帯ではGaA 1^s / GaAs系、
1〜1.7μm帯ではInGaAs P / In P
系が主に用いられている。
BACKGROUND OF THE INVENTION With the recent development of optoelectronics, research on light emitting diodes including semiconductor lasers is progressing. Light-emitting diodes are small, have a long lifespan, and have high reliability, but for optical communication purposes, they are required to have even higher light output and faster response speed, so they are being used as semiconductor materials. A high-quality epitaxial crystal with an emission wavelength in the low-loss region of silica-based optical fiber is used, and the 0.7
In the ~0.9μm band, GaA 1^s/GaAs system,
InGaAsP/InP in the 1-1.7μm band
system is mainly used.

これらの材料からなる通信用発光ダイオードには発光出
力を高めるために一般にダブルへテロ接合構造が採用さ
れている。ダブルへテロ接合ではバンドギャップの小さ
い活性層がバンドギャップの大きい2つのクラッド層に
挟まれており、活性層に注入された電子は伝導帯にでき
るポテンシャル障壁によって、注入されたホールは価電
子帯にできるポテンシャル障壁によってそれぞれ閉じこ
められてこれらキャリヤのクラッド層への拡散が抑えら
れるので、わずかな電流でも注入されたキャリヤ濃度が
高くなり単位時間あたりの発光再結合の割合が増える、
すなわち発光効率が向上されて発光出力も高まるもので
ある。
Communication light emitting diodes made of these materials generally have a double heterojunction structure in order to increase light emission output. In a double heterojunction, an active layer with a small bandgap is sandwiched between two cladding layers with a large bandgap, and electrons injected into the active layer are transferred to the valence band by a potential barrier created in the conduction band. The diffusion of these carriers into the cladding layer is suppressed by being confined by the potential barrier formed in the cladding layer, so even a small amount of current increases the concentration of injected carriers and increases the rate of radiative recombination per unit time.
In other words, the luminous efficiency is improved and the luminous output is also increased.

一方、応答速度は活性層領域への注入キャリヤの再結合
寿命τで決まり、遮断周波数feが次式%式% また、キャリヤ寿命τは活性層に添加された不純物濃度
が高いほど小さいことが知られている。したがって、(
1)式かられかるように応答速度を速くする、すなわち
遮断周波数f、を向上させるためには、不純物濃度を高
めてキャリヤ寿命τを減少させればよい。
On the other hand, the response speed is determined by the recombination lifetime τ of carriers injected into the active layer region, and the cutoff frequency fe is determined by the following formula % Formula % It is also known that the carrier lifetime τ becomes smaller as the concentration of impurities added to the active layer increases. It is being therefore,(
In order to increase the response speed, that is, to improve the cutoff frequency f, as seen from equation 1), it is sufficient to increase the impurity concentration and decrease the carrier lifetime τ.

なお、活性層に添加される不純物としては拡散しやすく
毒性が少ないためにZn、 Mg等が最も多く用いられ
ている。
Note that Zn, Mg, etc. are most commonly used as impurities added to the active layer because they are easily diffused and have little toxicity.

発明が解決しようとする問題点 従来のInGaAs P / In P系発光ダイオー
ドの断面図を第7図に示す。活性層7とクラッド層2お
よび4との間にそれぞれへテロ接合が形成されている。
Problems to be Solved by the Invention A cross-sectional view of a conventional InGaAs P/In P light emitting diode is shown in FIG. A heterojunction is formed between the active layer 7 and the cladding layers 2 and 4, respectively.

いま、この発光ダイオードに高速応答性を持たせるため
に、各層の結晶成長時に第8図に示されるような濃度の
不純物を各層に持たせて、活性層7の不純物濃度を高め
るものとする。活性層7に添加される不純物としてZn
が用いられ、その結果、活性層7はn型領域となり、n
型クラッド層2との間にpn接合を形成しようとするも
のである。
Now, in order to provide this light emitting diode with high-speed response, it is assumed that the impurity concentration of the active layer 7 is increased by adding impurities to each layer at a concentration as shown in FIG. 8 during crystal growth of each layer. Zn as an impurity added to the active layer 7
is used, and as a result, the active layer 7 becomes an n-type region, and n
The purpose is to form a pn junction with the mold cladding layer 2.

しかしながら、p型不純物のZn (あるいはMg)は
拡散しやすいので、例えば液相エピタキシャル法などに
より第8図に示されるようなZnが高濃度(5×IO”
cm−’ )の活性層7を形成すると、Znは容易にそ
の下のn型クラッド層2の内部にまで拡散してZnの拡
散プロファイルは第8図の破線のようになってしまう。
However, since the p-type impurity Zn (or Mg) is easily diffused, Zn is deposited at a high concentration (5×IO”
cm-'), Zn easily diffuses into the n-type cladding layer 2 below, resulting in a Zn diffusion profile as shown by the broken line in FIG.

その結果、n型クラッド層2の活性層7との境界付近は
n型領域となり活性層7とn型クラッド層2との境界に
形成しようとしたpn接合が実際にはn型クラッド層2
の内部に形成されることになる。したがって、この発光
ダイオードのエネルギーバンド図は第9図のようになり
、活性層7とn型クラッド層2との境界に存在すべきポ
テンシャル障壁がn型クラッド層2内にずれるので、活
性層7に注入されたキャリヤが活性層7外に流れ出して
キャリヤ密度が低下する。
As a result, the vicinity of the boundary between the n-type cladding layer 2 and the active layer 7 becomes an n-type region, and the pn junction that was intended to be formed at the boundary between the active layer 7 and the n-type cladding layer 2 actually becomes an n-type region in the vicinity of the boundary between the n-type cladding layer 2 and the active layer 7.
will be formed inside. Therefore, the energy band diagram of this light emitting diode becomes as shown in FIG. The carriers injected into the active layer 7 flow out of the active layer 7, and the carrier density decreases.

すなわち、発光効率が劣化して発光出力が低下し、はじ
めの目的であった応答の高速化も達成されない。
That is, the luminous efficiency deteriorates, the luminous output decreases, and the initial objective of increasing the response speed cannot be achieved.

そこで、本発明は高速応答かつ高発光出力を可能とする
半導体発光素子を提供することにある。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor light emitting device that enables high speed response and high light output.

問題点 解決するための手段 本発明の半導体発光素子は、n型領域の第1のクラッド
層とn型領域の第2のクラッド層との間にn型領域の活
性層を形成するものであり、また活性層のキャリヤ濃度
は第1、第2のクラッド層に比べて大きく設定されてい
る。
Problems and Means for Solving The semiconductor light emitting device of the present invention forms an active layer in the n-type region between a first cladding layer in the n-type region and a second cladding layer in the n-type region. Furthermore, the carrier concentration of the active layer is set higher than that of the first and second cladding layers.

なお、第2のクラッド層は、活性層のすぐ上に形成され
る第1層とさらに第1層の上に形成され第1層より大き
いキャリヤ濃度と厚さを有する第2層からなる2層構造
であってもよい。
Note that the second cladding layer is a two-layer structure consisting of a first layer formed immediately above the active layer and a second layer formed further above the first layer and having a larger carrier concentration and thickness than the first layer. It may be a structure.

本発明の好ましい態様においては、活性層がキャリヤ濃
度1xlQI8〜5 X 10 ’ ”cm−’、厚さ
0.1〜2.0μmのInGaAs Pからなり、第2
のクラフト層がキャリヤ濃度1 xlQl? 〜2XI
O”cm−’、厚さ0.2〜2.0μmのInPからな
っている。
In a preferred embodiment of the present invention, the active layer is made of InGaAs P with a carrier concentration of 1xlQI8-5x10''cm-' and a thickness of 0.1-2.0 μm;
The craft layer has a carrier concentration of 1 xlQl? ~2XI
It is made of InP with a thickness of 0.2 to 2.0 μm.

芸月 一般にn型不純物は拡散しにくいので、このような構造
にすることによって、n型の活性層とp型の第2のクラ
ッド層の界面に形成され、たpn接合は不純物の拡散に
よってその位置がずれることはない。
In general, n-type impurities are difficult to diffuse, so by creating this structure, a p-n junction is formed at the interface between the n-type active layer and the p-type second cladding layer, and the p-n junction is formed by diffusion of the impurity. The position will not shift.

ところで、pn接合においてp型およびn型のキャリヤ
濃度が共に高いと、空乏層のポテンシャル障壁の幅が小
さくなりトンネル現象の確率が高くなることが知られて
いる。トンネル電流が暗電流として現われ、トンネルブ
レークダウンを引き起こすと、発光ダイオードとしての
用をなさなくなるので、このトンネル現象の発生を防止
しなければならない。そのためにはpn接合°の低濃度
側、すなわち第2のクラフト層のキャリヤ濃度を低く設
定する必要がある。
By the way, it is known that when both p-type and n-type carrier concentrations are high in a pn junction, the width of the potential barrier of the depletion layer becomes small and the probability of tunneling phenomenon increases. If tunnel current appears as dark current and causes tunnel breakdown, it will no longer be useful as a light emitting diode, so it is necessary to prevent this tunneling phenomenon from occurring. For this purpose, it is necessary to set the carrier concentration on the low concentration side of the pn junction, that is, the second craft layer, to be low.

また、第2のクラッド層を活性層の上に位置するように
形成すると、発光素子の加工時の不純物拡散等による活
性層へのダメージを与えないために、第2のクラッド層
の厚さを大きく設定する必要がある。
Furthermore, when the second cladding layer is formed on top of the active layer, the thickness of the second cladding layer is adjusted to prevent damage to the active layer due to impurity diffusion during processing of the light emitting device. It needs to be set large.

ところが、低キャリヤ濃度の第2のクラッド層を厚くす
ると電気抵抗が増加して発光素子としての特性が劣化し
てしまう。
However, if the second cladding layer with a low carrier concentration is made thicker, the electrical resistance will increase and the characteristics as a light emitting element will deteriorate.

そこで、第2のクラッド層を第1層、第2層の2層構造
とし、まず活性層の上にキャリヤ濃度が低くて薄い第1
層を形成し、次にこの第1層の上にキャリヤ濃度が高く
て厚い第2層を形成すれば、加工時に活性層にダメージ
を与えない厚さを有し、かつ電気抵抗の低い第2のクラ
ッド層を実現することができる。
Therefore, the second cladding layer has a two-layer structure of the first layer and the second layer, and first the thin first layer with low carrier concentration is placed on top of the active layer.
If a thick second layer with a high carrier concentration is formed on the first layer, the second layer has a thickness that does not damage the active layer during processing and has a low electrical resistance. cladding layer can be realized.

11男 以下、本発明の実施例について図面を参照して説明する
Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の半導体発光素子の一実施例を示す断面
図、第2図は本実施例の各層にふけるキャリヤ濃度分布
図である。図示の半導体発光素子は、Te I X10
18cm−’濃度のn型1nP基板1を有し、その基板
1の上にはTe l XIO”cm−’濃度の厚さ5μ
mのn型InPクラッド層2が形成され、更にTe5 
xlo”Cm−’濃度で厚さ1.umのn型1nGaA
s P活性層3が形成されている。その活性層3の上に
は、Zn I XIO”cm−’濃度の厚さ0.5μm
のp型1nPクラッド層4、更にZn 3 X1018
C,11−3濃度で厚さ1μmのp型1nGaAs P
コンタクト層5が形成されている。
FIG. 1 is a sectional view showing an embodiment of the semiconductor light emitting device of the present invention, and FIG. 2 is a carrier concentration distribution diagram in each layer of this embodiment. The illustrated semiconductor light emitting device is Te I
It has an n-type 1nP substrate 1 with a concentration of 18cm-', and on the substrate 1 there is a 5μ thick layer of TEL XIO with a concentration of 5μcm-'.
An n-type InP cladding layer 2 of m is formed, and further Te5
1.um thick n-type 1nGaA with xlo''Cm-' concentration
An sP active layer 3 is formed. On the active layer 3, a Zn I
p-type 1nP cladding layer 4, further Zn 3
1 μm thick p-type 1nGaAs P with C,11-3 concentration
A contact layer 5 is formed.

そして、n型クラッド層2からコンタクト層5までは順
次液相エピタキシャル成長法により形成した。すなわち
、本実施例は第7図の従来例において活性層7に添加さ
れたp型不純物のZnの代わりにn型不純物のTeを活
性層3に添加してpn接合を活性層3とp型クラッド層
4との界面に形成し、さらにp型クラッド層4のキャリ
ヤ濃度をI XIO”cl’に減少させてトンネル現象
の発生を防止するものである。
The layers from the n-type cladding layer 2 to the contact layer 5 were sequentially formed by liquid phase epitaxial growth. That is, in this embodiment, instead of the p-type impurity Zn added to the active layer 7 in the conventional example shown in FIG. It is formed at the interface with the cladding layer 4 and further reduces the carrier concentration of the p-type cladding layer 4 to IXIO"cl" to prevent the occurrence of tunneling.

本実施例のn型基板1およびp型コンタクト層5にそれ
ぞれ電極を設けてp型コンタクト層5からn型基板1に
向かう電界を加えたところ、第3図、第4図にそれぞれ
示される遮断周波数特性および発光出力特性が得られた
。図中の破線は第7図の従来例の特性を示しており、本
実施例の発光ダイオードは各電流値において従来より高
い遮断周波数と発光出力を有する、すなわち、応答の高
速化と高出力化を達成していることがわかる。
When an electrode was provided on each of the n-type substrate 1 and the p-type contact layer 5 in this example, and an electric field was applied from the p-type contact layer 5 toward the n-type substrate 1, the interruptions shown in FIGS. 3 and 4, respectively, were obtained. Frequency characteristics and light emission output characteristics were obtained. The broken line in the figure shows the characteristics of the conventional example shown in Figure 7, and the light emitting diode of this example has a higher cutoff frequency and light emission output than the conventional example at each current value, that is, faster response and higher output. It can be seen that this has been achieved.

第2の実施例の断面図および各層におけるキャリヤ濃度
分布図を第5図、第6図に示す。この第2の実施例は第
1図の実施例においてp型クラッド層4とp型コンタク
ト層5との間に、3 XIO”cm−’のZnが添加さ
れた厚さ1μmの第2のp型1nPクラッド層6を設け
て、加工時に活性層3がダメージを受けることを防止し
たものであり、その遮断周波数および発光出力は第1の
実施例と同様の特性を示している。
A cross-sectional view of the second embodiment and carrier concentration distribution maps in each layer are shown in FIGS. 5 and 6. This second embodiment is similar to the embodiment of FIG. A type 1nP cladding layer 6 is provided to prevent the active layer 3 from being damaged during processing, and its cutoff frequency and light emission output exhibit characteristics similar to those of the first embodiment.

な右、活性層3とコンタクト層5を形成するInGaA
s PはInPに格子整合されるものであり、電極金属
とオーミック接触を容易にするため、0.75eVから
1.2eV程度のバンドギャッ゛ブを有する混晶比 ′
のInGaAs Pが好ましい。
On the right, InGaA forming the active layer 3 and contact layer 5
sP is lattice matched to InP, and in order to facilitate ohmic contact with the electrode metal, it has a mixed crystal ratio with a band gap of about 0.75 eV to 1.2 eV.
InGaAs P is preferred.

また、上記の2つの実施例では各層の厚さおよびキャリ
ヤ濃度として一つの例を示したに過ぎず、第1表に示す
範囲内であれば同様の効果が得られる。
Further, in the above two examples, only one example was shown for the thickness and carrier concentration of each layer, and the same effect can be obtained as long as the thickness and carrier concentration of each layer are within the ranges shown in Table 1.

第1表 ただし、n型クラッド層4のキャリヤ濃度は第6図の分
布図と同様に活性層3および第2のn型クラッド層6よ
り低くなければならない。また、n型クラッド層4が比
較的厚い場合には第2のn型クラッド層6は不要となる
Table 1 However, the carrier concentration of the n-type cladding layer 4 must be lower than that of the active layer 3 and the second n-type cladding layer 6, as in the distribution diagram of FIG. Further, when the n-type cladding layer 4 is relatively thick, the second n-type cladding layer 6 is not necessary.

また、本実施例では活性層3の下にn型クラッド層2が
、活性層3の上にn型クラッド層4が位置するように構
成されているが、逆でも構わない。すなわち、p型基板
の上にn型クラッド層、n型活性層、n型クラッド層、
n型コンタクト層を順次形成しても同様の効果が得られ
る。
Further, in this embodiment, the n-type cladding layer 2 is located below the active layer 3, and the n-type cladding layer 4 is located above the active layer 3, but the reverse may be used. That is, on a p-type substrate, an n-type cladding layer, an n-type active layer, an n-type cladding layer,
Similar effects can be obtained by sequentially forming n-type contact layers.

さらに、半導体材料としては上記実施例のInGaAs
 P / In P系の他、やはり通信用のInGaA
sSb /InSb系、GaAlAsSb /GaSb
系、InGaAs P /GaAs系、GaAsAs 
P / GaAs系をはじめとする4元、3元、2元■
−■族化合物半導体、またその他の半導体でもよい。
Furthermore, as a semiconductor material, InGaAs of the above embodiment is used.
P/In In addition to the P system, InGaA is also used for communication.
sSb/InSb system, GaAlAsSb/GaSb
system, InGaAs P /GaAs system, GaAsAs
Quaternary, ternary, binary, including P/GaAs system■
- Group compound semiconductors or other semiconductors may be used.

また、結晶の成長法として液相エピタキシャル法を用い
たが、分子線エピタキシャル成長法あるいは有機金属熱
分解気相成長法(MOCVD法)でもよい。
Furthermore, although a liquid phase epitaxial method was used as a crystal growth method, a molecular beam epitaxial growth method or a metal organic pyrolysis vapor deposition method (MOCVD method) may also be used.

さらに、n型不純物として基板1、クラッド層2、活性
層3に添加されたTeの代わりにSn、 Seあるいは
Sを用いても同様の効果が得られ、p型不純物としてク
ラッド層4、第2のクラッド層6、コンタクト層5に添
加されたZnの代わりにMg5Cd等でもよい。但し、
不純物としてはn型についてみれば、SなどよりはSe
、 Teなどの原子の大きさが大きい物質の方が拡散し
にくい。そこで、Se。
Furthermore, similar effects can be obtained by using Sn, Se, or S instead of Te added to the substrate 1, cladding layer 2, and active layer 3 as n-type impurities, and Instead of Zn added to the cladding layer 6 and contact layer 5, Mg5Cd or the like may be used. however,
Regarding n-type impurities, Se is preferable to S etc.
, Te, and other substances with large atoms are more difficult to diffuse. Therefore, Se.

Teなどの大型原子を使用した方が拡散防止により効果
がある。
The use of large atoms such as Te is more effective in preventing diffusion.

m1呈 以上説明したように本発明によれば、pn接合面の位置
をずらすことなく高キャリヤ濃度の活性層を形成するこ
とができるので、応答速度が速くかつ発光出力の大きい
半導体発光素子が実現される。
As explained above, according to the present invention, an active layer with a high carrier concentration can be formed without shifting the position of the pn junction surface, so a semiconductor light emitting device with a fast response speed and a large light emitting output can be realized. be done.

従って、本発明による半導体発光素子を光通信用機器に
応用すれば非常に有効である。
Therefore, it is very effective to apply the semiconductor light emitting device according to the present invention to optical communication equipment.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図はそれぞれ本発明の一実施例に係る半
導体発光素子の断面図及びキャリヤ濃度分布図、 第3図及び第4図はそれぞれ第1図の実施例の遮断周波
数特性図及び発光出力特性図、第5図及び第6図はそれ
ぞれ他の実施例の断面図及びキャリヤ濃度分布図、 第7図、第8図、第9図はそれぞれ従来例の断面図、キ
ャリヤ濃度分布図、エネルギーバンド図である。 (主な参照番号) 1・・n型1nP基板、 2・・n型1nPクラッド層、 3・・n型1nGaAs P活性層、 4・・p型1nPクラッド層、
1 and 2 are a cross-sectional view and a carrier concentration distribution diagram of a semiconductor light emitting device according to an embodiment of the present invention, respectively. FIGS. 3 and 4 are a cut-off frequency characteristic diagram and a carrier concentration distribution diagram of the embodiment of the present invention, respectively. Figures 5 and 6 are cross-sectional views and carrier concentration distribution diagrams of other embodiments, and Figures 7, 8, and 9 are cross-sectional views and carrier concentration distribution diagrams of conventional examples, respectively. , is an energy band diagram. (Main reference numbers) 1... n-type 1nP substrate, 2... n-type 1nP cladding layer, 3... n-type 1nGaAs P active layer, 4... p-type 1nP cladding layer,

Claims (6)

【特許請求の範囲】[Claims] (1)n型領域の第1のクラッド層と、p型領域の第2
のクラッド層と、該第1、第2のクラッド層の間に形成
された活性層とを有する半導体発光素子において、 前記活性層がn型領域であり、さらに前記活性層のキャ
リヤ濃度が前記第1、第2のクラッド層の各キャリヤ濃
度より大きいことを特徴とする半導体発光素子。
(1) The first cladding layer in the n-type region and the second cladding layer in the p-type region.
cladding layer and an active layer formed between the first and second cladding layers, wherein the active layer is an n-type region, and further the carrier concentration of the active layer is equal to 1. A semiconductor light emitting device characterized in that each carrier concentration is higher than that of a second cladding layer.
(2)前記第2のクラッド層が前記活性層の上に形成さ
れた第1層と該第1層の上に形成され前記第1層より大
きいキャリヤ濃度と厚さを有する第2層からなる特許請
求の範囲第1項記載の半導体発光素子。
(2) The second cladding layer includes a first layer formed on the active layer and a second layer formed on the first layer and having a carrier concentration and thickness larger than that of the first layer. A semiconductor light emitting device according to claim 1.
(3)前記活性層がInGaAsPからなり、前記第1
、第2のクラッド層がInPからなる特許請求の範囲第
1項または第2項記載の半導体発光素子。
(3) the active layer is made of InGaAsP;
3. The semiconductor light emitting device according to claim 1, wherein the second cladding layer is made of InP.
(4)前記活性層および前記第2のクラッド層のキャリ
ヤ濃度がそれぞれ1×10^1^8〜5×10^1^9
cm^−^3、1×10^1^7〜2×10^1^8c
m^−^3の範囲にある特許請求の範囲第3項記載の半
導体発光素子。
(4) The carrier concentration of the active layer and the second cladding layer is 1×10^1^8 to 5×10^1^9, respectively.
cm^-^3, 1 x 10^1^7 to 2 x 10^1^8c
The semiconductor light emitting device according to claim 3, which is in the range of m^-^3.
(5)前記活性層および前記第2のクラッド層の厚さが
それぞれ0.1〜2.0μm、0.2〜2.0μmの範
囲内である特許請求の範囲第4項記載の半導体発光素子
(5) The semiconductor light emitting device according to claim 4, wherein the active layer and the second cladding layer have thicknesses in the range of 0.1 to 2.0 μm and 0.2 to 2.0 μm, respectively. .
(6)前記活性層と前記第1、第2のクラッド層をそれ
ぞれ構成する半導体がInGaAsSb/InSb系、
GaAlAsSb/GaSb系、InGaAsP/Ga
As系、GaAlAsP/GaAs系のいずれかである
特許請求の範囲第1項または第2項記載の半導体発光素
子。
(6) The semiconductors constituting the active layer and the first and second cladding layers are InGaAsSb/InSb-based,
GaAlAsSb/GaSb system, InGaAsP/Ga
The semiconductor light emitting device according to claim 1 or 2, which is either As-based or GaAlAsP/GaAs-based.
JP60069713A 1985-04-02 1985-04-02 Semiconductor light emitting element Pending JPS61228684A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60069713A JPS61228684A (en) 1985-04-02 1985-04-02 Semiconductor light emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60069713A JPS61228684A (en) 1985-04-02 1985-04-02 Semiconductor light emitting element

Publications (1)

Publication Number Publication Date
JPS61228684A true JPS61228684A (en) 1986-10-11

Family

ID=13410744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60069713A Pending JPS61228684A (en) 1985-04-02 1985-04-02 Semiconductor light emitting element

Country Status (1)

Country Link
JP (1) JPS61228684A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436089A (en) * 1987-07-31 1989-02-07 Shinetsu Handotai Kk Light-emitting semiconductor device
FR2684805A1 (en) * 1991-12-04 1993-06-11 France Telecom OPTOELECTRONIC DEVICE WITH VERY LOW SERIAL RESISTANCE.
JP2006295040A (en) * 2005-04-14 2006-10-26 Nec Electronics Corp Optical semiconductor device, its manufacturing method, and optical communication equipment
WO2019216308A1 (en) * 2018-05-11 2019-11-14 Dowaエレクトロニクス株式会社 Semiconductor light-emitting element and method for manufacturing semiconductor light-emitting element

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213180A (en) * 1983-05-19 1984-12-03 Toshiba Corp Light emitting diode
JPS604277A (en) * 1983-06-22 1985-01-10 Nec Corp Light emitting diode

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213180A (en) * 1983-05-19 1984-12-03 Toshiba Corp Light emitting diode
JPS604277A (en) * 1983-06-22 1985-01-10 Nec Corp Light emitting diode

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436089A (en) * 1987-07-31 1989-02-07 Shinetsu Handotai Kk Light-emitting semiconductor device
FR2684805A1 (en) * 1991-12-04 1993-06-11 France Telecom OPTOELECTRONIC DEVICE WITH VERY LOW SERIAL RESISTANCE.
US5306923A (en) * 1991-12-04 1994-04-26 France Telecom Optoelectric device with a very low series resistance
JP2006295040A (en) * 2005-04-14 2006-10-26 Nec Electronics Corp Optical semiconductor device, its manufacturing method, and optical communication equipment
WO2019216308A1 (en) * 2018-05-11 2019-11-14 Dowaエレクトロニクス株式会社 Semiconductor light-emitting element and method for manufacturing semiconductor light-emitting element
JP2019197868A (en) * 2018-05-11 2019-11-14 Dowaエレクトロニクス株式会社 Semiconductor light emitting device and manufacturing method for semiconductor light emitting device

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