JP2006295040A - Optical semiconductor device, its manufacturing method, and optical communication equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an optical semiconductor device which can suppress a spread of p-type dopant to an active layer without performing strict film thickness control, and optical communication equipment mounted with it. <P>SOLUTION: The optical semiconductor device comprises at least an n-type semiconductor substrate, an active layer formed on the above-mentioned n-type semiconductor substrate, a cladding layer formed on the above-mentioned active layer, a contact layer formed on the above-mentioned cladding layer, and a p-type electrode formed just above the above-mentioned contact layer. The above-mentioned contact layer is formed by a layer contacting with a semiconductor layer in lattice matching which contacts with a second interface, an opposite face with respect to a first interface contacting with the above-mentioned p-type electrode. At least the p-type dopant exists near the above-mentioned first interface within the above-mentioned contact layer. The p-type dopant does not exists near the above-mentioned second interface within the above-mentioned contact layer, or the p-type dopant is lower in density than that near the above-mentioned first interface. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an optical semiconductor device such as a semiconductor laser, a semiconductor optical modulator, and a semiconductor light emitting / receiving element, a method for manufacturing the optical semiconductor device, and an optical communication device equipped with the semiconductor device.

  Supporting the rapid progress of the Internet, which has been rapidly expanding, is a technology for increasing the capacity of communication using optical fibers. The application range of the optical fiber communication network has been extended not only to the trunk line system but also to the access system and the subscriber system. In particular, with the development of optical communication technology for access systems and subscriber systems, demand for optical semiconductor devices such as semiconductor lasers as devices that support optical communication technology is expected to increase.

  In FTTH (Fiber-To-The-Home), which connects an optical fiber to each home, there is a strong demand for an inexpensive semiconductor laser that can withstand high-temperature operation. A semiconductor laser for an optical subscriber system must have a low threshold, a low driving current, and a low driving voltage in order to reduce power consumption. For this reason, a buried hetero (BH) type structure is generally employed.

  FIG. 9 is a perspective view of a BH type semiconductor laser according to a typical conventional example (see Patent Document 1 and Patent Document 2). As shown in the figure, the semiconductor laser 300 is composed of an InP substrate 301, an n-InP buffer layer 301a, an active layer 302 composed of InGaAsP, etc., a p-InP cladding layer 303a, p-InP, or a high-resistance InP. A current blocking layer 305, an n-InP current blocking layer 306, a p-InP overclad layer 303b, a p-InGaAs contact layer 307, and the like are provided. In addition, on the upper surface of the p-InGaAs contact layer 307, a p-type electrode 309a is provided on the back surface (hereinafter simply referred to as "back surface") with respect to the main surface on which the active layer 302 on the InP substrate 301 is formed. An n-type electrode 309b is formed. The active layer 302 usually has a multi-quantum well (MQW) structure composed of a plurality of well layers (well layers) and a barrier layer (barrier layer). The contact layer 307 is doped with high-concentration Zn in order to achieve a low resistance with the p-type electrode 309a. On the other hand, Zn is similarly doped in the cladding layer, but its doping concentration is lower than that of the contact layer.

A method of manufacturing the semiconductor laser 300 according to the conventional example will be described with reference to FIG. First, as shown in FIG. 10A, an n-InP buffer layer 301a, an active layer 302, and a p-InP cladding layer 303a are sequentially epitaxially grown on an InP substrate 301. Next, a SiO ₂ mask 304 is deposited to form a mesa forming mask. Next, the p-InP clad layer 303, the active layer 302, the n-InP buffer layer 301a, and the InP substrate 301 that are not covered with the mesa forming mask so as to have a mesa stripe shape as shown in FIG. Etch a part of.

Subsequently, a current blocking layer 305 and an n-InP current blocking layer 306 made of p-InP or high-resistance InP are sequentially formed on the side of the mesa stripe. Thereafter, after removing the SiO ₂ mask 304, the p-InP overclad layer 303b and the p-InGaAs contact layer 307 are sequentially formed by epitaxial growth. A semiconductor laser 300 is obtained by performing an electrode formation process on the wafer on which such epitaxial crystal growth has been performed (see FIG. 10C).

  However, in the semiconductor laser 300 according to the conventional example, Zn as the dopant in the contact layer 307 abnormally diffuses into the active layer 302 during the growth of the contact layer 307 that performs doping with high concentration of Zn. As a result, there is a problem that the deterioration of the element occurs. FIGS. 11A and 11B are schematic diagrams for explaining the energy band of the active layer 302 and the distribution of dopants in the vicinity of the active layer 302. FIG. The active layer 302 having the MQW structure includes a well layer (well layer) 302a having a low energy and a barrier layer (barrier layer) 302b having a higher energy. The active layer 302 has a structure sandwiched between an n-InP buffer layer 301a and a p-InP cladding layer 303a as shown in FIG. The hatching of the n-InP buffer layer 301a and the p-InP clad layer 303a shown in the figure indicates a region where the dopant exists.

  FIG. 11A shows the distribution state of the dopant at the stage where the n-InP layer 301a, the active layer 302, and the n-doped p-InP cladding layer 303a are stacked on the InP substrate 301 (see FIG. 10A). Yes. FIG. 11B shows a distribution state of the dopant in the vicinity of the active layer 102 after the buried growth (see FIG. 10C) and the overcladding layer growth (see FIG. 10D). At the stage where the n-InP buffer layer 301a, the active layer 302, and the p-InP clad layer 303a are stacked on the InP substrate 301, no diffusion of Zn into the active layer 302 is observed as shown in FIG. However, when embedded growth (see FIG. 10C) and overclad layer growth (see FIG. 10D) are performed, Zn is converted into a p-InP cladding layer by solid phase diffusion as shown in FIG. 11B. A region where the dopant is present appears in the active layer 302 on the side in contact with 303a (the range of the arrow 302c in FIG. 11). The dopant existing region in the active layer 302 becomes p-type, and the well layer 302a in the portion does not contribute to light emission.

As a method for avoiding the problem that Zn as a dopant in the contact layer is abnormally diffused into the active layer 302 during the growth in the contact layer, a method of reducing the doping concentration of the p-type impurity in the contact layer is conceivable. However, since the contact layer is a layer provided to reduce the contact resistance with the electrode metal, it is necessary to dope the p-type impurity at a high concentration from the original purpose of reducing the contact resistance.
Therefore, in order to prevent diffusion of Zn into the active layer 302, means for reducing the Zn doping concentration of the p-InP cladding layer 303a or non-doping the initial layer of the p-InP cladding layer 303a is known. As another method, a technique for suppressing Zn diffusion by forming a superlattice intermediate layer made of InAs and GaAs or InAs and GaP between a p-InGaAs contact layer and a p-InP cladding layer has been proposed. (Patent Document 3).

Japanese Patent Laid-Open No. 5-190970 JP 2004-95822 A JP 2000-68597 A (paragraph numbers 0004 to 5, FIG. 5)

However, in the means for reducing the Zn doping concentration of the p-InP cladding layer 303a or non-doping the initial layer of the p-InP cladding layer 303a, the reproducibility of the diffusion of Zn into the active layer cannot be obtained. There has been a problem that the element characteristics of the semiconductor laser vary.
Further, the technique described in Patent Document 3 has a problem of low productivity because it is essential to strictly control the film thickness of the superlattice intermediate layer. The reason why strict film thickness control must be performed is that the lattice mismatch between the superlattice intermediate layer and the InP substrate is large, and therefore, if strict film thickness control is not performed, lattice distortion occurs and crystal defects are likely to occur. It is. Once a crystal defect occurs, Zn diffusion increases on the contrary even though the superlattice intermediate layer is provided.

  In the above description, the problems in the semiconductor laser having the hetero structure are described. However, similar problems may occur in the semiconductor laser of the ridge type. Similar problems may occur not only in semiconductor lasers but also in general optical semiconductor devices such as semiconductor optical modulators and semiconductor light receiving elements. Further, although an example in which Zn diffuses into the active layer has been described, the present invention is not limited to this, and the same problem may occur in all p-type impurities.

  An optical semiconductor device according to the present invention includes an n-type semiconductor substrate, an active layer formed on the n-type semiconductor substrate, a clad layer formed on the active layer, and a contact formed on the clad layer. An optical semiconductor device comprising at least a p-type electrode formed directly on the contact layer, wherein the contact layer is a surface opposite to the first interface in contact with the p-type electrode. 2 formed by a layer that is lattice-matched with the semiconductor layer that is in contact with the interface, wherein at least a p-type impurity exists near the first interface in the contact layer, and a p-type impurity exists near the second interface in the contact layer Or the concentration of the p-type impurity is lower than the vicinity of the first interface.

  In the conventional example, as described above, there is a problem that p-type impurities doped in a high concentration in the contact layer are abnormally diffused in the active layer during the growth of the contact layer in the manufacturing process of the optical semiconductor device. As a result of extensive studies by the present inventor, the contact layer is formed of a layer lattice-matched with the semiconductor layer in contact with the second interface in the contact layer, and the vicinity of the second interface in the contact layer is the first interface. It has been found that the diffusion of the p-type impurity from the contact layer to the active layer can be suppressed by lowering the concentration of the p-type impurity from the vicinity (including the case where the p-type impurity is not present). In addition, by using a layer that is lattice-matched with the semiconductor layer in contact with the second interface in the contact layer, the contact layer does not require strict film thickness control as compared with Patent Document 3, and the contact layer The diffusion of p-type impurities from the layer to the active layer can be suppressed. Here, “lattice matching” means that the lattice constant difference is ± 0.1% or less.

  According to the present invention, there is an excellent effect that an optical semiconductor device capable of suppressing p-type impurity diffusion into an active layer and an optical communication device equipped with the optical semiconductor device can be obtained without performing strict film thickness control. is there.

  Hereinafter, an example of an embodiment to which the present invention is applied will be described. It goes without saying that other embodiments may also belong to the category of the present invention as long as they match the gist of the present invention.

[Embodiment 1]
FIG. 1 is a perspective view of the semiconductor laser according to the first embodiment. The buried (BH) structure type semiconductor laser 10 according to the first embodiment includes an n-InP substrate 1 as shown in FIG. On the n-InP substrate 1, an n-InP buffer layer 1a, an active layer 2, and a p-InP cladding layer 3a formed in a mesa shape are provided. Further, on the n-InP substrate 1 on which the active layer 2 or the like is provided (hereinafter referred to as a “main surface”) and the active layer 2 or the like is not formed, the p-side is in contact with the side wall of the mesa. The -InP current blocking layer 5 and the n-InP current blocking layer 6 are stacked in this order. On the p-InP cladding layer 3a and the n-InP current blocking layer 6, a p-InP overcladding layer 3b, a p-InGaAs first contact layer 7a, and a p-InGaAs second contact layer 7b are stacked in this order. Has been. A p-type electrode 9a is formed on the upper surface of the p-InGaAs second contact layer 7b. An n-type electrode 9 b is formed on the back surface (hereinafter referred to as “back surface”) with respect to the main surface of the n-InP substrate 1.

The active layer 2 has an MQW structure in which an InGaAsP well layer and an InGaAsP barrier layer are repeated. The p-InP cladding layer 3a, the p-InP overcladding layer 3b, the p-InGaAs first contact layer 7a, and the p-InGaAs second contact layer 7b are doped with Zn as a p-type impurity, respectively. The p-InGaAs first contact layer 7a and the p-InGaAs second contact layer 7b are latticed with an accuracy of ± 0.1% or less from the p-InP overclad layer 3b in contact with the p-InGaAs second contact layer 7b. Use the one that is consistent. The p-InGaAs second contact layer 7b is preferably doped with a sufficient amount of p-type impurities to achieve the purpose of reducing the contact resistance with the p-type electrode 9a. For example, it is 1 × 10 ¹⁹ cm ⁻³ or more. On the other hand, the p-InGaAs first contact layer 7a is set to have a lower p-type impurity doping concentration than the p-InGaAs second contact layer 7b. From the viewpoint of preventing more effective diffusion of p-type impurities into the active layer 2, the doping concentration of the p-InGaAs first contact layer 7a is preferably 5 × 10 ¹⁸ cm ⁻³ or less, and 3 × 10 ¹⁸ cm ^−3. More preferably, it is more preferably 1 × 10 ¹⁸ cm ⁻³ or less. The p-InGaAs first contact layer 7a may not be doped with p-type impurities at all.

  Hereinafter, a method for manufacturing the semiconductor laser 10 according to the first embodiment will be described with reference to FIG. In addition, the following manufacturing process is a typical example, and it cannot be overemphasized that another manufacturing method can be employ | adopted as long as it agree | coincides with the meaning of this invention.

FIG. 2 is a cross-sectional view showing the manufacturing process of the semiconductor laser 10. First, on an n-InP substrate 1, an n-InP buffer layer 1a, an active layer 2, and a p-InP clad layer 3a (film thickness: 0.5 μm) are formed by metal organic vapor phase thin film growth (hereinafter referred to as “MOVPE (metal- The layers are stacked in this order by epitaxial growth by “organic vapor phase epitaxy” method (see FIG. 2A). The active layer 2 is formed by repeatedly laminating an InGaAsP well layer 2a (film thickness 4.5 nm, energy band gap wavelength 1.4 μm) and an InGaAsP barrier layer 2 b (film thickness 10 nm, energy band gap wavelength 1.15 μm). To do. The n-InP buffer layer 1a under the active layer 2 uses Si as an n-type impurity and has a Si doping concentration of 1 × 10 ¹⁸ cm ⁻³ . The p-InP cladding layer 3a uses Zn as a p-type impurity, and the doping concentration of Zn is 1 × 10 ¹⁸ cm ⁻³ .

Next, SiO ₂ (thickness 300 nm) is formed on the epitaxially grown p-InP clad layer 3a by a thermal chemical vapor deposition (hereinafter abbreviated as “CVD (chemical vapor deposition)”) method. Then, patterning is performed by a photolithography method so as to form a stripe shape having a width of 1.5 μm. Using this SiO ₂ mask 4 as a mask, mesa etching with a depth of 2.0 μm is performed by inductively coupled plasma (hereinafter abbreviated as “ICP (inductive coupled plasma)”) dry etching to obtain a mesa stripe structure (FIG. 2 ( b)).

Subsequently, as shown in FIG. 2C, the p-InP current blocking layer 5 and the n-InP current blocking layer 6 are selectively embedded and grown on the side walls of the mesa stripe by the MOVPE method using the SiO ₂ mask 4. Are sequentially formed. Thereafter, the SiO ₂ mask 4 is removed by etching using a buffered hydrofluoric acid solution. 2D, the MOVPE method is used to form the p-InP overcladding layer 3b (film thickness 2.0 μm, Zn concentration 1.0 × 10 ¹⁸ cm ⁻³ ), p-InGaAs first contact layer 7a ( thickness 0.2 [mu] m, Zn concentration ^{1 × 10 18 cm -3),} p-InGaAs second contact layer 7b (thickness 0.2 [mu] m, a Zn concentration of 1 × ¹⁰ 19 ^{cm -3)} is formed by epitaxial growth.

  Next, the p-type electrode 9a is formed on the p-InGaAs second contact layer 7b. In the obtained wafer, the back surface of the n-InP substrate 1 is polished so that the film thickness of the n-InP substrate 1 is 150 μm, and then an n-type electrode 9b is formed on the back surface side of the n-InP substrate.

  In accordance with the above manufacturing method, a plurality of laser elements are formed on the substrate. And it cuts out so that element length may be set to 300 micrometers, and each laser element is obtained. A highly reflective film having a reflectivity of 70% is formed on the rear end face of the laser element thus formed, and a protective film having a reflectivity of 30% is formed on the front end face. Through such steps, the semiconductor laser 10 according to the first embodiment (see FIG. 1) is manufactured.

  When the electro-optical characteristics of the semiconductor laser 10 were evaluated, the laser oscillation threshold at −40 ° C. was 3.0 mA, the slope efficiency was 0.62 W / A, and the differential resistance at the threshold current was 4.2Ω. there were. The laser oscillation threshold value at 25 ° C. was 5.0 mA, the slope efficiency was 0.55 W / A, and the differential resistance at the threshold current was 4.3Ω. Further, the laser oscillation threshold at 85 ° C. was 16 mA, the slope efficiency was 0.42 W / A, and the differential resistance at the threshold current was 4.4Ω. According to the semiconductor laser 10 according to the first embodiment, it was found that low threshold operation and high efficiency operation can be realized in a wide temperature range.

  FIGS. 3A and 3B are schematic views for explaining the energy band of the active layer 2 and the dopant distribution in the vicinity of the active layer 2 of the semiconductor laser 10 according to the first embodiment. The active layer 2 having the MQW structure includes an InGaAsP well layer 2a having a low energy and an InGaAsP barrier layer 2b having a higher energy. The active layer 2 has a structure sandwiched between an n-InP buffer layer 1a and a p-InP cladding layer 3a as shown in FIG. The hatching of the n-InP buffer layer 1a and the p-InP clad layer 3a in the figure indicates a region where a dopant exists.

  FIG. 3A shows a dopant distribution state at the stage where the n-InP layer 1a, the active layer 2, and the n-doped p-InP cladding layer 3a are stacked on the InP substrate 1 (see FIG. 2A). Yes. FIG. 3B shows the distribution of the dopant in the vicinity of the active layer 2 after performing the buried growth (see FIG. 2B) and the overcladding layer growth (see FIG. 2C). As shown in FIG. 3A, at the stage where the n-InP layer 1a, the active layer 2, and the p-InP clad layer 3a are stacked on the InP substrate 1, no diffusion of Zn into the active layer 2 is observed.

  When embedded growth (see FIG. 2B) and overclad layer growth (see FIG. 2C) are performed, as shown in FIG. 3B, Zn is separated from the p-InP cladding layer 3a by solid phase diffusion. In the active layer 2 on the side in contact with the active layer 2, a region where a dopant is present appears slightly. However, the distance (hereinafter simply referred to as “diffusion length”) 3c where the dopant diffuses from the end face of the active layer 2 was measured by SIMS (Secondary Ion Mass Spectrometry) analysis and found to be 10 nm or less. Then, it was confirmed that Zn diffusion did not reach the well layer 2a serving as a laser emission source.

The reason why the semiconductor laser according to Embodiment 1 can suppress Zn diffusion into the active layer will be described below.
FIG. 4A shows a sample structure 50 used for analyzing the state where Zn diffuses into the active layer. As shown in FIG. 4A, the sample structure 50 includes an n-InP buffer layer 51a, an active layer 52 having an MQW structure, a p-InP cladding layer 53a, and a p-InP overlayer on an n-InP substrate 51. A cladding layer 53b, a p-InGaAs first contact layer 57a, and a p-InGaAs second contact layer 57b are provided.

A method for manufacturing the sample structure 50 will be described. First, an n-InP buffer layer 51a, an active layer 52 having an MQW structure, and a p-InP cladding layer 53a (Zn concentration 1 × 10 ¹⁸ cm ⁻³ , 0.5 μm thickness) are formed on the n-InP substrate 51 by the MOVPE method. Sequentially epitaxially grow. Next, a temperature corresponding to the epitaxial growth necessary for forming the current blocking layer on this wafer is given for a corresponding period of time, and a thermal history is added. Subsequently, the p-InP overcladding layer 53b (Zn concentration 1 × 10 ¹⁸ cm ⁻³ , 2.0 μm thickness), the InGaAs first contact layer 57a (0.2 μm thickness), and the p-InGaAs second contact layer are formed by MOVPE. 57b (Zn concentration 2 × 10 ¹⁹ cm ⁻³ , 0.2 μm thickness) is epitaxially grown in this order. At this time, sample structures were prepared by changing the Zn concentration of the InGaAs first contact layer 57a from non-doped to 2 × 10 ¹⁹ cm ⁻³ , and the Zn diffusion length was derived from these sample structures by SIMS analysis. Here, “Zn diffusion length” refers to a width in which Zn diffuses into the active layer from the end face of the active layer 52 in contact with the p-InP clad layer 53a (see reference numeral 3c in FIG. 3B).

FIG. 4B is a diagram in which the Zn diffusion length into the active layer 52 is plotted against the Zn doping concentration in the InGaAs first contact layer 57a. As shown in FIG. 4B, although the p-InP cladding layer 53a and the p-InP overcladding layer 53b are doped with Zn, the concentration of Zn doped in the InGaAs first contact layer 57a is increased. Depending on the results, the Zn diffusion length in the active layer was different. In addition, when Zn was not doped in the InGaAs first contact layer 57a, the active layer 52 was hardly diffused with Zn. Further, when the Zn concentration of the InGaAs first contact layer 57a is 5 × 10 ¹⁸ cm ⁻³ or less, the Zn diffusion length is abruptly reduced (Zn diffusion is suppressed). From these results, the diffusion of Zn into the active layer 52 is not caused by the p-InP clad layer 53a and the p-InP overclad layer 53b, but by the contact layer doped with Zn at a high concentration. I understand that

  According to the first embodiment, between the p-InP overcladding layer 3b and the p-InGaAs second contact layer 7b doped with Zn sufficient to realize low resistance with the p-type electrode, p Since the InGaAs first contact layer 7a having a lower Zn doping concentration than the InGaAs second contact layer 7b is inserted (see FIG. 2D), the InGaAs second contact layer 7b doped with Zn at a high concentration is activated. It is possible to suppress the diffusion of Zn into the layer 2 and to suppress a decrease in light emission efficiency due to the diffusion of Zn into the active layer 2 to form p-type. In addition, since the p-InGaAs second contact layer 7b can be doped with Zn at a high concentration necessary and sufficient to reduce the contact resistance with the p-type electrode 9a, the diffusion of Zn into the active layer 2 is suppressed. Good electro-optical characteristics can be realized.

  In the first embodiment, InP is used as the cladding layer, and InGaAs is used as the contact layer. InP / InGaAsP-based materials have a Zn diffusion rate that is highest for InP and lowest for InGaAs. For this reason, when InP is used as the cladding layer and InGaAs is used as the contact layer, the InGaAs first contact layer 7a having a lower concentration becomes Zn even when the InGaAs second contact layer 7b is doped with high concentration Zn. It serves as a diffusion stopper layer and can more effectively suppress Zn diffusion.

In addition, since the contact layer of the optical semiconductor device according to the first embodiment uses a layer that is lattice-matched with the p-InP overclad layer 3b, stricter film thickness control than that in Patent Document 3 is performed. Even if it is not performed, it is possible to avoid the problem that lattice distortion occurs and crystal defects occur. Therefore, it is possible to avoid the problem that crystal defects occur and Zn diffusion increases. And productivity can be improved.
With the semiconductor laser according to the first embodiment, a low threshold and high efficiency operation can be realized with good reproducibility and uniformity for the above reasons.

[Embodiment 2]
Next, an embodiment different from the semiconductor laser 10 according to Embodiment 1 will be described. FIG. 5 is a perspective view of the semiconductor laser according to the second embodiment. In the following description, the description of the same components as those of the first embodiment will be omitted as appropriate.

As shown in FIG. 5, the semiconductor laser 100 according to the present embodiment is a high mesa buried type semiconductor laser. FIG. 6 is a cross-sectional view showing the manufacturing process of the semiconductor laser 100. As shown in FIG. 6A, first, an n-InP buffer layer 101a, an active layer 102, and a p-InP clad layer 103 (film thickness: 2.5 μm, Zn concentration: 1 × 10 ¹⁸ cm) on an n-InP substrate 101. ^-3 ), p-InGaAs first contact layer 107a (film thickness 0.2 μm, Zn concentration 1 × 10 ¹⁸ cm ⁻³ ), and p-InGaAs second contact layer 107b (film thickness 0.2 μm, Zn concentration 1 ×). 10 ¹⁹ cm ⁻³ ) are epitaxially grown by the MOVPE method, and are stacked in this order. The structure of the active layer 102 is an MQW structure as in the first embodiment.

Next, SiO ₂ having a film thickness of 300 nm is formed on the entire surface of the epitaxially grown wafer by the CVD method, and patterned into a stripe having a width of 1.5 μm by photolithography. Using this SiO ₂ mask 104 as a mask, mesa etching with a depth of 4.0 μm is performed by ICP dry etching (see FIG. 6B). Next, as shown in FIG. 6C, the Fe-doped high-resistance InP current blocking layer 105 is selectively embedded and grown by the MOVPE method using the SiO ₂ mask 104. Further, the SiO ₂ mask 104 is removed by etching with a buffered hydrofluoric acid solution to complete crystal growth. Subsequently, after patterning the SiO ₂ mask 111 on the Fe-doped high resistance InP layer 105, a p-type electrode 109a is formed. Further, after polishing the n-InP substrate 101 to a film thickness of 150 μm, an n-type electrode 109b is formed on the n-InP substrate 101 side. Thereafter, similarly to the first embodiment, the wafer is cut out and a reflective film and the like are formed to obtain the semiconductor laser 100 (see FIG. 5).

  In the semiconductor laser 100 according to the second embodiment, since the InGaAs first contact layer 107a is inserted between the p-InP cladding layer 103 and the p-InGaAs second contact layer 107b, the active layer 102 is reached. It is possible to suppress the diffusion of Zn and suppress the decrease in light emission efficiency due to the diffusion of Zn into the active layer 102 to be p-type. In addition, since the p-InGaAs second contact layer 107b can be doped with Zn at a high concentration necessary and sufficient to reduce the contact resistance with the p-type electrode 109a, Zn diffusion into the active layer 102 can be suppressed. Good electro-optical characteristics can be realized. Further, since the contact layer of the semiconductor laser 100 according to the second embodiment uses a layer that is lattice-matched with the p-InP cladding layer 103, the film thickness is controlled more strictly than in the above-mentioned Patent Document 3. Even without this, it is possible to avoid the problem that lattice distortion occurs and crystal defects occur. As a result, a low threshold and high efficiency operation can be realized with good reproducibility and uniformity.

[Embodiment 3]
Next, an embodiment different from the semiconductor laser according to Embodiments 1 and 2 will be described. FIG. 7 is a perspective view of the semiconductor laser according to the third embodiment. In the following description, the description of the same components as those in the above embodiment will be omitted as appropriate.

The semiconductor laser 200 according to the third embodiment is a ridge-type semiconductor laser as shown in FIG. FIG. 8 is a cross-sectional view illustrating the method of manufacturing the semiconductor laser according to the third embodiment. As shown in FIG. 8A, first, on an n-InP substrate 201, an n-InP layer 201a, an active layer 202, a p-InP clad layer 203 (film thickness 2.5 μm, Zn concentration 1 × 10 ^18). cm ⁻³ ), InGaAs first contact layer 7 a (film thickness 0.2 μm, Zn concentration 1 × 10 ¹⁸ cm ⁻³ ), P-InGaAs second contact layer 7 b (film thickness 0.2 μm, Zn concentration 1 × 10 ^19). cm ⁻³ ) is epitaxially grown by the MOVPE method. At this time, the active layer 202 has an MQW structure, which is the same as that shown in the first embodiment.

Next, SiO ₂ having a film thickness of 300 nm is formed on the entire surface of the epitaxially grown wafer by the CVD method, and patterned into a stripe having a width of 1.5 μm by photolithography. Using this SiO ₂ mask 204 as a mask, mesa etching with a depth of 2.8 μm is performed by ICP dry etching (see FIG. 8B). Further, the SiO ₂ mask 204 is removed by etching with a buffered hydrofluoric acid solution to complete crystal growth. Next, after patterning the SiO ₂ mask 211 on the p-InP cladding layer 203, a p-type electrode 209a is formed. Further, the n-type electrode 209b is formed by the same method as in the first embodiment. Thereafter, the semiconductor laser 200 is obtained by cutting out by the same method as in the first embodiment to form a protective film and the like.

  According to the third embodiment, since the step of inserting the InGaAs first contact layer 207a between the p-InP clad layer 203 and the p-InGaAs second contact layer 207b is employed, the active layer 202 is made of Zn. Can be suppressed, and a decrease in light emission efficiency due to the diffusion of Zn into the active layer 202 to be p-type can be suppressed. In addition, since the p-InGaAs second contact layer 207b can be doped with Zn at a high concentration necessary and sufficient to reduce the contact resistance with the p-type electrode 209a, Zn diffusion into the active layer 202 can be suppressed. Good electro-optical characteristics can be realized. Furthermore, since the contact layer of the optical semiconductor device according to the third embodiment uses a layer that is lattice-matched with the p-InP cladding layer 203, the film thickness is controlled more strictly than in the above-mentioned Patent Document 3. Even without this, it is possible to avoid the problem that lattice distortion occurs and crystal defects occur. As a result, a low threshold and high efficiency operation can be realized with good reproducibility and uniformity.

  In the first to third embodiments, the contact layer may be changed to InGaAsP instead of InGaAs. Moreover, although the example of Zn as a doping substance was demonstrated, it is not limited to this, The present invention is applicable to p-type impurities in general. In the first to third embodiments, an example in which the contact layer includes only the first contact layer and the second contact layer has been described. However, the present invention is not limited to this, and any two or more layers may be used. It can be the number of layers. In the case of having n layers, for example, the p-type impurity concentration may be increased each time the stack is stacked. Moreover, you may be comprised only from 1 layer. In this case, the contact layer is configured so that at least the p-type impurity exists in the vicinity of the first interface in contact with the p-type electrode. On the other hand, in the vicinity of the second interface which is the surface opposite to the first interface in the contact layer, the p-type impurity is not present or the concentration of the p-type impurity is lower than that in the vicinity of the first interface. In addition, the p-type impurity concentration may be different in the thickness direction of the contact layer.

  Further, the film thickness and Zn concentration of the InGaAs first contact layer 7a are not limited to the values shown in the embodiment, and the optimum values may vary depending on the crystal growth conditions, the element structure, and the like. Further, in the first to third embodiments, an example of an InGaAsP semiconductor laser has been described. However, the present invention is not limited to this. The invention can be applied. For example, the same effect can be obtained with an AlGaInAs system. In the first to third embodiments, the semiconductor laser has been described as an example. However, the present invention is not limited to this, and general optical semiconductor devices such as a semiconductor optical modulator and a semiconductor light receiving element, and optical communication on which these are mounted. The present invention can be applied to an apparatus.

1 is a perspective view of a semiconductor laser according to Embodiment 1. FIG. FIG. 3 is a process diagram showing a method for manufacturing a semiconductor laser according to the first embodiment. (A) And (b) is a schematic diagram explaining the energy band figure of the active layer of the semiconductor laser concerning this embodiment, and the distribution state of a dopant. (A) is sectional drawing of the data structure in this experiment example, (b) is the figure which plotted the diffusion length of Zn to an active layer with respect to the dopant concentration in a 1st contact layer. FIG. 6 is a perspective view of a semiconductor laser according to a second embodiment. Process drawing which shows the manufacturing method of the semiconductor laser which concerns on this Embodiment 2. FIG. FIG. 6 is a perspective view of a semiconductor laser according to a third embodiment. Process drawing which shows the manufacturing method of the semiconductor laser which concerns on this Embodiment 3. FIG. Process drawing which shows the manufacturing method of the semiconductor laser concerning a prior art example. Process drawing which shows the manufacturing method of the semiconductor laser concerning a prior art example. (A) And (b) is a schematic diagram explaining the energy band figure of the active layer of the semiconductor laser which concerns on a prior art example, and the distribution state of a dopant.

Explanation of symbols

1, 101, 201, 301 Substrate 1a, 101a, 201a, 301a Buffer layer 2, 102, 202, 302 Active layer 2a, 302a Well layer 2b, 302b Barrier layer 3a, 103, 203, 303 Cladding layer 3b Over cladding layer 3c , 303c Zn diffusion length 4, 104, 204 SiO ₂ mask 5, 105, 305 Current blocking layer 6, 306 Current blocking layer 7a, 107a, 207a First contact layer 7b, 107b, 207b Second contact layer 9a, 109a, 209a 309a p-type electrodes 9b, 109b, 209b, 309b n-type electrodes 111, 211 SiO ₂ mask 307 contact layer

Claims (7)

an n-type semiconductor substrate;
An active layer formed on the n-type semiconductor substrate;
A cladding layer formed on the active layer;
A contact layer formed on the cladding layer;
An optical semiconductor device comprising at least a p-type electrode formed immediately above the contact layer,
The contact layer is formed of a layer lattice-matched with a semiconductor layer in contact with a second interface that is a surface opposite to the first interface in contact with the p-type electrode,
Near the first interface in the contact layer, there is at least a p-type impurity,
An optical semiconductor device in which no p-type impurity exists near the second interface in the contact layer, or the concentration of the p-type impurity is lower than that near the first interface. The optical semiconductor device according to claim 1,
An optical semiconductor device, wherein a doping concentration of the p-type impurity in the vicinity of the second interface is 5 × 10 ¹⁸ cm ⁻³ or less. The optical semiconductor device according to claim 1 or 2,
An optical semiconductor device, wherein the p-type impurity is Zn. The optical semiconductor device according to claim 1, 2, or 3,
The n-type semiconductor substrate is made of InP,
The cladding layer is made of InP,
2. The optical semiconductor device according to claim 1, wherein the contact layer is made of InGaAs or InGaAsP. The optical semiconductor device according to any one of claims 1 to 4,
The contact layer is formed by laminating at least two layers,
A p-type impurity is present in at least the uppermost layer of the contact layer that is farthest from the n-type semiconductor substrate,
The lowermost layer of the contact layer closest to the n-type semiconductor substrate has no p-type impurity, or the concentration of the p-type impurity is higher than the doping concentration of the p-type impurity in the uppermost layer. And fewer optical semiconductor devices.   An optical communication device equipped with the optical semiconductor device according to claim 1. forming an active layer on an n-type semiconductor substrate;
Forming a cladding layer on the active layer;
Forming a contact layer on the cladding layer;
An optical semiconductor device manufacturing method for forming a p-type electrode immediately above the cladding layer,
The contact layer is formed of a constituent element that is at least lattice-matched with a semiconductor layer in contact with a second interface that is a surface opposite to the first interface in contact with the p-type electrode;
The vicinity of the first interface in the contact layer is doped with at least a p-type impurity, and the vicinity of the second interface is not doped with a p-type impurity, or the doping concentration of the p-type impurity is higher than that of the first interface. A method for manufacturing an optical semiconductor device formed so as to be low.

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