KR890004478B1 - Burrus type semiconductor radiation device - Google Patents

Abstract

The invention is related to semiconductor LED in which a double hetero junction structure is formed by metal-organic CVD. The semiconductor is composed of III-V group compounds. The characteristic of the device is to decrease in diffusion resistance in a clad layer being away from an active layer, by injection carrier in the closet layer from the active layer of the clad layer which consists of multiple structures shielded. Multiple structures mean that compositions of both sides of the double heterojunction are different from each other.

Description

Varas type semiconductor light emitting device

1 is a cross-sectional view showing a schematic structure of a varass type light emitting device according to an embodiment of the present invention.

Fig. 2 (a), Fig. 2 (b) and Fig. 2 (c) are cross-sectional views showing the manufacturing process of the varass type light emitting device.

3 is a sectional view showing a schematic structure of another embodiment.

4 is a cross-sectional view showing a schematic structure of a conventional light emitting device.

* Explanation of symbols for the main parts of the drawings

11 substrate 12 buffer layer

13: first cladding layer 14: second cladding layer

15: third clad layer 16: active layer

17: P-type cladding layer 18: ohmic electrode

19 silicon dioxide film 20 P-type electrode

21: Au heat sink 22: N-type electrode

23: window _{33 1, 33 2 ~33 n:} N -type clad layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor light emitting devices, and more particularly, to a Varas type semiconductor light emitting device having a double hetero junction structure.

In recent years, optical subscriber system transmission systems are rapidly spreading. Among them, light emitting diodes are cheaper and more reliable than laser diodes, and eliminate the problem of mode noise caused by combination with multimode fiber. It is used as a major device in the optical subscriber transmission system because it can.

Conventionally, light emitting diodes have been grown by using the liquid layer growth method (LPE method), but this liquid layer growth method has generally had a small wafer area, poor uniformity, and difficult mass production. A manufacturing method for producing a light emitting diode using an organometallic gas phase growth method (MOCVB method) known as this excellent crystal growth technique has been attempted.

4 shows the structure of a typical Burrus type light emitting diode that emits light in the direction of a substrate fabricated by an organometallic vapor phase growth method, of which reference numeral 41 denotes an n-type GaAs substrate, and reference numeral 42 denotes an N-type GaAs substrate. Type GaAs buffer layer, 43 is N type GaA1As cladding layer, 44 is P type GaAs bonding layer, 47 is P type electrode, 48 is silicon dioxide film, 49 is Au heat sink, 50 is 51 represents an N-type electrode, and 51 represents a light output window, wherein the carrier concentration and thickness of each layer are as shown in the first table.

TABLE 1

However, since the concentration of the carrier of the N-type GaA1As cladding layer 43 is low as n = 2 × 10 ¹⁷ (cm ⁻³ ), the light emitting diode shown in FIG. 4 increases the diffusion resistance due to the current flowing through the two layers. Due to the heat generated by the diffusion resistance, there is a drawback that the light output of the light emitting diode is saturated. In the case of organometallic vapor phase growth, the N-type Gal-xAlxAs layer has a high A1As mixing ratio (X), so that the carrier concentration does not generally increase. Therefore, when the N-type cladding layer 43 is grown, this phenomenon occurs because the carrier concentration is not higher than n = 2 × 10 ¹⁷ (cm ⁻³ ).

On the other hand, if the A1As mixing ratio X of the N-type cladding layer 43 is reduced in order to reduce the diffusion resistance, the closing of the injection carrier is incompletely closed due to the double heterostructure, thereby lowering the light output. However, the above problem can be also applied to the case of employing the molecular linear stacked growth method (MBE method) instead of the organometallic vapor phase growth method.

The present invention has been invented to solve the above problems of conventional light emitting devices, and its object is to reduce the diffusion resistance of the cladding layer in the double hetero structure as well as to securely close the injection carrier. The present invention also provides a high output semiconductor semiconductor light emitting device having high productivity.

The core of the present invention makes the N-type cladding layer constituting one cladding layer of the double heterostructure to have a multi-layered structure with a different composition, and closes the injection carrier to the layer close to the active layer of the cladding layer to diffuse from the cladding layer far from the active layer. To lower the resistance.

In other words, the present invention relates to a clath implanted with an N-type impurity in a Barath type semiconductor light emitting device composed of a compound semiconductor material and having a double hetero structure produced by a vapor phase growth method such as an organometallic vapor phase growth method or a molecular beam deposition method. Not only does the layer have a larger forbidden bandwidth than the active layer, but its composition ratio is a multi-layered structure, and moreover, both the closing of the injection carrier and the reduction of diffusion resistance are satisfied by changing the mixing ratio of the N-type cladding layer. I made it possible.

According to the present invention as described above, it is possible to ensure the closing of the injection carrier by sufficiently widening the forbidden bandwidth of the layer close to the active layer among the N-type cladding layers, and narrowing the forbidden bandwidth of the layer far from the active layer to reduce the carrier concentration. By sufficiently high, the diffusion resistance in the clad layer can be made sufficiently small. Therefore, even if the organic metal vapor phase growth method or the molecular linear layer growth method is produced, the light emission output is not saturated or lowered, thereby improving productivity and increasing output.

Hereinafter, the configuration, operation, and effects of the present invention will be described in detail with reference to the illustrated drawings.

FIG. 1 is a cross-sectional view showing a schematic structure of a Varas type light emitting diode according to an embodiment of the present invention. FIG. 2 (a), 2 (b), and 2 (c) are manufacturing tests of the light emitting diode. As shown in FIG. 2A, first, the N-type GaAs buffer layer 12, the N-type GaA1As first cladding layer 13, and the N-type GaA1As are formed on the N-type GaAs substrate 11, as shown in FIG. The second cladding layer 14, the N-GaA1As third cladding layer 15, the P-GaAs active layer 16, and the P-type GaA1As cladding layer 17 are grown in this order by an organometallic vapor phase growth method.

In this case, the mixing ratio, carrier concentration and thickness of each layer are as shown in the following second table.

Here, Se is used as the N-type doping material and Zn is used as the P-type doping material, and the crystal growth temperature is set at 750 ° C. under which a good surface state is obtained.

TABLE 2

By the way, the numerical value is an example showing the most desirable conditions, this number may be changed according to the various specifications of the semiconductor.

의 범위에서 적의 변경시킬수가 있게된다.That is, for example, the GaAs mixing ratio of the first and third N-type cladding layers 13 and 15 in FIGS. 1 and 3 is 0.3 to 0.45, and the carrier concentration is n = 0.8 to ³ x 10 ¹⁷ cm ^-3. The thickness of the second cladding layer 14 is GaAs, the mixing ratio is 0.1 to 0.25, and the carrier concentration is 4 to 8 × 10 ¹⁷ cm ^-3 , and the thickness is 5 to. 20

Enemy can be changed within the range of.

)의 두께로 형성시킨 다음 포토 레지스트(photh-resist)를 마스크로하여, I₂-RI-H₂O(중량비 1 : 4 : 4)계통의 에칭액을 사용하여 직경 30(㎛)의 원형이 되게 오금전극(18)을 남기고 그 밖의 것은 에칭시켜 제거한 다음, 이어 계속해서 기상성장법을 써서 p형 전면에다 2산화규소막 (SiO₂막)(19)을두께 3000(

)로 되게 형성시킨 후 포토레지스트를 마스크로 하여 오옴전극(18)상의 2산환규소막(19)을 불화암모늄 용액으로 에칭시켜 제거한다.Next, as shown in FIG. 2 (b), the cathode electrode 18 made of AnZn (Zn 5%) f on the P-type cladding layer 17 is placed at 3000 to 4000 (

) To a circular shape having a diameter of 30 (占 퐉) using an etching solution of I ₂ -RI-H ₂ O (weight ratio 1: 4: 4) system using a photoresist as a mask. After leaving the electrode 18, the others were etched and removed, and then a silicon dioxide film (SiO ₂ film) 19 was deposited on the entire surface of the p-type using a vapor phase growth method.

), And the dicyclic silicon film 19 on the ohmic electrode 18 is etched away with an ammonium fluoride solution using a photoresist as a mask.

)과 Au(5000

)로써 되는 p형 전극(20)을 형성시킨 다음 계속하여 p형전극(20)상에 전계도금법에 의해 Au방열판(21)을 20(㎛)정도의 두께로 형성시킨다.Next, as shown in Fig. 2 (c), Cr (1000)

) And Au (5000

After the p-type electrode 20 is formed, the Au heat-dissipating plate 21 is formed on the p-type electrode 20 to a thickness of about 20 (占 퐉) by the electroplating method.

)및 1000(

)의 두께로 증착시켜 N형전극(22)을 형성시킨다.On the back of the substrate 11, AuGe (Ge00.5%) and Au were respectively 5000 (

) And 1000 (

The N-type electrode 22 is formed by depositing at a thickness of the?

Next, the N-type electrode 22 is removed by an etching method so as to mask the photoresist and face the ohmic electrode 18.

Finally, using the NH ₄ OH-H ₂ O-based etching solution, the N-type electrode 22 is used as a mask and the substrate 11 and the buffer layer 12 are extended to the depth of the N-type first cladding layer 13. As the light emitting window 23 is formed by removing by the etching method, the Barath type light emitting diode is completed as shown in FIG.

In this case, when the etching solution of NH ₄ OH-H ₂ O (weight ratio 1:30) is used, the etching rate of GaAs forming the substrate 11 and the buffer layer 12 is N-type first clad layer 13 (Ga). _Since the etching rate of _0.65 Al _0.35 As) is about 10 times faster, the first cladding layer 13 serves as an etching preventing film when forming the light emitting window 23. In addition, the light emitting diode shown in FIG. 1 is designed to mount the Au heat sink 21 on a stem (not shown).

The light emitting diodes formed as described above are N-type first to third cladding layers 13 to 15.

) Is larger than the forbidden band of the active layer 16, so that the light emitted from the active layer 16 is emitted without being absorbed from the inside, and the N-type cladding layer has a three-layer structure, so that the carrier is closed by a double hetero structure. In the third cladding layer 15 to reduce the series resistance of the light emitting diode in the second cladding layer 14 and to form an anti-etching film when forming the light emitting window 23. You can do it in (13).

Therefore, according to the present embodiment, since the injection carrier can be secured by the action of the third cladding layer 15, and the diffusion resistance can be reduced by the action of the second cladding layer 14, The effect of heat caused by series resistance does not decrease the luminous output, so the luminous property is good and the output can be increased. Furthermore, it can be mass-produced by crystallization of organic metal-based growth rice to improve productivity. Will be.

3 is a cross-sectional view showing a schematic structure of another embodiment, which differs from the embodiment described above in that the N-type cladding layer is formed in a multi-layered structure of three or more layers.

I.e. type buffer layer 12 and the type active layer 16 had a plurality of N-type GaA1As been installed clad layer _{(33 1, 33 2 ~33 n} ) between, in this case layer closer to the active layer 16 is injected into the carrier In order to ensure closure, the GaAs mixing ratio (X) needs to be 0.35 or more, while the central layer lowers the GaAs mixing ratio (X) to about 0.25 in order to sufficiently increase the carrier concentration. The layer needs to increase the GaAs mixing ratio (X) to some extent so that it can act as a barrier when etching GaAs. Even in such a structure, it is a matter of course that the same effect as in the above embodiment can be obtained.

In this embodiment, the GaAs mixing ratio in the N-type cladding layer can be varied step by step, and the mixing ratio can be changed almost continuously.

In addition, the present invention is not limited to the above-described embodiments, and various modifications can be made. For example, as the method for growing and forming the respective layers, not only an organometallic gas phase growth method but also a molecular beam deposition method can be used. The first cladding layer is not limited to an N-type cladding layer having three or more layers, but the etching rate of the second cladding layer is much slower than GaAs in etching GaAS as the substrate and the buffer layer. You can omit the two-layer structure.

In addition, not only the GaAs / GAa1As material but also an Inp / InGaAsP system or other III-V compound semiconductor material may be used. In addition, the present invention may be modified in various forms without departing from the spirit of the present invention.

Claims (5)

In the Varas type semiconductor light emitting device made of a compound semiconductor material and having a double heterostructure fabricated by vapor phase growth method, the cladding layers 13, 14, and 15 doped with N type impurities have a larger prohibited bandwidth than the active layer. On the other hand, the varass-type semiconductor light-emitting device characterized in that the composition ratio has a multi-layer structure having different. The N-type cladding layer having a different composition ratio has a two-layer structure, and the prohibition bandwidth of the layer (15) on the active layer (16) side is wider than the prohibition band width of the other layer (14). The N-type cladding layer having a different composition ratio has a three-layer structure in which a layer having a narrow forbidden band width (14) is sandwiched by a layer (13, 15) having a wide band width. The N-type cladding layer according to any one of claims 1 to 3, wherein a GaAs / GaA1AS-based material is used as the compound semiconductor material, and the N-type cladding layers having different composition ratios are made of Gal-xAlxAs, and the active layer side of the cladding layer AlAs mixing ratio (X) of the layer is set to 0.35 or more. The method of claim 1, wherein the vapor phase growth method uses an organometallic gas phase growth method or a molecular beam deposition method.

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