JPS61225933A - 3周波ト−ン信号検出用基準信号発生回路 - Google Patents
3周波ト−ン信号検出用基準信号発生回路Info
- Publication number
- JPS61225933A JPS61225933A JP60065065A JP6506585A JPS61225933A JP S61225933 A JPS61225933 A JP S61225933A JP 60065065 A JP60065065 A JP 60065065A JP 6506585 A JP6506585 A JP 6506585A JP S61225933 A JPS61225933 A JP S61225933A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- pulse
- frequency
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Manipulation Of Pulses (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Mobile Radio Communication Systems (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60065065A JPS61225933A (ja) | 1985-03-30 | 1985-03-30 | 3周波ト−ン信号検出用基準信号発生回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60065065A JPS61225933A (ja) | 1985-03-30 | 1985-03-30 | 3周波ト−ン信号検出用基準信号発生回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61225933A true JPS61225933A (ja) | 1986-10-07 |
JPH0369458B2 JPH0369458B2 (enrdf_load_stackoverflow) | 1991-11-01 |
Family
ID=13276178
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60065065A Granted JPS61225933A (ja) | 1985-03-30 | 1985-03-30 | 3周波ト−ン信号検出用基準信号発生回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61225933A (enrdf_load_stackoverflow) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04505526A (ja) * | 1989-04-14 | 1992-09-24 | マーティン・エイ・シュワルツ・リボカブル・(リビング)・1991・トラスト | アナログ/デジタル音声記憶セルラ電話 |
USRE37618E1 (en) | 1987-07-24 | 2002-04-02 | Richard J. Helferich | Analog/digital data storage system |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS548451A (en) * | 1977-06-21 | 1979-01-22 | Citizen Watch Co Ltd | Digital-type frequency adjusting circuit |
JPS59201518A (ja) * | 1983-04-28 | 1984-11-15 | Shinko Electric Co Ltd | 2相発振回路 |
-
1985
- 1985-03-30 JP JP60065065A patent/JPS61225933A/ja active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS548451A (en) * | 1977-06-21 | 1979-01-22 | Citizen Watch Co Ltd | Digital-type frequency adjusting circuit |
JPS59201518A (ja) * | 1983-04-28 | 1984-11-15 | Shinko Electric Co Ltd | 2相発振回路 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE37618E1 (en) | 1987-07-24 | 2002-04-02 | Richard J. Helferich | Analog/digital data storage system |
JPH04505526A (ja) * | 1989-04-14 | 1992-09-24 | マーティン・エイ・シュワルツ・リボカブル・(リビング)・1991・トラスト | アナログ/デジタル音声記憶セルラ電話 |
Also Published As
Publication number | Publication date |
---|---|
JPH0369458B2 (enrdf_load_stackoverflow) | 1991-11-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4151373A (en) | Data transmission system | |
US5170396A (en) | Data valid detector circuit for manchester encoded data | |
US3982195A (en) | Method and apparatus for decoding diphase signals | |
US4475085A (en) | Clock synchronization signal generating circuit | |
US5111486A (en) | Bit synchronizer | |
US8731006B2 (en) | Signal separating circuit, signal separating method, signal multiplexing circuit and signal multiplexing method | |
US4771442A (en) | Electrical apparatus | |
JPH11220385A (ja) | クロック信号生成回路及びデータ信号生成回路 | |
JPS61225933A (ja) | 3周波ト−ン信号検出用基準信号発生回路 | |
JPH10126329A (ja) | 移動体通信装置の受信回路 | |
US3249878A (en) | Synchronous signal generators | |
US6556592B1 (en) | Correction method for clock synchronization with ISDN in cell station for use in private-network-use PHS and a circuit therefor | |
US5859549A (en) | Digital audio frame and block synchonization | |
EP0587680A1 (en) | Method and apparatus for detecting a sequence of clock reference pulses | |
SU1290282A1 (ru) | Устройство дл синхронизации вычислительной системы | |
JP2859111B2 (ja) | クロック同期方法と装置 | |
JP3041935B2 (ja) | 位相制御回路 | |
JP3000712B2 (ja) | 位相制御回路 | |
JPH1098459A (ja) | クロック同期方式 | |
JPH0738554A (ja) | バースト信号位相制御回路 | |
JPH10308082A (ja) | データセパレータ | |
JPH08331189A (ja) | クロック位相同期回路 | |
JPS63229920A (ja) | バイフエ−ズ/nrz復号化回路 | |
JPH05252105A (ja) | Sat信号処理装置 | |
JPH08223044A (ja) | Fmデコーダ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |