JPS61224437A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a good ohmic contact between the conductive layers by destroying the nhutural oxide films to be formed on the interfaces between the substrate and the conductive CONSTITUTION:3000-Angstrom thick CVD oxide films 8 are respectively formed on field oxide films 2, a gate oxide film 4 and a gate electrode 5. Wiring layers 11 and 12 consisting of a 2000-Angstrom .

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to a semiconductor device and a method for manufacturing the same.

[Technical background of the invention and its problems]

BACKGROUND OF THE INVENTION Multilayer wiring technology has been widely adopted for the purpose of increasing the degree of integration of semiconductor devices, and as a result, MO8 type semiconductor devices have been developed in which wiring layers connected to source/drain regions are formed of polycrystalline silicon films.

Such semiconductor devices, such as N-channel MO8 type semiconductor devices, are manufactured by conventional methods. First, a field oxide film is formed as an element isolation region on the main surface of a P-type silicon substrate, a gate oxide film is formed on the surface of the island region of the substrate separated by the field oxide film, and then a gate oxide film is formed on the gate oxide film. Form an electrode. Using the field oxide film and gate electrode as a mask, an n-type impurity, such as phosphorus, is ion-implanted and activated.
Form source/drain regions of the mold. Then C on the entire surface
A VD oxide film is deposited, and contact holes are opened in the CVD oxide film corresponding to the source/drain regions. After depositing a polycrystalline silicon film over the entire surface again and performing phosphorus diffusion or ion implantation into this polycrystalline silicon film, heat treatment is performed at 950°C or higher to separate the source/drain regions in the contact hole and the polycrystalline silicon film. The natural oxide film formed at the interface is thermally destroyed to establish an ohmic connection between the source/drain region and the polycrystalline silicon film. Next, the polycrystalline silicon film is patterned to form source/drain wiring layers.

However, in the above MO8O8 type conductor device manufacturing method, the source/drain regions have been made shallower in recent years for the purpose of improving the degree of integration. The heat treatment temperature tends to be kept low, making it difficult to apply conventional high-temperature heat treatment.As a result, the natural oxide film formed at the interface between the source/drain region and the polycrystalline silicon film is not fully formed. A problem arose in that the ohmic connection between the source/drain region and the wiring layer made of the polycrystalline silicon film was no longer achieved.

In order to solve the above problem, recently, polycrystalline silicon l! is deposited inside the contact hole 9 as shown in FIG. Ions are implanted into the surface of the substrate 1 through 10 to degrade or destroy the natural oxide film formed at the interface between the source/drain regions and the polycrystalline silicon film, thereby forming a wiring layer consisting of the source/drain regions and the polycrystalline silicon film. A method of obtaining a good ohmic connection has come to be used.

However, with the recent miniaturization of semiconductor devices, the contact holes have also been reduced in size, and as shown in FIG. The polycrystalline silicon m10 deposited on the side surfaces of cvom conversion 1!8 touch each other and form the contact hole 9.
When the thickness of the polycrystalline silicon film 10 deposited inside the contact hole 9 is larger than that of the polycrystalline silicon film 10 deposited on the CvD oxide ridge outside the contact hole 9, the polycrystalline silicon film 10 deposited inside the contact hole 9 is Even if ions are implanted through the polycrystalline silicon film 10, the ions do not reach the surface of the substrate 1, causing sufficient deterioration or destruction of the natural oxide film formed at the interface between the source/drain region and the polycrystalline silicon film. Therefore, there is a problem in that a good ohmic connection between the source/drain region and the wiring layer made of polycrystalline silicon film cannot be obtained.

[Purpose of the invention]

The present invention has been made in consideration of the above-mentioned circumstances, and an object thereof is to provide a semiconductor device and a method for manufacturing the same, in which a good ohmic connection between a semiconductor substrate and a 1j electric layer can be obtained in a reduced contact hole. do.

[Summary of the invention]

In order to achieve the above object, a semiconductor device according to the present invention includes a semiconductor substrate, an insulating film having a contact hole formed on the semiconductor substrate, a surface of the semiconductor substrate and a surface of the insulating film in the contacts 1 to the hole. and a conductive layer deposited on the surface of the semiconductor substrate in the contact hole 7, the conductive layer being formed so that the thickness of the conductive layer deposited on the surface of the insulating film is equal to the thickness of the conductive layer deposited on the surface of the insulating film. It is characterized by the presence of As a result, an electric current is formed on the surface of the semiconductor substrate through the conductive layer deposited in the contact hole.
On-implantation is performed to degrade or destroy the natural oxide film at the interface between the semiconductor substrate and the conductive layer, thereby obtaining a good ohmic connection between the semiconductor substrate and the conductive layer. .

Further, the method for manufacturing a semiconductor device according to the present invention includes a first step of forming an insulating film on a semiconductor substrate, a second step of opening a contact hole in the insulating film, and a step of forming the semiconductor device in the contact hole. a third step of depositing a conductive layer having the same thickness on the surface and the surface of the insulating film, and implanting ions into the surface of the semiconductor substrate through the conductive layer deposited in the contact hole; A fourth step of degrading or destroying the natural oxide film at the interface with the 'y4 electric layer. This provides a good ohmic connection between the semiconductor substrate and the conductive layer.

[Embodiment of the Invention] FIG. 1 shows a cross section of a semiconductor device according to an embodiment of the invention. P of specific resistance 1 to 10 Ω-1 and plane orientation (100)
The island region of the type silicon substrate 1 is separated by a field oxide 1a2 having a thickness of 4000 nm and a P-type anti-inversion layer 3 below the field oxide 1!2. On the surface of the island region of this substrate 1 there is a gate oxide 1!4 with a thickness of 250 mm, and a gate I-electrode 5 is formed on this gate oxide IIJ. Further, in the island region of the substrate 1, there are n+ type source/drain regions 6.7. A CVDM film 8 having a thickness of 3000 Å is formed on the field oxide film 2, the gate oxide 1114, and the gate electrode 5.
．． A contact hole 9 corresponding to 7 is opened. On the surface of the source/drain region 6.7 in this contact hole 9 and on the surface of the CVD oxide film 8, a wiring layer 11.1 made of a polycrystalline silicon film with a thickness of 2000 nm and ion-implanted with phosphorous is formed.
For example, by setting the minimum dimension of the contact hole 9 to be more than twice the thickness of the wiring layer 11, 12 made of a polycrystalline silicon film, the source/drain inside the contact hole 9 can be formed. The thickness of wiring layer 11.12 made of polycrystalline silicon film formed on the surface of regions 6 and 7 is approximately equal to the thickness of wiring layer 11.12 made of polycrystalline silicon film formed on the surface of CVD oxide film 8. It is distinctive in that it is Another feature is that the thickness of the wiring layers 11 and 12 made of this polycrystalline silicon film is smaller than the thickness of the CVD oxide film 8, which is 3000 cm. This allows the implanted ions to reach the surfaces of the source and drain regions 6 and 7 when ions are implanted into the surfaces of the source and drain regions 6 and 7 through the polycrystalline silicon film formed in the contact hole 9. . Furthermore, wiring layers 11 and 12 made of a CVD oxide film 8 and a polycrystalline silicon film
(7) The CvD11I film 13 is a protective film on top.

As described above, according to this embodiment, the thickness of the wiring layers 11 and 12 made of polycrystalline silicon films formed on the surfaces of the source/drain regions 6 and 7 in the contact hole 9 is equal to the thickness of the CvD oxidized wA.
Wiring layer 1 made of polycrystalline silicon film formed on the surface of 8.
Since the thickness is equal to 1.12, ions are implanted into the surface of the source/drain regions 6.7 through the polycrystalline silicon film formed in the contact hole 9, and the source/drain regions 6, 7 and the polycrystalline silicon film are bonded. It becomes possible to degrade or destroy the natural oxide film formed at the interface of
6. Source/drain regions without high-temperature heat treatment.
A good ohmic connection between the wiring layers 11 and 12 made of polycrystalline silicon film can be obtained.

Next, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIG. First, specific resistance 1~10Ω-1,
A field oxide film 2 with a thickness of 4,000 mm is formed as an element isolation region on the main surface of a p-type silicon substrate 1 with a plane orientation of (100) by boron ion implantation technology and selective oxidation technology. P-type inversion prevention 11
3 (FIG. 2(a)). Next, the field oxide film 2 is subjected to thermal oxidation treatment in a dry oxygen atmosphere.
After growing gate oxide M4 to a thickness of 250 nm on the surface of the island region of the substrate 1 separated by 1, a polycrystalline silicon film with a thickness of 3500 nm is deposited on the entire surface, and this polycrystalline silicon film is grown in an atmosphere of POCj3. Then, phosphorus is diffused to lower the resistance of the polycrystalline silicon film, and then the polycrystalline silicon film is patterned using a photo etching technique to form the gate electrode 5. After that, using the field oxide 112 and the gate electrode 5 as a mask, an n-type impurity such as arsenic is added at an accelerating voltage of 4.
Ion implantation is performed under the following conditions: 0ke■, dose 15X 1015++-21), and an activation process is performed to form n+ type source/drain regions 6.7 in the island region of the substrate 1 (
Figure 2(b)).

Next, after depositing a CVD oxide film 8 to a thickness of 3000 mm over the entire surface, CVD oxide film 8 is
Contact hole 9 in D oxide 11!8 and gate oxide film 4
(Fig. 2 (C)), and then coated the entire surface with a thickness of 20 mm.
00, but for example, the minimum dimension of the contact hole 9 is set to polycrystalline silicon I! 111
By setting the thickness to more than twice the thickness of 0 to 2000, the C in the contact hole 9 is reduced as shown in FIG. 3(b).
The polycrystalline silicon films 10 deposited on the side surfaces of the VD oxide film 8 touch each other to form the source/drain region 6 in the contact hole 9.
．． The thickness of the polycrystalline silicon film 10 deposited on the surface of 7 is 2.
000A, and the thickness of the polycrystalline silicon film 10 deposited on the surface of the source/drain region 6.7 in the contact hole 9 is the same as the thickness of the polycrystalline silicon film 10 deposited on the surface of the CVDFl film 8. The feature is that it is equal to 20008. Also, the thickness of this polycrystalline silicon SIO is 2000A by CVD oxidation! 8(7) It is also characterized by its small thickness of 3000A. As a result, when ion implantation of phosphorus is performed at the interface between the polycrystalline silicon film 10 and the substrate 1 and the entire surface using a proton in the next step (FIG. 2(d)), the source/drain regions 6.7 in the contact hole 9 are Phosphorus at a concentration of 5×10 20,−3 is implanted into the interface between the polycrystalline silicon 1110 and the polycrystalline silicon 1110, and the natural oxide film at the interface is destroyed.

Note that instead of ion-implanting phosphorus, other impurities such as arsenic (As), boron (B), and boron fluoride (BF2) are used.
), silicon (Si), or argon (Ar) may be ion-implanted.Next, the polycrystalline silicon 1110 is buttered by photo-etching technology to connect to the source/drain region 6.7 through the contact hole 9. Form source/drain wiring IJiJ711.12 (
Figure 2(e)).

Next, after depositing a CVD oxide film 13 as a protective film on the entire surface, heat treatment is performed at 900° C. (FIG. 2(f)). Thereafter, a contact hole (not shown) is opened in the °cvoiw film 13 according to a conventional method, and source/drain arrangement 1!1i11,12 is performed by vapor deposition of AN, II and patterning.
An n-channel MO8 type semiconductor device is manufactured by forming an Aj wiring layer that is connected to through a contact hole.

As described above, according to this embodiment, the natural oxide film at the interface between the source/drain region 6.7 in the contact hole 9 and the polycrystalline silicon film 10 is destroyed, so that the high-temperature heat treatment at 950° C. or higher is performed. source/drain region 6
, 7 and the wiring (111.12) made of polycrystalline silicon film can be obtained.

〔Effect of the invention〕

As described above, according to the present invention, a good ohmic connection between a semiconductor substrate and a conductive layer can be obtained in a reduced contact hole, so that a highly integrated semiconductor device capable of high-speed operation and high reliability can be achieved. can be provided.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a process diagram showing a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a conventional semiconductor device. FIG. 1... Semiconductor substrate, 2... Field oxide film, 3...
... Inversion prevention layer, 4... Gate oxide film (n+ impurity region) 5... Gate electrode, 6, 7... Source/drain region, 8.13... Oxide film, 9... Contact Hole, 10... Polycrystalline silicon film, 11.12... Wiring layer. Applicant's representative Kiyoshi Inomata Figure 2

Claims (1)

[Claims] 1. A semiconductor substrate, an insulating film having a contact hole formed on the semiconductor substrate, and a conductive layer deposited on the surface of the semiconductor substrate and the surface of the insulating film in the contact hole. The conductive layer is formed so that the thickness of the conductive layer deposited on the surface of the semiconductor substrate in the contact hole is approximately equal to the thickness of the conductive layer deposited on the surface of the insulating film. Semiconductor equipment. 2. A semiconductor device according to claim 1, wherein the diameter of the contact hole is larger than twice the thickness of the conductive layer. 3. A semiconductor device according to claim 1 or 2, wherein the thickness of the conductive layer is smaller than the thickness of the insulating film. 4. A first step of forming an insulating film on a semiconductor substrate, a second step of forming a contact hole in the insulating film, and forming a thickness on the semiconductor substrate surface and the insulating film surface in the contact hole, respectively. a third step of depositing a conductive layer with the same conductive layer and implanting impurity ions into the surface of the semiconductor substrate through the conductive layer deposited in the contact hole to form a natural oxide film at the interface between the semiconductor substrate and the conductive layer; a fourth step of degrading or destroying the semiconductor device. 5. The method according to claim 4, wherein the diameter of the contact hole opened in the second step is
A method for manufacturing a semiconductor device, characterized in that the conductive layer is formed to have a thickness greater than twice the thickness of the conductive layer deposited in the step. 6. In the method of manufacturing a semiconductor device according to claim 4 or 5, the thickness of the conductive layer deposited in the third step is determined by adjusting the thickness of the insulating film deposited in the first step. A method for manufacturing a semiconductor device, characterized in that the semiconductor device is formed to have a thickness smaller than that of the semiconductor device. 7. The semiconductor device according to any one of claims 4 to 6, wherein the impurity is one of phosphorus, arsenic, boron, boron fluoride, silicon, and argon. manufacturing method.