JPS6122352U - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS6122352U
JPS6122352U JP1984108343U JP10834384U JPS6122352U JP S6122352 U JPS6122352 U JP S6122352U JP 1984108343 U JP1984108343 U JP 1984108343U JP 10834384 U JP10834384 U JP 10834384U JP S6122352 U JPS6122352 U JP S6122352U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit device
flow
coating resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984108343U
Other languages
Japanese (ja)
Other versions
JPH0322917Y2 (en
Inventor
保一 池田
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP1984108343U priority Critical patent/JPS6122352U/en
Publication of JPS6122352U publication Critical patent/JPS6122352U/en
Application granted granted Critical
Publication of JPH0322917Y2 publication Critical patent/JPH0322917Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図および第２図は従来の混成集積回路装置の要部を
破断した斜視図、第３図ａ， ｂはこの考案の一実施例
を示す平面図およびＡ−Ａ線による断面図、第４図ａ，
ｂはこの考案の他の実施例を示す平面図およびＢ−Ｂ
線による断面図である。 図中、１はセラミック基板、２はマウント台、３は半導
体素子、４は金属細線、５はブリッジ、６はＪＣＲ，
７はバンク、８，９はスルーホール、１０．１１は固定
部である。 なお、図中の同一符号は同一または相当部分を示す。1 and 2 are perspective views with main parts of a conventional hybrid integrated circuit device cut away, FIGS. Figure 4a,
b is a plan view showing another embodiment of this invention and B-B
FIG. In the figure, 1 is a ceramic substrate, 2 is a mount, 3 is a semiconductor element, 4 is a thin metal wire, 5 is a bridge, 6 is a JCR,
7 is a bank, 8 and 9 are through holes, and 10.11 is a fixed part. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 混成集積回路基板上に載置された半導体素子を保護する
ためのジャンクションコーテインクレジンを塗布する際
の前記シャンクションコーティングレジンの流れ止め枠
を設けた混成集積回路装置において、前記流れ止め枠を
前記混成集積回路基板の一定位置に位置決め固定する構
成としたことを特徴とする混成集積回路装置。In a hybrid integrated circuit device provided with a flow-preventing frame for the junction coating resin when applying a junction coating resin for protecting semiconductor elements mounted on a hybrid integrated circuit board, the flow-preventing frame is A hybrid integrated circuit device characterized in that it is configured to be positioned and fixed at a fixed position on a hybrid integrated circuit board.
JP1984108343U 1984-07-16 1984-07-16 Hybrid integrated circuit device Granted JPS6122352U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984108343U JPS6122352U (en) 1984-07-16 1984-07-16 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984108343U JPS6122352U (en) 1984-07-16 1984-07-16 Hybrid integrated circuit device

Publications (2)

Publication Number Publication Date
JPS6122352U true JPS6122352U (en) 1986-02-08
JPH0322917Y2 JPH0322917Y2 (en) 1991-05-20

Family

ID=30667539

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984108343U Granted JPS6122352U (en) 1984-07-16 1984-07-16 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6122352U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5764160U (en) * 1980-10-06 1982-04-16
JPS57170542A (en) * 1981-04-14 1982-10-20 Seiko Keiyo Kogyo Kk Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5764160U (en) * 1980-10-06 1982-04-16
JPS57170542A (en) * 1981-04-14 1982-10-20 Seiko Keiyo Kogyo Kk Semiconductor device

Also Published As

Publication number Publication date
JPH0322917Y2 (en) 1991-05-20

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