JPS61196390A - Ic card - Google Patents
Ic cardInfo
- Publication number
- JPS61196390A JPS61196390A JP60038007A JP3800785A JPS61196390A JP S61196390 A JPS61196390 A JP S61196390A JP 60038007 A JP60038007 A JP 60038007A JP 3800785 A JP3800785 A JP 3800785A JP S61196390 A JPS61196390 A JP S61196390A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- card
- conductive
- semiconductor
- embedded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 34
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims description 6
- 230000015654 memory Effects 0.000 abstract description 3
- 230000006386 memory function Effects 0.000 abstract description 3
- 229910052782 aluminium Inorganic materials 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 239000000758 substrate Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 230000000994 depressogenic effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 210000003097 mucus Anatomy 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07743—External electrical contacts
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
この発明は記憶回路、制御回路等の半導体装置を埋設し
た薄形のＩＣカードに関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention This invention relates to a thin IC card in which semiconductor devices such as a memory circuit and a control circuit are embedded.
従来の技術
近年、ＩＯ，ＬＳＩを内蔵して大容量のメモリー機能を
持ち、キャッシュカード、クレジットカード等種々の機
能を発揮するいわゆるＩＣカードの開発が行なわれてい
る。このＩＣカードは携帯性を重要視するならば従来の
磁気ストライプ部を背面に設けた磁気ストライプカード
あるいはカードに孔を設けたシ凹凸を設けたエンボスカ
ードと同様にその厚さは少なくとも１ｆｆ以下望ましく
は０．７６１１に薄くする必要があり、また、カードの
折曲げに対して、内蔵したＸＣ，Ｌ、ＳＩの破損や回路
導体の断線を防ぐ念゛め実装面積も著しるしく小さくす
る必要がある。2. Description of the Related Art In recent years, so-called IC cards have been developed that have built-in IO and LSI, have large capacity memory functions, and perform various functions such as cash cards and credit cards. If portability is important to this IC card, it is desirable that its thickness be at least 1 ff or less, similar to a conventional magnetic stripe card with a magnetic stripe section on the back or an embossed card with a hole in the card. It is necessary to reduce the thickness to 0.7611, and the mounting area also needs to be significantly reduced to prevent damage to the built-in XC, L, and SI and disconnection of circuit conductors when the card is bent. be.
第４図は一般的なＩＣカードにおけるカードに埋設した
ＩＣ，ＬＳＩチップの実装モジュールを示している。FIG. 4 shows a mounting module of IC and LSI chips embedded in a general IC card.
ガラスエポキシ基板１等にムＵメッキ処理した導体配線
３が形成され、基板１上の一方にはＩＣ。Conductor wiring 3 coated with U-plating is formed on a glass epoxy substrate 1, etc., and an IC is mounted on one side of the substrate 1.
ＬＳＩチップ２がダイポンドされ、かつワイヤー４で導
体配線３と接続されている。また基板１上の他方には電
気的信号の入出力を行なうために、外部回路と接続する
ための複数の端子群５が形成されている。第６図は第４
図の平面図を示したものである。前記基板１は樹脂で形
成されたカード６に、該カード形成時に埋設もしくは装
着され、第６図に示すように前記端子群６のみが露出す
る様に樹脂フィルムによシ形成されるものである。An LSI chip 2 is die-bonded and connected to conductor wiring 3 with wires 4. Further, on the other side of the substrate 1, a plurality of terminal groups 5 for connection with external circuits are formed for inputting and outputting electrical signals. Figure 6 is the 4th
FIG. 3 shows a plan view of the figure. The substrate 1 is embedded or attached to a card 6 made of resin when the card is formed, and is formed of a resin film so that only the terminal group 6 is exposed, as shown in FIG. .
発明が解決しようとする問題点 しかし、このような構成にあっては、ＩＣ。The problem that the invention aims to solve However, in such a configuration, the IC.
ＬＳＩチップを搭載する領域と端子群の領域が同一平面
に位置するために基板１０寸法が大きくなり、折曲げ等
により導体配線の断線を招きやすいものであった。また
ＩＣ，ＬＳＩチップの実装がダイポンディングやワイヤ
ポンディングを用いているために、接続箇所が、ＩＣ，
ＬＳＩチップ上の電極部と基板上の導体配線の２箇所も
存在し、接続の信頼性を低下せしめるものである。また
、ワイヤーポンディングによる接続を行なっているため
に、前記ワイヤーがＩｃ、ＬＳＩチップの表面から少な
くとも０．３ ｆｆはみ出してしまったり、あるいはダ
イポンディングを行なうため、基板１の厚さを０．２ｆ
ｆ以上にしなければならない。仮にＩＣ：、ＬＳＩチッ
プの厚さが０．２ ｔｍの場合、実装モジュールの厚さ
は０．７ ｔｍに達し、カード６に装着する際、保護用
フィルムの厚さも加算され、カード全体の厚さは１ｎ以
上になり著しるしく実用性を欠くものであった。Since the area where the LSI chip is mounted and the area where the terminal group is located are located on the same plane, the dimensions of the board 10 become large, and the conductor wiring is likely to break due to bending or the like. In addition, since IC and LSI chips are mounted using die bonding and wire bonding, the connection points are
There are also two locations: the electrode section on the LSI chip and the conductor wiring on the substrate, which reduces the reliability of the connection. Furthermore, since the connection is made by wire bonding, the wires may protrude by at least 0.3 ff from the surface of the IC or LSI chip, or the thickness of the substrate 1 may be reduced by 0.2 ff due to die bonding.
Must be greater than or equal to f. If the thickness of the IC:,LSI chip is 0.2 tm, the thickness of the mounted module will reach 0.7 tm, and when it is attached to the card 6, the thickness of the protective film will be added, and the total thickness of the card will be The diameter was 1n or more, which was extremely impractical.
そこで、本発明は、ＩＣ，ＬＳＩチップをカードに装着
、内蔵させた時、実装モジュールの厚さが薄く、実装面
積が小さく、かつ信頼性が高くなるようにしようとする
ものである。Therefore, the present invention aims to provide a mounted module with a thin thickness, a small mounting area, and high reliability when an IC or LSI chip is mounted on a card and incorporated therein.
問題点を解決するための手段 上記問題点を解決するため本発明では、ＩＣ。Means to solve problems In order to solve the above problems, the present invention uses an IC.
ＬＳｘの半導体装置の所定の電極端子上に金属突起を形
成し、これ自体をカード内に装着、内蔵せしめ前記金属
突起のみをカード表面に露出させるものである。Metal protrusions are formed on predetermined electrode terminals of the LSx semiconductor device, and the protrusions themselves are mounted and built into the card, with only the metal protrusions exposed on the card surface.
作用
このようにＩＣ，ＬＳＩの半導体装置の電極端子上に金
属突起を形成し、カードに前記半導体装置の外寸と合致
する凹部を形成し、これに前記半導体装置を配設してお
き、前記金属突起のみがカード表面から露出した構成、
すなわち外部端子と信号の授受を行なう端子を半導体装
置上に形成したものであるから、実装モジュールの面積
が小さくなり、かつ厚さを薄くでき、接続箇所を低減で
きるものである。Operation In this way, metal protrusions are formed on the electrode terminals of semiconductor devices such as ICs and LSIs, a recess is formed in the card that matches the outer dimensions of the semiconductor device, and the semiconductor device is disposed in this recess. A configuration in which only the metal protrusions are exposed from the card surface.
That is, since the terminals for exchanging signals with external terminals are formed on the semiconductor device, the area of the mounted module can be reduced, the thickness can be reduced, and the number of connection points can be reduced.
実施例 第１図に本発明の一実施例を示す。Example FIG. 1 shows an embodiment of the present invention.
半導体装置２の表面に導電性突起１０が形成されており
、カード６を構成する支持体１２に設けた凹部１２１Ｌ
に前記半導体装置２が埋設される。A conductive protrusion 10 is formed on the surface of the semiconductor device 2, and a recess 121L is provided in the support 12 constituting the card 6.
The semiconductor device 2 is buried therein.
支持体１２の表面にはフィルム１３が設けられ、少なく
とも前記半導体装置２の導電性突起１０のみが露出した
構成となっている。前記半導体装置は、メモリーもしく
はｃ、ｐ、ｕとメモリー機能を有した半導体集積回路で
ある。前記埋設した半導体装置と外部回路（図示せず）
との信号の授受を行なうため、外部信号端子１１が、前
記導電性突起１ｏと接する事になる。A film 13 is provided on the surface of the support 12, so that at least only the conductive projections 10 of the semiconductor device 2 are exposed. The semiconductor device is a memory or a semiconductor integrated circuit having c, p, u and memory functions. The buried semiconductor device and external circuit (not shown)
In order to exchange signals with the external signal terminal 11, the external signal terminal 11 comes into contact with the conductive protrusion 1o.
次に導電性突起１０の形成方法について説明する。第２
図において、半導体装置２の所定の電極から延在したア
ルミ電極２１に保護用の５ｉｎ２゜Ｓｉ、Ｎ４等の絶縁
膜２１が前記アルミ電極２１上のみを開孔するように形
成される。次に、ｃｒ−Ｃｕ。Next, a method for forming the conductive projections 10 will be explained. Second
In the figure, an aluminum electrode 21 extending from a predetermined electrode of a semiconductor device 2 is provided with a protective insulating film 21 of 5 inch 2° Si, N4, etc., with holes formed only on the aluminum electrode 21. Next, cr-Cu.
Ｔｉ−Ｐｄ等の多層金属膜２２が、少なくとも前記アル
ミ電極２１を覆う如く被着、形成され、ついで電解メッ
キ法により、前記多層金属膜２２上に、選択的に導電性
突起１０を形成せしめる。前記導電性突起１ｏは、外部
信号端子と直接、接するもので少なくとも、その表面は
ムＵで構成され、外寸は、１ｏＯ〜６００μｍ程度の大
きさである。A multilayer metal film 22 such as Ti--Pd is deposited and formed to cover at least the aluminum electrode 21, and then conductive protrusions 10 are selectively formed on the multilayer metal film 22 by electrolytic plating. The conductive protrusion 1o is in direct contact with an external signal terminal, and at least its surface is made up of a mucus U, and its outer size is about 1oO to 600 μm.
前記導電性突起１０が形成されれば、カードの支持体１
２に設けた凹部１２ａに埋設し、前記導電性突起１０が
露出するようにフィルム１３で、半導体装置表面および
支持体を覆うものである。Once the conductive protrusions 10 are formed, the card support 1
The film 13 is buried in a recess 12a provided in the semiconductor device 2 and covers the surface of the semiconductor device and the support body so that the conductive protrusion 10 is exposed.
前記導電性突起１０は、前記フィルム１３表面から突出
しても良いし、同一表面、あるいは幾分、落ち込んだ状
態のいづれでも良い。The conductive protrusions 10 may protrude from the surface of the film 13, may be on the same surface, or may be somewhat depressed.
第３図は他の実施例である。FIG. 3 shows another embodiment.
半導体装置２のアルミ電極２ｏ上には弾性を有する導電
性突起１０′が設けられ、前記導電性突起１０′は、支
持体上のフィルム１３０表面よりも突出するか、もしく
は同一表面、あるいは落ち込んだ構成である。弾性を有
する導電性突起１０′の材料としては、例えばシリコー
ン樹脂の如く柔軟性の材料にＣ，ムｇ、Ｎｉ、Ａｕ
等の微粉末もしくは繊維を分散させた状態のものを用い
る事ができる。An elastic conductive protrusion 10' is provided on the aluminum electrode 2o of the semiconductor device 2, and the conductive protrusion 10' protrudes from the surface of the film 130 on the support, is flush with the surface of the film 130, or is depressed. It is the composition. The elastic conductive protrusion 10' may be made of a flexible material such as silicone resin, C, Mg, Ni, or Au.
It is possible to use a fine powder such as or one in which fibers are dispersed.
また、この様な材料においては、その分散の仕方によシ
加圧した時のみ導電性を有する構成とすることもでき、
これらの構成においては、静電気による半導体装置の破
かいを防止できる。Furthermore, depending on the way the material is dispersed, it can be configured to have conductivity only when pressurized.
In these configurations, damage to the semiconductor device due to static electricity can be prevented.
弾性を有する導電性突起１０′の構成は、前記半導体装
置２のアルミ電極２ｏ上に直接成形加工し、設置しても
良いし、フィルム１３に前記アルミ電極２ｏと対応した
位置に孔を設け、この孔に前記導電性突起１０′を埋設
せしめ、カード本体に、前記半導体装置２を埋設する段
階において、半導体装置２のアルミ電極２ｏと位置合せ
し、接着剤２３等で固定するものである。The elastic conductive protrusion 10' may be formed by directly molding and installing it on the aluminum electrode 2o of the semiconductor device 2, or by providing a hole in the film 13 at a position corresponding to the aluminum electrode 2o. The conductive protrusion 10' is embedded in this hole, and when the semiconductor device 2 is embedded in the card body, it is aligned with the aluminum electrode 2o of the semiconductor device 2 and fixed with an adhesive 23 or the like.
発明の効果
以上のように本発明によれば次のような効果を得ること
ができる。Effects of the Invention As described above, according to the present invention, the following effects can be obtained.
（１）本発明の構成では外部信号端子と接する、半導体
装置側の電極を直接半導体装置自体に形成しているため
に、従来の如く配線基板を必要としない。したがって著
しるしく製造コストを低減できるものである。(1) In the configuration of the present invention, since the electrodes on the semiconductor device side that are in contact with external signal terminals are formed directly on the semiconductor device itself, there is no need for a wiring board as in the prior art. Therefore, manufacturing costs can be significantly reduced.
（２）また、接続点数が少ないために接続の信頼性が高
い。(2) Also, the reliability of the connection is high because the number of connection points is small.
（３）半導体装置の外寸が実装面積であるいわゆるチッ
プサイズ実装で、従来の方法よりも実装面積を小さくで
きるばかシでなく、カードへの埋設が容易であり薄型カ
ード特有の曲げ応力に対しても、実装面積が小さいため
に、その影響を受けにくい。したがって、配線を損傷す
る等の事故がないものである。(3) So-called chip size mounting, in which the external dimensions of the semiconductor device are the mounting area, allows the mounting area to be smaller than conventional methods, is easy to embed in the card, and is resistant to the bending stress peculiar to thin cards. However, since the mounting area is small, it is less affected by this. Therefore, there will be no accidents such as damage to the wiring.
（４） また、導電性突起を加圧した時のみ導電性を
有する材料で構成すれば、静電気等に対して、前記半導
体装置を安全に保護できるものであ°る。(4) Furthermore, if the conductive protrusions are made of a material that is conductive only when pressurized, the semiconductor device can be safely protected against static electricity and the like.
第１図は本発明の一実施例のＩＣカードの要部構成を示
す断面図、第２図、第３図は同ＩＯカードにおける半導
体装置の電極上に導電性突起を形成した状態を示す断面
図、第４図は従来のＩＣカードの構成を示す断面図、第
６図は第４図の平面図、第６図は実装基板を埋設した従
来のＩＣカードの平面図である。
２・・・・・・半導体装置、６・・・・・・カード、１
０・・・・・・導電性突起、１０′・・・・・・弾性を
有する導電性突起、１１・・・・・・信号端子。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図 ２−≠１）不１
２ １２αFIG. 1 is a cross-sectional view showing the main structure of an IC card according to an embodiment of the present invention, and FIGS. 2 and 3 are cross-sectional views showing conductive protrusions formed on the electrodes of the semiconductor device in the same IO card. 4 is a sectional view showing the structure of a conventional IC card, FIG. 6 is a plan view of FIG. 4, and FIG. 6 is a plan view of a conventional IC card in which a mounting board is embedded. 2... Semiconductor device, 6... Card, 1
0... Conductive protrusion, 10'... Elastic conductive protrusion, 11... Signal terminal. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2-≠1) Not 1 2 12α
Claims (3)
前記導電性突起の表面を露出させて、カード本体に埋設
せしめ、前記導電性突起に外部端子を接触させて信号の
授受を行なうように構成したＩＣカード。(1) A semiconductor device having conductive protrusions formed thereon is embedded in a card body with at least the surface of the conductive protrusions exposed, and external terminals are brought into contact with the conductive protrusions to transmit and receive signals. IC card.
の範囲第１項記載のＩＣカード。(2) The IC card according to claim 1, wherein the conductive projections are made of metal.
特徴とする特許請求の範囲第１項記載のＩＣカード。(3) The IC card according to claim 1, wherein the conductive projections are made of an elastic conductive material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60038007A JPS61196390A (en) | 1985-02-27 | 1985-02-27 | Ic card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60038007A JPS61196390A (en) | 1985-02-27 | 1985-02-27 | Ic card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61196390A true JPS61196390A (en) | 1986-08-30 |
Family
ID=12513513
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60038007A Pending JPS61196390A (en) | 1985-02-27 | 1985-02-27 | Ic card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61196390A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63139976U (en) * | 1987-03-05 | 1988-09-14 |
-
1985
- 1985-02-27 JP JP60038007A patent/JPS61196390A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63139976U (en) * | 1987-03-05 | 1988-09-14 |
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