JPH104122A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent an electrical short-circuit from being generated between surface patterns and a semiconductor chip by a method wherein the surface patterns are formed only within the region, which is arranged in opposition to the inside of the chip on the surface of a substrate. SOLUTION: Pads 12 consisting of a conductive film are formed on them surface of a semiconductor chip 11, while substrate surface patterns 16 are formed only within the region, which is arranged in opposition to the inside of the chip 11 on the surface of a substrate 14. The chip 11 is bonded to the substrate 14 in opposition to the substrate 14 with an anisotropic conductive bonding agent 13 and is fixed on the substrate 14. As a result, the patterns 16 are respectively connected with substrate rear patterns 17 via conductors filled in connection holes 15 to penetrate the substrate 14. Accordingly, as a pattern does not exist on the outside of the chip 11, an insulating film is never broken at the end parts of the chip 11 at the time of dicing of a semiconductor wafer, and an electrical short-circuit is never generated between the patterns 16 and the chip 11 by conductive particles in the bonding agent 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device,
More specifically, the present invention relates to a semiconductor device which is particularly suitable for producing a thin IC card or a memory card.

[0002]

2. Description of the Related Art A conventional thin semiconductor device is disclosed in, for example, an electronic information and communication handbook (Ohm Co., April 30, 1990).
This is described on page 842 of the 1st edition of the 2nd printing of Japan. This semiconductor device has a semiconductor chip 31 as shown in FIG.
And a substrate 34 are fixed to each other by an anisotropic conductive adhesive 33 so as to face each other. The pad 32 made of a conductive film formed on the semiconductor chip 31 and the surface pattern 35 such as wiring formed on the substrate 34 are electrically connected to each other by bumps or the anisotropic conductive adhesive 33. I have.

Such a connection is made by arranging the surface of the semiconductor chip 31 on which the pad 32 is formed and the surface of the substrate 34 on which the surface pattern 35 is formed so as to face each other. being called. In the case of the face-down bonding shown in FIG. 3, the anisotropic conductive adhesive 33 has a large number of small conductive particles dispersed in an organic adhesive.
The conductive particles interposed between the pad 32 and the surface pattern 35 are pressed against the pad 32 and the substrate pattern 35, and a current is applied between the two.

[0004]

However, the semiconductor device having the above-mentioned conventional structure has the following problems. In other words, a semiconductor wafer is divided into a plurality of semiconductor chips by dicing. Since the dicing is performed by rotating a plate in which diamond particles are embedded at a high speed, chipping called chipping occurs in the semiconductor chips with a certain probability. Would.

FIG. 4 shows a portion where the edge of the semiconductor chip 41 has been chipped by dicing. As is apparent from FIG. 4, when the edge of the semiconductor chip 41 is chipped, the oxide film 43 formed on the semiconductor chip 41 is partially cut off, and an adhesive 42 is formed on the chipped portion.
When the conductive particles 47 in the semiconductor chip 4 are inserted, the surface pattern 45 formed on the surface of the substrate 46 and the semiconductor chip 4
1 is electrically short-circuited, and the semiconductor chip 41 cannot operate normally. Although the above prior art was originally designed to manufacture a thin IC card or memory card having a thickness of 1 mm or less, it was difficult to put into practical use due to such a problem.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems of the prior art and to eliminate the possibility of chipping at the time of dicing and to provide an electrical connection between a surface pattern formed on the surface of a substrate and a semiconductor chip. A thin I
An object of the present invention is to provide a semiconductor device capable of forming a C card or a memory card.

[0007]

In order to achieve the above object, a semiconductor device according to the present invention comprises a semiconductor chip and a semiconductor chip, which is disposed to face the semiconductor chip and is bonded to the semiconductor chip via an anisotropic conductive adhesive. Substrate, a pad made of a conductor film formed on the main surface of the semiconductor chip on the substrate side, and a surface formed of a conductor formed on the surface of the substrate on the main surface side of the semiconductor chip At least a pattern, the pad and the surface pattern are electrically connected to each other via conductive particles contained in the anisotropic conductive adhesive, and the surface pattern is formed on the surface of the substrate. It is formed only in a region inside the semiconductor chip, and does not extend outside the semiconductor chip.

That is, if the surface pattern extends not only in the region inside the semiconductor chip but also in the region outside, the insulating film is broken near the end of the semiconductor chip during the dicing. As a result, the semiconductor chip and the surface pattern are electrically connected to each other. However, in the present invention, since the surface pattern is formed only in the region inside the semiconductor chip and does not extend to the region outside the semiconductor chip, the insulating film of the semiconductor chip is broken during dicing of the semiconductor wafer. Therefore, there is no possibility that the semiconductor substrate and the surface pattern are electrically short-circuited.

The front surface pattern is electrically connected to a back surface pattern made of a conductor film formed on the back surface of the substrate via a conductor filled in a connection hole penetrating the substrate. Can be configured. With this configuration, since the extraction from the surface pattern to the outside is not performed on the surface of the substrate, an electrical short circuit between the semiconductor substrate and the surface pattern is effectively prevented.

Instead of using the back surface pattern, an in-substrate pattern made of a conductive film is formed in a desired portion inside the substrate in the direction of the surface of the substrate, and the surface pattern is formed in a connection hole formed in the substrate. It can be electrically connected to the above-mentioned pattern in the substrate via a conductor filled therein.

The in-substrate pattern may include first and second in-substrate patterns having different distances from the substrate surface, but different distances from the substrate surface.

The surface pattern and the connection hole can be formed substantially only in a region inside the pad. In this way, the required area is reduced and the integration density is improved.

A preferable result can be obtained if the thickness of the semiconductor chip is 200 μm or less and 0.1 μm or more.
If it is 200 μm or more, it becomes weak against bending stress and easily breaks, and if it is 0.1 μm or less, it becomes difficult to form a desired semiconductor circuit on a semiconductor chip.

If the substrate is a first card substrate, and the semiconductor chip is arranged on the neutral surface of the second card substrate and the first card substrate formed on the back surface of the semiconductor chip, the substrate is bent. On the other hand, various cards that are extremely hard to be damaged can be formed. The number of the card boards can be further increased.

A plurality of card substrates can be used, and a thin plate of a flexible plastic such as polyethylene terephthalate or polyvinyl chloride can be used as the card substrate. A preferable result can be obtained if the thickness of the card substrate is set to 20 μm to 300 μm.

As the semiconductor chip, a memory LSI or a microcomputer can be used.
m or less and 50 μm or more can be obtained.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention can be effectively used in the field of thin IC cards and memory cards, and can be used for general semiconductor mounting, packaging technology, surface mounting technology and bare chip mounting technology. It can be applied to a wide range of applications.

The conductive particles contained in the anisotropic conductive adhesive used for bonding the semiconductor chip and the substrate include, for example, gold-plated plastic particles, nickel particles or gold particles as described above. Various types such as balls can be used.

In the present invention, the thickness of the semiconductor chip is set to 200
The thickness can be reduced to a micron or less, whereby an extremely thin IC card can be realized. Further, by arranging the semiconductor chip on the neutral surface of the two cards, a thin IC card with high performance and high resistance to bending is realized. If this semiconductor chip is, for example, a memory LSI or a microcomputer, and the substrate is formed into a card shape and the thickness of the completed card is 1 mm or less, a memory using a flash memory or the like, which is widely used in digital cameras and the like. The card is realized. However, if the thickness is less than 50 μm, it becomes practically inconvenient. Therefore, the thickness of the completed various cards is preferably in the range of 50 μm to 1 mm.

As the card substrate, a thin plate of various flexible plastics such as polyethylene terephthalate (PET) and polyvinyl chloride can be used as described above, and the thickness is 20 μm to 300 μm, usually about 200 μm.
It is preferably about μm. Usually, two upper and lower card substrates are used, and the semiconductor chip is fixed between the two card substrates by a conductive adhesive.

Although the present invention can be applied to various cards, an example of the planar structure thereof is shown in FIG. In this case, a coil 75, a thin capacitor 74, and a thin integrated circuit 72 formed by a printing method as conductive patterns are arranged on the card substrate 73, and as shown in FIG. It is electrically connected.

The coil 75 receives an electromagnetic wave from the outside, generates an induced electromotive force, and supplies energy to the thin capacitor 74. Further, the coil 75 has a function of receiving information data from the outside, passing the data to the thin capacitor 74, and sending the data of the thin capacitor 74 to the outside of the card as an electromagnetic wave. As a result, a communication card having high contactless reliability is realized.

[0023]

【Example】

<Embodiment 1> FIG. 1 is a sectional view showing a first embodiment of the present invention. As shown in FIG. 1, a pad 12 made of a conductive film is formed on a surface of a semiconductor chip 11 made of Si, and the semiconductor chip 11 has a substrate surface pattern 16 made of a conductive film. Substrate 1 formed on
4 and are bonded and fixed to each other by an anisotropic conductive adhesive 13.

The pad 12 and the substrate surface pattern 16
Are formed at positions facing each other, and the anisotropic conductive adhesive 13 contains conductive particles having a particle size of 5 to 10 μm dispersed therein. Therefore, the conductive particles sandwiched between the pad 12 and the substrate surface pattern 16 serve as an electrical connection medium, and the pad 12 and the substrate surface pattern 16 are electrically connected to each other via the conductive particles. . These conductive particles are used for the anisotropic conductive adhesive 13.
, No lateral conduction occurs, and there is no risk of an electrical short between adjacent pads 12. As the conductive particles, as described above, for example, various types such as those obtained by plating the surfaces of plastic particles with gold, nickel particles, and gold balls can be used.

As shown in FIG. 1, the substrate surface pattern 16 is formed only inside the semiconductor chip 11 and does not go outside the semiconductor chip 11.

The substrate surface pattern 16 corresponds to the semiconductor chip 11
, The conductive particles in the anisotropic conductive adhesive 13 electrically short-circuit the substrate surface pattern 16 and the semiconductor chip 11 near the end of the semiconductor chip 11. There is fear.

However, in this embodiment, the substrate surface pattern 12 is formed only inside the semiconductor chip 11,
The semiconductor chip 11 is connected to a substrate back surface pattern 17 made of a conductive film via a conductor filled in a connection hole 15 penetrating the substrate 14 inside the semiconductor chip 11, and leads from the back surface of the substrate 14 to the outside of the semiconductor chip 11. A line is drawn. Therefore, the substrate surface pattern 16 does not exist outside the semiconductor chip 12, and as a result, the insulating film 43 is not damaged by the conductive particles at the end of the semiconductor chip 12. There is no possibility that the chip 11 is electrically short-circuited.

FIG. 2 is a diagram showing a planar arrangement of the semiconductor device of this embodiment corresponding to FIG. FIG. 1 shows a cross-sectional structure taken along the line AA ′ of FIG. As described above, the semiconductor chip 11 is connected face-down on the substrate 14 by the anisotropic conductive adhesive 13. Pad 12
Is a substrate surface pattern 1 using a well-known alignment technique.
6 are formed corresponding to the predetermined positions. Each substrate surface pattern 16 is connected to the substrate back surface pattern 17 by a conductor filled in the connection hole 15, taken out of the semiconductor chip 11, and connected to a terminal of another component formed on the substrate 14 (see FIG. (Not shown).

As described above, the main surface side of the semiconductor chip 11 and the surface of the substrate 14 are adhered to each other by the anisotropic conductive adhesive. The substrate surface pattern 16 made of a conductor formed on the surface of the substrate 14 does not come out of the semiconductor chip 11 and all of the semiconductor chip 1
Since the conductive particles are formed inside the semiconductor chip 11, an electrical short circuit due to the conductive particles at the end of the semiconductor chip 11 is completely prevented.

The substrate surface pattern 16 formed on the surface of the substrate 14 is connected to the semiconductor chip 11 from the back side of the substrate 14 through the connection hole 15 and the substrate back surface pattern 17.
Drawn out of the In the case of various cards and the like, it is common that the substrate has at least two layers, so that such a structure can be formed by utilizing the existing technology used for mass production, and is economical. No problems occur.

<Embodiment 2> In Embodiment 1 shown in FIG. 1, the substrate surface pattern 1 formed on the surface of the substrate 14
6 is connected to the substrate 1 through a connection hole 15 penetrating the substrate 14.
4 was connected to the substrate back surface pattern 17 formed on the back surface side and was taken out of the semiconductor chip 11.

This embodiment is an example in which a conductive pattern for taking out to the outside is provided in a substrate using a connection hole which does not penetrate the substrate.

As shown in FIG. 5, also in this embodiment, the main surface side of the semiconductor chip 11 is opposed to the surface of the substrate 14 and bonded to each other by the anisotropic conductive adhesive 13 as in the above embodiment. ing. However, in the present embodiment, the first and second substrate inner layer patterns 54 and 58 for taking out the substrate surface pattern 52 to the outside are formed at different positions in the substrate 56 at different depths. It is electrically connected to the substrate surface pattern 52 via conductors filled in different connection holes 55 and 57.

Also in this embodiment, the conductor substrate surface pattern 59 formed on the surface of the substrate 56 is formed only inside the semiconductor chip 51 and has no portion that goes outside the semiconductor chip 51. As in Example 1, an electrical short circuit caused by the conductive particles at the end of the semiconductor chip 51 was completely prevented.

<Embodiment 3> A third embodiment of the present invention is shown in FIG.
This will be described with reference to FIG. In this embodiment, the main surface of the semiconductor chip 61 is opposed to the surface of the substrate 66, and the two are bonded to each other by the anisotropic conductive adhesive 63. Substrate 5
Since the positions of the substrate surface pattern 69 and the connection holes 65 and 67 formed on the surface of the semiconductor chip 6 were within the range of the pad 62 formed on the semiconductor chip 61, the pattern density was significantly improved.

That is, as shown in FIG. 6, in this embodiment, the semiconductor chip 61 on which the pads 62 are formed on the surface is different from the substrate 66 on which the substrate surface pattern 69 is formed on the surface. It is adhered by the conductive adhesive 63. The substrate surface pattern 69 is connected to the first substrate inner layer pattern 64 and the second substrate inner layer pattern 63 via the first connection hole 65 and the second connection hole 67, respectively. As in the first and second embodiments, the substrate back surface pattern 69a allows the back surface of the semiconductor chip 61 to be used freely.

In this embodiment, the substrate surface pattern 69 and the first and second connection holes 65 and 67 connected thereto are provided.
But the pad 6 formed on the semiconductor chip 61
2 and hardly protrudes outside the pad 62, and is formed substantially only inside the pad 62. Therefore, the area occupied by the substrate surface pattern 69 is significantly reduced, and many terminals can be taken out at extremely high density. In this embodiment,
The example where the conductive pattern was formed inside the substrate was shown,
It is needless to say that the same effect can be obtained when the back surface pattern 17 as shown in FIG. 1 is used.

[0038]

As is apparent from the above description, according to the present invention, the substrate surface pattern formed on the substrate is formed only inside the semiconductor chip and does not extend outside the semiconductor chip. . Therefore, the semiconductor chip and substrate
When the semiconductor chip is attached to the substrate face-down by the anisotropic conductive adhesive, it is possible to effectively prevent the occurrence of an electric short circuit at the end of the semiconductor chip, and to significantly improve the reliability of the semiconductor device.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a first embodiment of the present invention;

FIG. 2 is a plan view showing Embodiment 1 of the present invention;

FIG. 3 is a cross-sectional view illustrating a structure of a conventional semiconductor device.

FIG. 4 is a cross-sectional view illustrating an electrical short circuit;

FIG. 5 is a sectional view showing a second embodiment of the present invention;

FIG. 6 is a sectional view showing a third embodiment of the present invention;

FIG. 7 is a diagram showing a planar arrangement of components in a card according to the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 11 ... Semiconductor chip, 12 ... Pad, 13 ... Anisotropic conductive adhesive, 14 ... Substrate, 15 ... Connection hole, 16 ... Substrate surface pattern, 17 ... Substrate back surface pattern, 31 ... Semiconductor chip, 32 ... Pad, 33 ... Anisotropic conductive adhesive, 34: substrate, 35: substrate surface pattern, 41: semiconductor chip, 4
2: adhesive, 43: oxide film, 45: substrate surface pattern,
46: substrate, 47: conductive particles, 51: semiconductor chip,
52: pad, 53: anisotropic conductive adhesive, 54, 58 ...
Board inner layer pattern, 55, 57 ... connection hole, 56 ... board,
59: substrate front surface pattern, 59a: substrate rear surface pattern,
61: semiconductor chip, 62: pad, 63: anisotropic conductive adhesive, 64, 68: substrate inner layer pattern, 65, 67 ...
Connection hole, 66: substrate, 69: substrate surface pattern, 69a
... Substrate back pattern, 72. Integrated circuit, 73. Card substrate, 74. Thin capacitor, 75. Coil.

Claims (13)

[Claims] 1. A semiconductor chip, a substrate disposed opposite to the semiconductor chip and bonded to the semiconductor chip via an anisotropic conductive adhesive, and formed on a main surface of the semiconductor chip on the substrate side. And a surface pattern made of a conductor formed on a surface of the substrate on the main surface side of the semiconductor chip, wherein the pad and the surface pattern are formed of the anisotropic conductive film. Electrically connected to each other through conductive particles contained in the conductive adhesive,
The semiconductor device, wherein the surface pattern is formed only in a region inside the semiconductor chip on the substrate surface. 2. The front surface pattern is electrically connected to a back surface pattern made of a conductor film formed on a back surface of the substrate via a conductor filled in a connection hole penetrating the substrate. The semiconductor device according to claim 1, wherein 3. An in-substrate pattern made of a conductive film is formed in a desired portion inside the substrate in the direction of the surface of the substrate, and the surface pattern is formed in a connection hole formed in the substrate. 2. The semiconductor device according to claim 1, wherein the conductive pattern is electrically connected to the in-substrate pattern through a filled conductor.
3. The semiconductor device according to claim 1. 4. The semiconductor device according to claim 3, wherein said in-substrate pattern includes first and second in-substrate patterns at different distances from said substrate surface. 5. The semiconductor device according to claim 1, wherein the surface pattern and the connection hole are substantially formed only in a region inside the pad. 6. The semiconductor device according to claim 1, wherein said semiconductor chip has a thickness of 200 μm or less and 0.1 μm or more. 7. The semiconductor device according to claim 1, wherein the substrate is a first card substrate, and the semiconductor chip is disposed on a second card substrate formed on a back surface of the semiconductor chip and a neutral surface of the first card substrate. The semiconductor device according to claim 1, wherein: 8. The semiconductor device according to claim 7, wherein a plurality of said card substrates are provided. 9. The semiconductor device according to claim 7, wherein said card substrate is made of a flexible plastic. 10. The semiconductor device according to claim 9, wherein said flexible plastic is polyethylene terephthalate or polyvinyl chloride. 11. The card substrate has a thickness of 20 μm to 30 μm.
The semiconductor device according to claim 7, wherein the thickness is 0 μm. 12. The semiconductor device according to claim 1, wherein said semiconductor chip is a memory LSI or a microcomputer. 13. The semiconductor device according to claim 1, wherein the total thickness is 1 mm or less and 50 μm or more.