JP2001156097A - Electronic circuit, lsi chip mounting structure and method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an LSI chip mounting structure by which an enough connection reliability can be ensured without destroying the LSI chip and bonding members such as solder balls when reduction in size and thickness of a large- sized LSI such as system LSI is aimed by directly connecting and mounting the LSI on a printed wiring board which exhibits a coefficient of thermal expansion largely different from that of the LSI chip. SOLUTION: An LSI chip component having a plurality of conductor patterns 6 placed in a circuit part, a plurality of columnar connection terminals 8 planted in positions of connection of the plurality of conductor patterns 6 for reducing stress between components, and a protective film 9 which covers the roots of the columnar connection terminals 8 and the conductor patterns 6 in such a manner that it fortifies the roots of the columnar connection terminals 8 is connected and bonded to a printed wiring board 11 by using bonding members 10 between the extremities of the columnar connection terminals 8 of the LSI chip component and the connecting parts of the printed wiring board 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit which functions by connecting and mounting electronic components having different coefficients of thermal expansion to each other, and in particular, a large LSI bare chip is connected and mounted directly on a printed wiring board by using solder balls. FC (flip
The present invention relates to an LSI chip mounting structure included in mounting and a method of manufacturing a semiconductor device.

[0002]

2. Description of the Related Art There are many electronic circuit components which need to connect electronic components having different coefficients of thermal expansion to each other. This is the connection of LSI chips made from silicon. Conventionally, as a method of connecting an LSI chip on a wiring board, since the number of connection terminals of the LSI chip is not so large and the connection pitch is not so narrow,
The method of connecting by wire bonding (WB) or tape automated bonding (TAB) has been the mainstream. In these methods, since the connection electrode of the LSI and the connection electrode on the wiring board are connected by a flexible wiring, the difference in the thermal expansion coefficient between the LSI and the wiring board in the heat process at the time of connection and after the connection. There was almost no failure such as disconnection due to the above. This is because ultrafine wires of metals such as Au, Al, and Cu are flexibly deformed in the case of the WB method, and the connection terminals are formed on the flexible resin sheet together with the wiring in the case of the TAB method. On the other hand, it is possible to prevent the destruction of the connection part by deforming flexibly. However,
These connection methods have a problem that the connection terminals have to be arranged only on four sides of the LSI terminals, and it is not possible to sufficiently cope with the narrowing of the terminal pitch due to an increase in the number of terminals in recent years.

To solve this problem, a thin and small semiconductor device having a bare chip surface protected is disclosed in
As described in Japanese Patent Application Laid-Open No. 0-242367 (prior art 1), a semiconductor chip on which an element is formed, an electrode pad formed on the semiconductor chip, a columnar electrode connected to the electrode pad, and a columnar electrode. There is known an electrode having a resin layer applied to a semiconductor chip by exposing a tip portion of an electrode.

[0004]

However, in the semiconductor device having the structure described in the prior art 1, since the periphery of the columnar electrode is completely cured by the resin layer, it is necessary to follow a dimensional change due to thermal expansion. In order to achieve this, the resin layer needs to be made of a soft resin. If the resin in the resin layer is selected, there is no suitable resin such as epoxy or polyimide that can withstand high temperatures due to the restriction of softness, and it is a resin with low heat resistance such as elastomer or rubber. in this case,
When a semiconductor device is connected and mounted on a printed wiring board, there is a problem that it is difficult to withstand solder reflow.

[0005] An object of the present invention is to solve the above problems.
It is an object of the present invention to provide an electronic circuit in which electronic components having different coefficients of thermal expansion can be directly connected and mounted to each other with high reliability to function. Another object of the present invention is to reduce the size and thickness of a large-sized LSI chip such as a system LSI by directly connecting and mounting it on a printed wiring board having a significantly different coefficient of thermal expansion. An object of the present invention is to provide an LSI chip mounting structure capable of sufficiently securing connection reliability without breaking components of a joining member such as a chip and a solder ball. Also,
Still another object of the present invention is to provide a method of manufacturing a semiconductor device in which manufacturing cost is reduced by frequently using electroplating to realize the above-mentioned LSI chip mounting structure.

[0006]

Means for Solving the Problems As a method of manufacturing an electronic circuit having a part for interconnecting electronic components having different coefficients of thermal expansion, in addition to a method using a solder ball, recently, a conductive resin or a conductive adhesive has been used. Has been applied to mass production, but also requires heating to cure the resin or adhesive. As described above, in the method of heating at the time of connection, a shear stress is generated in the connection portion due to a difference in thermal expansion coefficient between components after cooling. When the difference in the coefficient of thermal expansion is large, the connection portion is broken immediately after the connection due to the shearing force, or the breakage proceeds over a certain period of time. In order to avoid this, it is necessary to reduce the shearing force by some method, but in the present invention, by extending at least one connection terminal of an electronic component having a different coefficient of thermal expansion in the vertical direction. Easy to deform,
This suppresses the influence of shearing force on other components.
In addition, it is necessary to suppress the portion which is easily deformed to a deformation below a breaking limit.

[0007] In a structure in which electronic components having different coefficients of thermal expansion are directly connected and mounted to each other, particularly in a structure in which electronic components having different coefficients of thermal expansion are directly connected and mounted by using solder and heat bonding, a difference in thermal expansion coefficient between the components results. The resulting thermal stress can be reduced by deforming the columnar connection terminal extending in the vertical direction. Therefore, the connection can be made with high reliability without using an auxiliary member, so that the connection with low cost and high reliability can be made.

That is, the present invention provides a method for alleviating a stress between a plurality of conductor patterns provided on a surface portion and electronic components implanted at connecting portions in each of the plurality of conductor patterns. A first electronic component having a plurality of columnar connection terminals, a protective film covering the root portions of the columnar connection terminals and the conductor pattern so as to reinforce the root portions of the columnar connection terminals, and the first electronic component And a second electronic component having a different thermal expansion coefficient by connecting and mounting using a joining member between a tip of the columnar connection terminal and a portion to which the second electronic component is connected. Circuit. The present invention also provides a plurality of columnar patterns for relaxing stress between a plurality of conductor patterns disposed on a surface portion and electronic components implanted at connecting portions in each of the plurality of conductor patterns. A first electronic component having a connection terminal and a protective film covering the root portion of the columnar connection terminal and the conductor pattern so as to reinforce the root portion of the columnar connection terminal; and thermal expansion with the first electronic component. An electronic circuit, wherein a second electronic component having a different ratio is connected and mounted using a solder member between a tip of the columnar connection terminal and a portion to which the second electronic component is connected. .

The present invention also provides the electronic circuit, wherein:
It is characterized in that the first electronic component has a barrier metal portion for preventing diffusion at a tip portion of the columnar connection terminal. Further, the present invention is characterized in that in the electronic circuit, a barrier metal portion for preventing diffusion is provided at a root portion of the columnar connection terminal of the first electronic component. Further, the present invention is characterized in that, in the electronic circuit, a joining metal portion having good wettability with respect to solder is provided at a tip portion of the columnar connection terminal of the first electronic component. In addition, the present invention relieves stress between a plurality of conductor patterns (wiring patterns or terminal patterns) provided in a circuit portion and components implanted at connecting portions in each of the plurality of conductor patterns. An LSI chip component having a plurality of pillar-shaped connection terminals, a protection film covering the base portion of the pillar-shaped connection terminal and the conductor pattern so as to reinforce the root portion of the pillar-shaped connection terminal, and An LSI chip mounting structure characterized by being connected and mounted by using a joining member such as a solder member between a tip of a columnar connection terminal and a portion to be connected to a printed wiring board.

Further, the present invention is characterized in that in the LSI chip mounting structure, a barrier metal portion for preventing diffusion of a joining member such as a solder member is provided at a tip portion of the columnar connection terminal of the LSI chip component. Further, the present invention is characterized in that in the LSI chip mounting structure, a barrier metal portion for preventing diffusion of a conductor such as a copper material is provided at a root portion of a columnar connection terminal of the LSI chip component. The present invention also relates to the above-mentioned LSI chip mounting structure,
It is characterized in that the tip part of the columnar connection terminal of the chip component has a joining metal portion having good wettability with respect to a joining member such as a solder member. Further, the present invention is characterized in that in the LSI chip mounting structure, a main portion of a columnar connection terminal of the LSI chip component is formed by copper plating or gold plating. Further, according to the present invention, in the above-described LSI chip mounting structure, the columnar connection terminals of the LSI chip component may include:
The cross-sectional area is about 2 × 10 to ⁹ m ^{2 to} 1.2 × 10 to ⁸ m ² , and the length is 25 μm or more or 60 μm or more. Further, the present invention is characterized in that in the LSI chip mounting structure, the joining member is a Pb-free solder member.

Further, the present invention provides a power supply film forming step of forming a power supply film for electroplating on a circuit portion of a semiconductor device, and a method of forming a power supply film on the circuit portion of the semiconductor device. A first resist pattern forming step of forming a first resist pattern for forming a plurality of conductor patterns;
A conductor providing step of providing a plurality of conductor patterns by performing electroplating on the first resist pattern formed in the first resist pattern forming step using a power supply film for electroplating; A second resist pattern for forming a plurality of columnar connection terminals for relaxing stress between components is formed at a connecting portion in each of the plurality of conductor patterns provided in the conductor providing step. Forming a plurality of columnar connection terminals by performing a second resist pattern forming step and performing electroplating on the second resist pattern formed in the second resist pattern forming step using the power feeding film for electroplating; Forming a columnar connection terminal, followed by a resist removing step of removing the second and first resist patterns, and then removing unnecessary portions of the power supply film for electroplating. A semiconductor device, comprising: a power supply removing step of performing a power supply removing step; and a protective film forming step of covering the root portion of the columnar connection terminal and the conductor pattern with an insulating protective film so as to reinforce the root portion of the columnar connection terminal. It is a manufacturing method of an apparatus. This semiconductor device may be in a state of a semiconductor substrate (wafer).

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an LSI chip mounting structure in which an LSI chip according to the present invention is directly connected to a printed board (printed wiring board) (mounting board) by solder ball connection and mounted will be described with reference to the drawings. . L according to the present invention
As an SI chip, as in a system LSI, a 6 mm square or more, in particular, about 10 mm square to about 21 mm square (up to 25 mm square)
There may be about mm square. ) Tends to be larger.
Therefore, an LSI chip mounting structure in which the LSI chip according to the present invention is directly mounted on a printed board (mounting board) by solder ball connection and mounted is configured as shown in FIG. That is, as shown in FIG. 3A and FIG. 2, a large number of exposed portions for inputting / outputting signals and power to / from the outside are provided on the peripheral portion of the circuit portion of the large-sized LSI chip 2. Al and Cu
Thus, a group of electrodes (terminals) 1 made of the same is formed. Since the pitch of the group of electrodes 1 arranged in the peripheral portion is usually relatively narrow, it cannot be directly connected to the printed board (mounting board) 11 by the solder ball 10. Therefore, the surface (circuit portion) of the enlarged LSI chip 2 is coated with a photosensitive polyimide resin as shown in FIG. 3B, exposed to the photosensitive polyimide resin, developed, and cured by heating. By doing so, a polyimide insulating layer 3 having a through hole 31 formed on the electrode 1 is formed. It is preferable that the insulating layer 3 used here has a low dielectric constant, and that the wiring (conductor pattern) 6 to be formed in a later step and the element formed inside the LSI chip 2 are electrically affected. To avoid this, a thicker one (about 5 μm or more) is desirable.

Then, as shown in FIG.
Through holes 31 formed in the insulating layer 3 from each of the large number of electrodes 1 arranged in the peripheral portion to the position where the solder ball 10 as the joining member is arranged (the position of the connecting portion).
It is necessary to form a wiring (conductor pattern) 6 through the substrate. When the electrode (terminal) 1 is formed on the uppermost layer of the LSI chip 2, the wiring 6 such as copper may be drawn directly from the lower layer. By doing so, the solder balls 1
The terminal-shaped copper wiring 6 is provided at the position where 0 is arranged. Further, in the LSI chip mounting structure according to the present invention, a large-sized LSI chip 2 is mounted on a printed board (mounting board) 1.
1 is directly connected with the solder balls 10 and mounted, so that it is greatly affected by different thermal expansion coefficients between the large-sized LSI chip 2 and the mounting substrate 11. Since the thermal expansion coefficient α2 of the LSI chip 2 is based on a substrate such as Si, the thermal expansion coefficient α1 of the printed circuit board 11 is about 1.7 × 10 to ⁶ , Since it is formed from an insulating substrate which is impregnated and cured with an imide resin, it is about 4 × 10 to ⁶ and thus differs greatly. For example, the size of the LSI chip 2 is 6 mm square or more,
In particular, when the size is 10 mm square to 21 mm square, the room temperature T2 is 2
When the solder connection temperature is about 250 ° C. assuming a reflow temperature T1 using tin / silver-based Pb-free solder, the difference in thermal expansion coefficient between the printed circuit board 11 and the LSI chip 2 is about 0 ° C. Based on the following equation (Equation 1), a strain X of 2.2 μm or more, especially about 3.7 μm to 7.9 μm is generated. Naturally, LSI chip 2
Is about 25 mm square, a strain X of about 9.3 μm is generated. X = (α1−α2) (T1−T2) a / 2 (Equation 1) where a is the maximum dimension (diagonal dimension) of the LSI chip 2
It is.

Therefore, according to the present invention, a vertically extending columnar connection terminal 8 (the size of the LSI chip 2 is 6 mm square, When the connection terminal 8 is made of a copper plating material,
The diameter is about 50 μm to 120 μm (2 × 10 to ⁹
m ^{2 to} 1.2 × 10 to ⁸ m ² ), and the flexible length is about 10 μm or more to about 33 μm or more.
When the size of the I chip 2 is 10 mm square and the columnar connection terminal 8 is a copper plated material, the diameter is about 50 μm to 120 μm (about 2 × 10 to ⁹ m ^{2 to} 1.2 × 10 to ⁸ m ^{2 in} sectional area). )
And the length that can be bent is about 12 μm or more to 39 μm
m or more. ).

That is, the printed circuit board 11 and the LSI chip 2
The shape of the columnar connection terminal 8 that absorbs by bending the strain X generated based on the difference in the coefficient of thermal expansion between the connection terminal portion and the connection terminal portion is a cantilever beam. From the relationship. y = (WL ³ ) / (3EI) (Equation 2) The elastic second moment I depending on the shape of the connection terminal is expressed by the following expression (Equation 3) when the cross-sectional shape of the connection terminal is circular. Will have. I = (πd ⁴ ) / 64 (Equation 3) where y is the amount of displacement of the tip of the columnar connection terminal (corresponding to the strain X), E is the elastic modulus of the material of the connection terminal, and W is the tip of the connection terminal. , L is the length of a flexible columnar connection terminal, and d is the diameter of the columnar connection terminal. In the structure according to the present invention, FIGS.
As shown in (b), the root portion of the columnar connection terminal 8 extending in the vertical direction is reinforced by the insulating protective film 9, so that it is not broken, and the solder ball 10 is broken first. Will be. Therefore, as the allowable load W, 250 g, which is the shear strength of the solder ball 10 when Sn / Ag-based Pb-free solder having a diameter of about 200 μm is used.
And Of course, if the diameter of the solder ball 10 is smaller than 200 μm, the allowable load W becomes smaller than 250 g. In addition, as the solder ball 10, 20
Those having a diameter of about 0 μm to 250 μm are used. The elastic modulus E of the material of the connection terminal 8 is 1.25 kg / cm ² × 10 ⁶ when made of copper.

As described above, the shape of the columnar connection terminals 8 is 2.2 μm when the size of the LSI chip 2 to be mounted is 6 mm square.
When the columnar connection terminal 8 is made of a copper plated material, the diameter of the columnar connection terminal 8 is about 50 μm to 120 μm (about 2 × 10 to ⁹ m ^{2 to} 1.2 × 10 to ⁸ m ^{2 in} cross-sectional area). ), The length that can be bent is about 10 μm or more to about 33 μm or more. In particular, when the size of the LSI chip 2 to be mounted is 10 mm square to 21 mm square, a strain X of about 3.7 μm or more is generated. Therefore, when the columnar connection terminal 8 is a copper plated material, the diameter is about 50 μm to 120 μm (2 × in cross-sectional area).
(About 10 to ⁹ m ^{2 to} 1.2 × 10 to ⁸ m ² ), and a flexible length of about 12 μm or more to about 39 μm or more is required. However, as described later, in order to reinforce the root portion of the columnar connection terminal 8, the root portion of the columnar connection terminal 8 including the wiring pattern 6 is covered with an insulating protective film 9 having a thickness of about several μm to 10 μm. When the columnar connection terminal 8 is made of a copper plating material and has a diameter of 50 μm, the length of the columnar connection terminal 8 needs to be about 25 μm or more. In any case, in order for the size of the LSI chip 2 to be mounted to be compatible up to 21 mm square, when the columnar connection terminal 8 is a copper plating material, the diameter is about 100 μm and the length is about 50 μm or more. Becomes Naturally, when the columnar connection terminal 8 is made of gold, the elastic modulus E of the material of the connection terminal 8 is 0.81 kg /
cm ² × 10 ⁶ , which makes it softer, so that the length of the columnar connection terminal 8 can be made shorter than that of a copper material.

As described above, by forming the columnar connection terminals 8 extending in the vertical direction, even if a large difference in thermal expansion occurs between the large-sized LSI chip 2 and the mounting substrate 11, the connection terminals 8 can be formed. The bending reduces the stress and reduces the size of the LSI chip 2 and the solder balls 10 and other components, which are prevented from being broken, and the enlarged LSI chip 2 is directly connected to the printed circuit board (mounting board) 11 by the solder balls 10. And implement it. In addition, at a predetermined position (for example, an end) of the wiring 6, a diameter of 50 μm is used.
In order to implant the columnar connection terminals 8 having a diameter of about 60 to 130 μm,
It is necessary to form a wiring part of a degree.

For this purpose, first, as shown in FIG. 3 (c), a power supply film for electroplating for forming the wiring 6 and the columnar connection terminals 8 extending in the vertical direction for relaxing stress by electroplating. 4 was formed in the through hole 31 including the surface of the electrode 1 and on the surface of the insulating layer 3. The power supply film 4 for electroplating needs to have an adhesive force with the insulating layer 3. Therefore, as a method of forming the power supply film 4 for electroplating, sputtering, vapor deposition, electroless plating, or the like can be used. The sputtering method has good adhesion to the insulating layer 3,
Since the electrical connectivity with the electrode (terminal) 1 is good, the power supply film 4 for electroplating is placed on the insulating layer 3 from the front side.
Chromium film (about 0.05 to 0.1 μm), copper film (0.3
(Approximately 1.0 μm) in this order.

Next, as shown in FIG. 3D, a resist pattern 5 for forming the wiring 6 by electroplating was formed. Next, as shown in FIG.
A wiring 6 having a width of about 2 μm and a thickness of about 2 μm to 20 μm, and having a portion having a diameter of about 60 μm to 130 μm at a place where the columnar connection terminal 8 is to be planted, was formed using electrolytic copper plating. The power supply film 4 for electroplating was connected to the negative electrode, and a copper plate was connected to the positive electrode so as to face each other, and electro copper plating was performed. Next, FIG.
As shown in (a), when connecting with the mounting substrate 11, the diameter for forming the columnar connection terminal 8 extended in the vertical direction for relaxing the stress by using the electrolytic copper plating is 50 μm or more.
A resist pattern 7 having a thickness of about 120 μm and a thickness of 25 μm or more to 50 μm or more (about 70 μm to 100 μm is optimal) was formed. This resist pattern 7
Since the hole is formed by exposure and development, the hole for forming the columnar connection terminal 8 needs to have a diameter of about 20 μm or more. Further, the large-sized LSI chip 2 is connected to the columnar connection terminals 8.
Only the diameter of the columnar connection terminal 8 needs to be about 50 μm or more from the viewpoint of strength.

Next, as shown in FIG. 4 (b), the resist pattern 7 is extended in a vertical direction by using electrolytic copper plating to relieve the stress connected to the copper wiring 6. Column-shaped connection terminal (having a diameter of about 50 μm to 120 μm and a thickness of 25 μm or more to 50 μm or more.
About 0 μm to 100 μm is optimal. )) 8 was formed. The power supply film 4 for electroplating is connected to the negative electrode,
An insoluble electrode or a copper plate (preferably containing phosphorus copper) was connected to the positive electrode, and electrolytic copper plating was performed. The printed circuit board 11
When a ceramic wiring board is used, since the difference in the coefficient of thermal expansion between the ceramic wiring board and the LSI chip is small, the length of the connection terminal 8 extended in the vertical direction can be naturally shortened.

Next, as shown in FIG. 4C, the resist pattern 5 and the resist pattern 7 were peeled off. Next, as shown in FIG. 4D, the unnecessary power supply film 4 for electroplating was removed by etching. Next, as shown in FIG. 5A, an insulating protective film 9 having a thickness of about several μm to 10 μm was formed to reinforce the root portion of the columnar connection terminal 8 and to protect the wiring pattern 6. Here, a photosensitive resin is used as the insulating protection film 9, and the connection terminal portion is exposed,
It was removed in the developing step.

In particular, the insulating protection film 9 is formed by covering only the root portion of the columnar connection terminal 8 and the wiring 6 so that the columnar connection terminal 8 can be bent. This makes it possible to reinforce the root portion of the columnar connection terminal 8 and the wiring 6, and the connection terminal 8 is bent even if a large difference in thermal expansion occurs between the large-sized LSI chip 2 and the printed board 11. LS with reduced stress and larger size
The destruction of components such as the I chip 2 and the solder ball 10 is prevented, and the large-sized LSI chip 2 is mounted on the printed circuit board 1.
1 can be directly connected with the solder ball 10 and mounted. The above-described manufacturing up to FIG. 3, FIG. 4, and FIG. 5A may be performed in a state of a semiconductor substrate (semiconductor wafer) on which a large number of LSI chips are arranged. In this case, the semiconductor device is in a state of a semiconductor substrate (semiconductor wafer). Of course, in this case, L
Before connecting and mounting the SI chip 2 on the printed circuit board 11,
It is necessary to cut and separate the semiconductor substrate from the state of the semiconductor substrate by a dicing device in chip units.

Next, as shown in FIG. 5B, the enlarged LSI chip 2 is directly mounted on a printed board (mounting board) 11 by using solder balls 10 made of tin / silver-based Pb-free solder. Connected and implemented. For example, a group of a large number of solder balls 10 are aligned and mounted on a group of pads, which are connected portions arranged on the printed circuit board 11,
A flux is supplied as necessary, and a large-sized LSI chip 2 is mounted thereon, and the columnar connection terminal 8 and the solder ball 10 are joined and connected by heating (solder reflow). At this time, the solder ball 10 is
Printed circuit board 1 connected to I chip 2 in advance
1 can also be mounted.

In the above-described embodiment, the case where the cross-sectional shape of the columnar connection terminal 8 is circular has been described. However, even when the cross-sectional shape is square, substantially the same operation and effect can be achieved.

The cross-sectional shape of the columnar connection terminal 8 may be rectangular. In this case, the elastic second moment I depending on the shape of the connection terminal has the relationship of the following equation (4). From the relationship of the above equation (3), the shape of the columnar connection terminal 8, especially the length L Will be determined. When the cross-sectional shape of the connection terminal 8 is rectangular, it is necessary to increase the length L of the columnar connection terminal 8 as compared with a circular case. I = (bh ³ ) / 12 (Equation 4) where b and h indicate the length of each side of the rectangle. Further, the cross-sectional shape of the columnar connection terminal 8 may be a regular hexagonal shape or an elliptical shape. In these cases, the elastic second moment I depending on the shape of the connection terminal has the relations of the equations (5) and (6), respectively. The shape, especially the length L, will be determined.

I = (5√3 / 16) p ⁴ (Equation 5) where p indicates the length of one side. I = (πm ³ n) / 4 (Equation 6) Here, 2m indicates the length of the major axis, and 2n indicates the length of the minor axis. In any case, since the connection terminal 8 has directionality when the cross-sectional shape is rectangular or elliptical, as shown in FIG.
In order to be able to evenly bend and absorb the strain X in the two axial directions of Y,
The connection terminals 8 may be arranged. In addition, as the connection terminal 8, the power supply film 4 for electroplating is connected to the negative electrode, the insoluble electrode is connected to the positive electrode, and the electroplating is performed. A column-shaped connection terminal (having a diameter of about 50 μm to 120 μm and a length of about 60 μm to 90 μm) 8 extending in the vertical direction for relaxing the stress connected to the wiring 6 is formed by gold plating. Good. However, if the connection terminal 8 is formed by gold plating, it becomes very expensive.

Therefore, as shown in FIG. 7, a portion in contact with the copper wiring is raised by electroplating using the raised metal 61 to shorten the length of the gold plating to reduce the gold consumption. Things. The metal used for the raised metal 61 by electroplating may be the same metal as the wiring 6, but the connection terminal 8 and the wiring 6 extending in the vertical direction are not shown in FIG.
As shown in (b), when connecting to the mounting substrate 11 via the solder balls 10, the barrier metal serves as a barrier metal for the columnar connection terminals 8 and the wirings 6 extending in the vertical direction in order to prevent diffusion. Such a material is also possible. As an example, the wiring 6 is plated with electric copper and the columnar connection terminals 8 are formed.
It is possible to use electric nickel as the raised metal 61 by electrogold plating or electroplating. here,
In some cases, electroless plating can be used as a method of forming the raised metal 61. Then, similarly to the above-described embodiment, the resist pattern 7, the resist pattern 5, and the power supply film 4 for electroplating are peeled off, and the insulating protection film 9 for reinforcing the columnar connection terminals 8 for relaxing the stress is formed. Formed.

In the embodiment shown in FIG. 8, when connected to the mounting substrate 11 via the connection terminals 8 extending in the vertical direction,
This is a mounting structure for preventing the solder balls 10 from diffusing with the connection terminals 8 extending in the vertical direction. That is, after forming the connection terminal 8 extending in the vertical direction, the resist pattern 7 is not peeled off, and subsequently, by electroplating,
This is one in which a solder barrier 12 for preventing diffusion is formed.
As an example of the material, it is possible to use electric copper plating for the wiring 6, electric gold or copper plating for the connection terminals 8 extending in the vertical direction, and electric nickel for the solder barrier 12. Here, as a method of forming the solder barrier 12, in some cases, it is also possible to use electroless plating. And then, as in the above embodiment,
The resist pattern 7, the resist pattern 5, and the power supply film 4 for electroplating may be peeled off, and an insulating protective film 9 for reinforcing a root portion of the columnar connection terminal 8 for relaxing stress may be formed. The solder barrier 12 is mounted on the mounting substrate 1.
If the wettability with respect to the solder ball 10 when connecting to the first metal is low, a bonding metal 81 such as gold may be formed as shown in FIGS. 9 and 10. This joining metal 81
In some cases, electroless plating can be used. Then, after that, the resist pattern 7, the resist pattern 5, and the power supply film 4 for electroplating are peeled off, and an insulating protective film 9 for reinforcing a root portion of the columnar connection terminal 8 for relieving stress may be formed.

[0029]

According to the present invention, it is possible to realize an electronic circuit in which electronic components having different coefficients of thermal expansion are directly connected and mounted with high reliability. Further, according to the present invention, when a large-sized LSI chip such as a system LSI or the like is directly connected and mounted on a printed wiring board having a significantly different coefficient of thermal expansion to reduce the size and thickness,
There is an effect that it is possible to realize an LSI chip mounting structure with sufficient connection reliability without breaking parts of a joining member such as an LSI chip and a solder ball. In particular, by reducing the thickness, the connection distance can be reduced, and as a result, it is possible to sufficiently cope with future high-speed driving of LSI. Further, according to the present invention, it is possible to reduce the manufacturing cost by using electroplating extensively to realize the above-mentioned LSI chip mounting structure.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional front view showing a basic configuration of an electronic circuit according to the present invention, that is, an LSI chip mounting structure.

FIG. 2 is a schematic diagram showing an arrangement relationship between an LSI chip and a solder ball according to the present invention.

FIG. 3 is a diagram for explaining a part before a basic process of manufacturing an electronic circuit, that is, an LSI chip mounting structure according to the present invention.

FIG. 4 is a diagram for explaining an intermediate portion of a basic process for manufacturing an electronic circuit, that is, an LSI chip mounting structure according to the present invention.

FIG. 5 is a diagram for explaining a portion after a basic process of manufacturing an electronic circuit, that is, an LSI chip mounting structure according to the present invention.

FIG. 6 is a diagram showing an arrangement method of the columnar connection terminals when the cross section of the columnar connection terminals is rectangular.

FIG. 7 is a partial sectional front view showing another embodiment of an LSI chip and an electronic circuit, that is, an LSI chip mounting structure according to the present invention.

FIG. 8 is a partial sectional front view showing still another embodiment of an LSI chip and an electronic circuit, that is, an LSI chip mounting structure according to the present invention.

FIG. 9 is a partial sectional front view showing still another embodiment of an LSI chip according to the present invention.

FIG. 10 is a partial sectional front view showing still another embodiment of an LSI chip according to the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Electrode (terminal), 2 ... LSI chip, 3 ... Insulation layer, 4
... Power supply film for electroplating, 5 ... Resist pattern, 6 ... Wiring, 7 ... Resist pattern, 8 ... Column connection terminal, 9 ... Insulation protective film, 10 ... Solder ball, 11 ... Printed board (mounting board), 12 ... Solder Barrier, 13: raised metal, 61: raised metal, 81: joining metal.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/92 604S (72) Inventor Mitsuko Ito 292 Yoshidacho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Hitachi, Ltd. Inside the Research Institute of Production Technology (72) Inventor Yasunori Narizuka 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Hitachi Research Institute of Manufacturing Technology (72) Inventor Hisashi Sugiyama 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Pref. Inside Hitachi, Ltd. Production Technology Research Institute (72) Inventor Akiko Mizushima 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Hitachi, Ltd. (72) Chie Yoshizawa, Inventor Yoshi, Totsuka-ku, Yokohama, Kanagawa Town 292 address Co., Ltd. Hitachi, Ltd., Institute of Industrial Science, the F-term (reference) 5E319 AA03 AB05 CC33 GG11 5F044 KK02 LL01 QQ02 QQ03 QQ04

Claims (13)

[Claims] 1. A plurality of columnar connections for alleviating stress between a plurality of conductor patterns disposed on a surface portion and electronic components implanted at connecting portions in each of the plurality of conductor patterns. A first electronic component having a terminal and a protective film covering the base portion of the columnar connection terminal and the conductor pattern so as to reinforce the base portion of the columnar connection terminal;
The first electronic component and a second electronic component having a different coefficient of thermal expansion are connected and mounted by using a joining member between a tip of the columnar connection terminal and a portion to which the second electronic component is connected. An electronic circuit, comprising: 2. A plurality of columnar connections for relaxing stress between a plurality of conductor patterns provided on a surface portion and electronic components implanted at connecting portions in each of the plurality of conductor patterns. A first electronic component having a terminal and a protective film covering the base portion of the columnar connection terminal and the conductor pattern so as to reinforce the base portion of the columnar connection terminal;
The first electronic component and a second electronic component having a different coefficient of thermal expansion are connected and mounted using a solder member between a tip of the columnar connection terminal and a portion to which the second electronic component is connected. An electronic circuit, comprising: 3. The electronic circuit according to claim 1, further comprising a barrier metal portion for preventing diffusion at a tip portion of the pillar-shaped connection terminal of the first electronic component. 4. An electronic circuit according to claim 1, further comprising a barrier metal portion for preventing diffusion at a root portion of the columnar connection terminal of said first electronic component. 5. The electronic circuit according to claim 2, further comprising a bonding metal portion having good wettability with respect to solder at a tip portion of the columnar connection terminal of the first electronic component. 6. A plurality of columnar connection terminals for relieving stress between a plurality of conductor patterns provided in a circuit portion and components implanted at connecting portions in each of the plurality of conductor patterns. An LSI chip component having a base layer of the columnar connection terminal and a protective film covering the conductor pattern so as to reinforce the root portion of the columnar connection terminal; and a tip of the columnar connection terminal in the LSI chip component and printed wiring. An LSI chip mounting structure characterized by being connected and mounted to a portion to be connected to a board using a joining member. 7. The LSI chip mounting structure according to claim 6, wherein the LSI chip component has a barrier metal portion at a tip end of the columnar connection terminal for preventing diffusion of a bonding member. 8. The LSI chip mounting structure according to claim 6, further comprising a barrier metal portion for preventing diffusion of a conductor at a root portion of the columnar connection terminal of said LSI chip component. 9. The LSI chip mounting structure according to claim 6, further comprising a bonding metal portion having good wettability to a bonding member at a tip portion of the columnar connection terminal of said LSI chip component. 10. The LSI chip mounting structure according to claim 6, wherein a main portion of said columnar connection terminal of said LSI chip component is formed by copper plating. 11. The columnar connection terminal of the LSI chip component has a cross-sectional area of about 2 × 10 to ⁹ m ^{2 to} 1.2 × 10 to ⁸ m ² and a length of 25 μm or more. The LSI chip mounting structure according to claim 10. 12. The LSI chip mounting structure according to claim 6, wherein said joining member is a Pb-free solder member. 13. A power supply film forming step of forming a power supply film for electroplating on a circuit portion of a semiconductor device, and a plurality of conductors formed on the power supply film for electroplating formed in the power supply film formation step. A first resist pattern forming step of forming a first resist pattern for forming a pattern, and using a power supply film for electroplating on the first resist pattern formed in the first resist pattern forming step. Providing a plurality of conductor patterns by performing electroplating by applying a stress between parts to each of the plurality of conductor patterns provided in the conductor providing step. Resist pattern forming step of forming a second resist pattern for forming a plurality of pillar-shaped connection terminals for reducing stress, and a second register formed in the second resist pattern forming step. Forming a plurality of columnar connection terminals by applying electroplating to the pattern using the power supply film for electroplating, and thereafter, removing the resist for removing the second and first resist patterns. A power-supply removing step of removing unnecessary portions of the electroplating power-supplying film; and an insulating protective film formed on the columnar connection terminals and the conductor pattern so as to reinforce the columnar connection terminals. And a protective film forming step of covering with a semiconductor device.