JP3788343B2 - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereof Download PDFInfo
- Publication number
- JP3788343B2 JP3788343B2 JP2001384618A JP2001384618A JP3788343B2 JP 3788343 B2 JP3788343 B2 JP 3788343B2 JP 2001384618 A JP2001384618 A JP 2001384618A JP 2001384618 A JP2001384618 A JP 2001384618A JP 3788343 B2 JP3788343 B2 JP 3788343B2
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- Prior art keywords
- conductive connection
- semiconductor chip
- connection portion
- circuit board
- semiconductor device
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Description
【0001】
【発明の属する技術分野】
本発明は、半導体装置およびその製造方法に関し、特に接続された2つの電子素子間に生じる応力や、熱応力を解消したり、緩和させた半導体装置およびその製造方法に関する。
【0002】
【従来の技術】
近年電子部品の高性能化に伴い半導体装置の高密度化への要求が高まっている。そのため半導体装置のパッケージ構造は、パッケージの周辺部にリード端子を設けたQFP(Quad Flat Package)が広く使用されており、また最近では面格子上に半田ボール端子を設けたBGA(Ball Grid Array)を採用することで、QFPに比べて更に多ピン化、高密度実装をすることが可能となっている。
【0003】
また従来のパッケージは、半導体チップとキャリア基板間の接続をワイヤボンディング(WB)方式を用いて行ってきたが、素子の高機能化に伴いパッケージの多ピン化や小型化への対応が困難となってきた。これに対して、図18に示す半導体チップ101の能動面を下にして半田バンプ103によりキャリア基板106に接続するフリップチップ接続(FCB)方式が、多ピン化、小型化、高速信号伝送が可能であるため、高機能デバイス用途をはじめ種々のデバイスに使用され始めている。
【0004】
以上のような半田バンプ接続や多ピン化に伴う狭ピッチ化が進む一方で、半導体装置において回路基板として広く使用されている有機樹脂基板やセラミックス基板等と、半導体素子との熱膨張係数差に起因する熱応力により、半田バンプ103、108の内部にクラックが発生したり、キャリア基板106や実装基板110の配線が断線して接続信頼性が低下するという問題があった。
これに対して、通常半田バンプ103の周囲に封止樹脂104を封入して、特に壊れやすい一次接続側の半田バンプ103の破断を防止する方法がある。封止樹脂104を封入する方法は、樹脂を封入した個所の接続信頼性の確保には効果があるが、封止樹脂104で保護していない他の応力に弱い個所、例えばキャリア基板106と実装基板110との間の二次接続側の半田バンプ108や、キャリア基板106、実装基板110に応力が加わると、電気配線の断線が起こり結果的に接続信頼性が低下してしまうことがある。
【0005】
さらに最近ではキャリア基板106と実装基板110の間の電極パッド107、109の狭ピッチ化が進むことにより、半田バンプ108での接続信頼性の低下が大きな問題となっている。この部分に封止樹脂を封入すれば信頼性は確保されるが、一方でリペアが困難になったり、樹脂封入工程によるコスト増等の問題もあり望ましくない。
【0006】
以上のような問題点に対して、半導体装置を応力緩和構造とすることにより積極的に応力緩和を行う方法が挙げられ、これまでに幾つかの応力緩和構造を持つ半導体装置やその製造方法が提案されている。
【0007】
図19に、特開平10−256314号公報に記載されているマイクロエレクトロニクス素子の実装構造を示す。この実装構造は、垂直方向に高さを有するS字形状のリード114の一端を回路基板等の第1要素111に固定し、リード114のもう一端の先端部を半導体ウェハー等の第2要素117に取り付けている。なお第1要素111と第2要素117の間に、リード114を囲繞する変形容易な絶縁材料を設けることもある。
【0008】
この装置におけるリード114は、次のようにして製造していた。まず図20(a)に示すように第1要素111の上の銅層118上面に図21に示すようなダンベル状のパターンのレジスト119を塗布する。パターンは、端子側端部の膨出部112と、それより幾分小さな円形の先端側端部の膨出部113と、それら膨出部を繋ぐような細長く幅の狭い帯状部120となっている。
【0009】
次に図20(b)に示すように、リード114となるパターン部分に、電気めっきによってニッケル層、及び金層を形成し、更に図20(c)に示すように、リード114の先端部の露出した表面に新たにパターン119を形成し、図20(d)に示すように電気めっきで例えば錫のような接合材料115を形成する。
【0010】
図20(e)に示すようにレジスト119を除去し、さらにニッケル/金層のリード114をバリアとしてアンダーエッチングを行い、銅層118の一部を溶解する。このときの処理時間を適当に選択し、図21に示すように帯状部120の両側の側縁部から進行していったアンダーカット領域が互いにつながり、帯状部120を絶縁シートから隔離させ、かつ膨出部112、113の直径が帯状部120の幅よりも大きくしてあるため、銅層118のエッチングにより完全に溶解せず、第1要素111に弱く繋げておく。
【0011】
この状態でリード114の先端部分115と第2要素117の接点116との間を金属接合によって接続し、そして接合した2つの要素111、117を相対的に移動させることにより膨出部113が第1要素から離れ、図19に示したようにS字形のリード114を形成する。
【0012】
図22に、特開平10−506238号公報に記載された、犠牲基板121を用いた相互接続部125および先端構造124の製造方法を示す。これは、シリコン等の犠牲基板121をエッチングし、トレンチ126を形成する。続いて硬質の層122をトレンチ126の内部と犠牲基板121の表面に堆積する。さらにその後フォトレジスト123等のパターニングを行い選択的な堆積を可能にする。
【0013】
開口部分にばね合金層124をめっき等により形成し、マスキング材料123とその下の層121を除去する。なお相互接続要素125は、予め先端構造124に実装しておいてから電子コンポーネントに接続するか、あるいは電子コンポーネント側に予め形成しておいて先端構造124とろう接やはんだ付けなどにより片持ち式に接続する。
【0014】
図23に、特開2000−323628号公報に記載された半導体装置を示す。これは、半導体素子127の表面のパッシベーション膜128上に1層以上の樹脂層129を設け、樹脂層129の内部や表面に半導体素子電極部130に接続された所望形状の導体層131を有している。パッシベーション128上の樹脂層129の形成には、感光性樹脂を用いたフォトリソグラフィ技術、スクリーン印刷法、レーザー加工などの方法を用いる。
【0015】
更にこの装置に類似した半導体装置構造としては、特開2001−24021、特開2000−323605、特開2000−323604に示されるように、配線導体路の一部にマルテンサイト相変態を起こす合金を介在させたもの、多孔性樹脂を用いたもの、熱応力異方性を示す材料を樹脂層に設けたものなどが知られている。
【0016】
【発明が解決しようとする課題】
このように熱応力を緩和するため、応力緩和機能を持った半導体装置やその製造方法が提案されているが、1つの問題として導体接続部の形状の制御性がある。一般的な半導体パッケージにおいて、半導体チップとプラスティック基板の間では熱膨張率差によって相対的な位置が数十μm程度ずれる。そのような大きなずれを吸収するためには、導体接続部が変形してそれらのずれを許容することが必要である。
【0017】
このような点を考慮した場合、導体接続部を平面状に形成してそれをしならせるという方法では、屈曲、湾曲構造をもつものに比べて応力緩和の効果が不十分である。そのため屈曲部、湾曲部を持たない接続方法では、応力緩和の効果を持たせるために別途応力を緩和する要素を作製する必要が出てきてしまう。
【0018】
また、電極パッドがエリアアレイに狭ピッチで配列した半導体チップと回路基板を接続したり、導体接続部の形成、接続を一括で行うことは、パッケージの高密度化、低コスト化に有利である。そのため、応力緩和構造を設ける上では導体接続部分が狭ピッチで一括形成できることが求められている。
【0019】
しかしたとえばワイヤコアでばね性を持つ接続部を作製する方法では、接続部の一括形成が困難であるばかりだけでなく、微小なバネを狭ピッチで作製するのは技術的に困難である。
【0020】
一方、導体接続部を形成してからそれを変形させるという方法では、導電性接続部の形状を正確に制御するのが困難であり、さらには変形させる時にパッドや接続部に余計な負担が加わってしまうことがある。
【0021】
さらに製造工程においてアンダーエッチングを利用する場合は、エッチング時間について厳密な制御が必要であり、また接続部の形状に制限が加わるなどの問題点が生じる。この他にもエッチングを使用する場合には、接続部の作製時に用いる犠牲層となる材料と、接続部となる材料との間に化学的性質の差を持たせなければならないという制約があり、犠牲層と接続部の材料の組み合わせに制限を加えてしまう。例えば導電性接続部に、複数の機能を持たせようとして多層構造にすることがあるが、エッチングを行う場合はその材料の選択の幅が制限されてしまう。
【0022】
一方、応力緩和樹脂を形成した上に導体部分を作製する方法では、樹脂形成時におけるテーパー部分の形状制御が一部行われており、例えば、フォトリソグラフィー技術やレーザー加工を用いた場合は導体接続部の形状をある程度規定できる。
【0023】
しかしこの方法では感光性を持った樹脂や、デスミア処理が必要になってしまう。また、基本的に導電性のない樹脂上に導体層を形成するため、蒸着やスパッタなどの工程が必要になるが、これらの成膜方法は一般に段差部へのステップカバレージに問題があり、特にテーパー角度によっては接続信頼性が低くなる傾向にある。それに加えて導電性接続部を形成する前に応力緩和樹脂を形成する場合は、導電接続層の作製プロセスに整合した樹脂材料を選択しなければならないため、材料が限られてしまうという問題がある。
【0024】
本発明は、上記課題を解決することを目的とする。
【0025】
【課題を解決するための手段】
本発明では、上記課題を解決するため、つぎのように半導体装置、およびその製造方法を構成した。
【0026】
半導体チップとそれに対向する回路基板の電極パッド同士が、導電性接続部により接続され、かつ前記半導体チップと前記回路基板の間に絶縁性封止剤が充填されている半導体装置において、前記導電性接続部は、弾性材料からなり、前記導電性接続部の少なくとも1つが、前記半導体チップの能動面に対して平行な方向から見た場合に、2以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料からなることを特徴とする半導体装置。
表面に所定の凹凸を有する加工基板を作製し、該加工基板の前記表面上に前記凹凸に沿って所定の形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を一方の電極部に接続させ、該導電性接続部から前記加工基板を除去した後、前記導電性接続部の他端を他方の電極部に接続させ、前記一方の電極部と前記他方の電極部とを前記導電性接続部により接続させたことを特徴とする電極間の接続方法。
このように表面を精密に微細加工された加工基板とパターニング技術により、形状を厳密に制御した微小な導電性接続部の形成が可能であり、エリアアレイに端子が狭ピッチで配列しているようなものにも、変形可能な微小接続部の形成が容易である。なおここでいう形状制御の容易性というのは具体的には、屈曲形状における屈曲角度、湾曲形状における曲率半径など、導電性接続部の三次元的形状を比較的自由に設計可能であることを意味している。特に金属基板を機械加工した場合は、テーパー角度を誤差1度以内、曲率半径を誤差5μm以内の範囲で厳密に形状を制御することができる。
【0027】
なおここで屈曲とは、例えば図24(a)に示すように、ある一本の線がある測定可能な角度α、βを持って折れ曲がった形状になっていることを意味する。一方、湾曲とは図24(b)に示すようにある一本の線が明確な角度を持たずに、たわんだように曲がった形状になっていることを意味する。このとき湾曲部の曲率半径はRとなっている。
【0028】
更に導体接続部の形状としては、複数の屈曲部や、湾曲部を有する形状が望ましい。半導体装置の接続部において、それらの屈曲部が直角やそれ以下の角度で折れ曲がっていると、折れ曲がった部分に力が集中しその部位が破断しやすくなるため、できるだけ直角以下の角度で折れ曲がった部分を持たない形状であることが望ましく、その屈曲角度は95度〜170度程度であることが望ましい。特に導体接続部が120度以下の角度で屈曲した形状の場合には、適度な曲率半径を持つような湾曲形状にするなど、応力が角部に集中しないようにする工夫が必要であり、このときの曲率半径は導体接続部の幅、または厚さに対して20%以上であることが望ましい。
屈曲部の屈曲角度αと湾曲部の曲率半径Rは、高密度実装、及び導体接続部に熱応力が加わった際の導体接続部の角部への負担を考慮すると、120度≦α≦150度、50%≦R≦200%であれば最良である。
【0029】
このことは応力緩和と高密度実装を実現するという目的の上で、所望の形状の接続部を形成できる点において優れており、特に四箇所以上の屈曲部、湾曲部を有するような複雑な形状の導電性接続部を作製する場合においては従来方法に比べて形状制御がはるかに容易である。また導電性接続部は高さ方向と平面方向の両方に屈曲、湾曲構造を作製することが可能であり、導電性接続部単独で効果的に三次元的な熱応力を吸収することができる。
【0030】
また本発明においては、屈曲、湾曲した形状の導電性接続部をそのままの形状で接続し使用できるので、半導体素子や回路基板のパッド、あるいは接続部自体に余計な負担がかからない。
【0031】
更に、通常の方法で屈曲部や湾曲部を有する接続部を作製しようとすると、製造方法が複雑になり工程数が増大してしまうが、本発明の方法では加工基板を用いていることにより、加工基板上に直接屈曲部や湾曲部を有する導電性接続部の作製が可能であり、従来の製造方法と比べても工程数が多くならない。
【0032】
更にこの製造方法は、導電性接続部をメッキなどで堆積させており、導電性接続部を作製する際にアンダーエッチング工程を含まない。そのため導電性接続部の形状に制約がなく、材料の選択も自由であり多層構造の導電性接続部を容易に作製できる。
【0033】
また、加工基板は基本的に金属等の導体が使用可能であるので、段差やテーパーがある部分へのめっき膜のつきまわり性も比較的良く、段差やテーパー角度に大きな影響を受けることなく、導体接続部を形成可能である。
【0034】
また、導体接続部を封止する絶縁性弾性樹脂は導体接続部を形成した後に塗布、充填するので、予め樹脂を供給しておく方法に比べて、樹脂材料の選択の自由度が高い。そのため絶縁性弾性樹脂を選択する上で一般的に市販されている500MPa以下の低弾性率樹脂を容易に適用することができる。
【0035】
更に本発明は、薄膜形成方法により一括してばね構造体を形成することから、端子数の多い半導体装置に対しても一括して形成することが可能である。
【0036】
以上のように、本発明では微小で変形可能な導電性接続部を多数作製可能であり、高密度実装された半導体装置の接続信頼性を高くすることができる。
【0037】
【発明の実施の形態】
本発明にかかる半導体装置、およびその製造方法の一実施形態について説明する。
【0038】
(第1の実施形態)
図1(a)〜(i)に、半導体チップ上にエリアアレイ状に端子がある半導体装置の製造方法を示す。まず図1(a)に示すように、表面に凹凸を有する加工基板1を作製する。加工基板1は、ステンレス等の金属製で、図2に示すように、上面から見た場合に溝31が一方向に加工されている。また加工基板1には、半導体チップや回路基板の電極パッドに対応した位置に溝や非貫通穴、突起等が形成されている。加工基板1の材質としては、ステンレスのほか、銅、ニッケル、アルミニウム、マグネシウム、鉄、白金、金、及びそれらの合金等や、シリコン、有機樹脂材料、セラミックスなどが挙げられる。中でも金属製基板は一般的に凹凸形状の加工が比較的容易で、かつこの後の導電性接続部を形成する工程において、電解めっきのための給電層が不用であり、給電層の付与工程の短縮、低コスト化が可能であるので望ましい。また導電性を持たない材質の場合は、表面に導電性物質等の形成を行う。
【0039】
次に図1(b)に示すように、加工基板1上にレジスト2を形成する。レジスト2は、液状フォトレジストのスピンコート、あるいはドライフィルムレジストのラミネートなどの方法で形成する。続いて図1(c)に示すようにレジスト2の露光、現像により導体部分となるパターニングを行う。
レジストパターンは、導電性弾性体3が屈曲部、湾曲部を持つように形成する。このとき屈曲部、湾曲部の数が多い方が熱応力を吸収しやすくなるので、少なくとも2つの屈曲部、湾曲部を持つように加工基板1上にレジストパターンを形成する。また屈曲部、湾曲部が4つ以上であればなお望ましい。図2に、導電性接続部3を示す。
【0040】
さらに電解めっきにより図1(d)に示すように導電性接続部3となる金属層を形成する。なお導電性接続部3は、電解めっきの他、無電解めっき、スパッタリング、蒸着、CVD、イオンプレーティング等により作製可能であるが、厚付けの容易さやコストを考慮すると電解めっきが望ましい。
【0041】
導電性接続部3は、1層以上の導電性金属の層構成となっている。導電性接続部3となる金属層としては、ニッケル、鉄、コバルト、白金、ロジウム、パラジウム、金、銀、銅、アルミ等やそれらを主成分とする合金が挙げられる。機械的強度や電気的特性、コストを考えると、NiやCuを主体とした構成であることが望ましい。更に、導電性接続部3の形成工程で、導電性接続部3の最上面層をAuで表面処理しておくと、導電性接続部3を後述する半導体チップ4に接続させる工程でAu/Au熱圧着や半田接合が容易である。
【0042】
導電性接続部3を成膜した後、図1(e)に示すようにレジストを有機溶剤等にて除去し、図1(f)に示すようにこの導電性接続部3の一端である接触端子部を半導体チップ4の電極パッド5に接続する。接続は、導電性接続部3をそのままの状態で、いわば転写するように行う。
なお接続する前に予め半導体チップ4の電極パッド5上にAuあるいはSnPb、SnAg、SnCu、SnAgCu、SnBi、SnZn、SnZnBi、SnIn、あるいはそれらを主成分とする合金等の金属バンプ6を作製しておく。導電性接続部3は、金属バンプ6と接続する。金属バンプ6の形成方法としては、スタッドバンプ、あるいは無電解めっき、電解めっき、ボール転写、印刷法等が考えられる。
【0043】
次に、図1(g)に示すように加工基板1を除去し、導電性接続部3の他端を図1(h)に示すように回路基板7上の電極パッド8と導電性の金属バンブ9で接続する。なお回路基板7上の電極パッド8上には、半田ボールやペーストを供給しておき、リフローにより接続を行うことが簡便な方法であり望ましい。
【0044】
最後に図1(i)に示すように半導体チップ4と回路基板7間に絶縁性樹脂10を充填する。充填する絶縁性樹脂10としては、例えばエポキシ系、アクリル系、ポリイミド系、ウレタン系、ポリエステル系、ビスマルイミド系、スチレン系、ポリ塩化ビニル系、ナイロン系、ポリエチレン系、ポリプロピレン系、酸無水物系などの有機系絶縁性樹脂、あるいはシリコーン樹脂、フッ素シリコーン樹脂系の有機・無機複合絶縁性樹脂等が挙げられる。500MPa以下の低弾性率の樹脂が望ましいが、それ以上の材料であってもよい。
【0045】
これにより、任意の形状の導電性接続部3を形成し、半導体チップ4と回路基板7の間に導電性接続部3を屈曲等のための力を加えることなく確実に設けることができる。
【0046】
(第2の実施の形態)
図3(a)〜(i)は、図4に示すように半導体チップ上にペリフェラル状に導電性接続部3を有する半導体装置の製造方法である。
【0047】
この導電性接続部3は、形状、配置個所が第1の実施形態と異なるのみで、製造方法はほぼ同一である。このようにして、ペリフェラル状に導電性接続部3を有する半導体装置を製造してもよい。
【0048】
(第3の実施の形態)
図5(a)〜(d)に、半導体装置の第3の製造方法を示す。
【0049】
図1及び図3の半導体装置の製造方法と異なる点は、図1(a)〜(e)及び図3(a)〜(e)のようにして導電性接続部3を加工基板1上に作製するまでは同一であるが、その後導電性接続部3を半導体チップ4に接続(転写)するのではなく、図5(a)に示すように回路基板7に接続している点が異なっている。なお接続前に予め回路基板7の電極パッド8上にAuあるいはSnPb、SnAg、SnCu、SnAgCu、SnBi、SnZn、SnZnBi、SnIn、あるいはそれらを主成分とする合金等の金属バンプ9を作製しておくことは同じである。
続いて図5(b)に示すように加工基板1を物理的、あるいはエッチング等により除去する。その後図5(c)に示すように、半導体チップ4の電極パッド5と回路基板7に転写された導電性接続部3とを接続する。なお接続前に予め半導体チップ4の電極パッド5上にAuあるいはSnPb、SnAg、SnCu、SnAgCu、SnBi、SnZn、SnZnBi、SnIn、あるいはそれらを主成分とする合金等の金属バンプ6を作製しておく。バンプ形成方法も上記実施形態と同じである。最後に図5(d)に示すように、半導体チップ4と回路基板7間に絶縁性樹脂10を封入する。
【0050】
(第4の実施の形態)
図6(a)〜(e)に、本発明の半導体装置の別の製造方法を示す。
【0051】
この製造方法は、まず図1(a)〜(e)または図3(a)〜(e)のようにして導電性接続部3を加工基板1上に作製した後、図6(a)に示すように加工基板1上に絶縁性樹脂を充填して絶縁性封止部10で導電性接続部3の周囲を被覆し、その表面の研磨して導電性接続部3の最上の表面を露出させる。その後図6(b)に示すように半導体チップ4の電極パッド5上に接続する。なお接続前に予め半導体チップ4の電極パッド5上にAuあるいはSnPb、SnAg、SnCu、SnAgCu、SnBi、SnZn、SnZnBi、SnIn、あるいはそれらを主成分とする合金等の金属バンプ6を作製しておく。バンプは、上記例と同様にして形成する。
【0052】
続いて図6(c)に示すように加工基板を物理的、あるいはエッチング等により除去し、さらに図6(d)に示すように回路基板7の電極パッド8上に形成されたAuあるいはSnPb、SnAg、SnCu、SnAgCu、SnBi、SnZn、SnZnBi、SnIn、あるいはそれらを主成分とする合金等の金属バンプ9に接続する。最後に図6(e)に示すように隙間に対して絶縁性封止部10を形成する。
【0053】
(第5の実施の形態)
図7(a)〜(e)に、他の製造方法を示す。この製造方法は、図6に示した製造方法と類似しているが、導電性接続部3の周囲を絶縁性封止部10で被覆する工程が、導電性接続部3を半導体チップ4に転写した後の工程となっている点が異なっている。
【0054】
まず図7(a)に示すように半導体チップ4に導電性接続部3を転写し、図7(b)に示すように加工基板1を除去する。その後図7(c)に示すように、導電性接続部3の周囲を樹脂で被覆し表面の研磨を行うことにより導電性接続部3の最表面を露出させる。さらに図7(d)に示すように回路基板7の電極パッド8上に形成された金属バンプ9に接続する。最後に図7(e)に示すように隙間に対して絶縁性封止部10を封入する。
【0055】
(第6の実施の形態)
図8(a)〜(f)に、加工基板の材料に非導電性材料を用いた場合の製造方法について示す。
この例は、加工基板1の材料として、シリコンや有機樹脂基板、セラミックスなど非導電性材料を基板に用いた。非導電性材料としては、導電性の付与のためのスパッタや無電解めっきなど表面処理が可能な材料であればよい。
【0056】
まず図8(a)に示すように加工基板1上にスパッタリング、真空蒸着、無電解めっき、CVD、イオンプレーティング等の薄膜形成手段により導電層11を形成する。次に図8(b)に示すようにこの加工基板1上にレジスト2を形成する。続いて図8(c)に示すようにレジスト2の露光、現像により導体部分のパターニングを行い、さらに電解めっきにより図8(d)に示すように導電性接続部3となる金属層の形成を行う。導電性接続部3として形成する導電性金属は少なくとも1層以上の層構成となっている。
【0057】
導電性接続部3となる金属層としては、ニッケル、鉄、コバルト、白金、ロジウム、パラジウム、金、銀、銅、アルミ等やそれらを主成分とする合金が挙げられる。機械的強度や電気的特性、コストを考えて、NiやCuを主体とした構成であることが望ましい。なお、この後の導電性接続部3を半導体チップに転写する工程でAu/Au熱圧着や半田接合する場合は、導電性接続部形成工程で導電性接続部3の最上面層をAuで表面処理しておくと取り扱いが容易である。
【0058】
導電性接続部3を成膜した後、図8(e)に示すようにレジストを有機溶剤等にて除去する。レジスト除去後には図8(f)に示すように、不要な導電層11をエッチングにより除去する。このようにして作製した導電性接続部3は、図1、図3、図5、図6、図7で示したいずれの製造方法にても使用できる。
【0059】
(第7の実施の形態)
図1、図3、図5、図6、図7の製造方法において、導電性接続部3の形成には電解めっきだけでなく、スパッタリング、真空蒸着、無電解めっき、イオンプレーティング、CVD等を用いて作製することも可能である。電解めっきを行う場合には加工基板1が導電性を持っていることが不可欠であるが、電解めっき以外の成膜方法を用いる場合は基板が導電性を持たなくても成膜が可能である。従ってシリコン、有機樹脂材料、セラミックスなどの基板材料も使用することが可能である。なお、スパッタリングのように基板全面に成膜される場合には、リフトオフ法を用いて導電性接続部3を形成する。
【0060】
(第8の実施の形態)
導電性接続部を作製するための加工基板1の作製方法としては、ドリルや刃による切削加工、砥石による研削、研磨などが考えられる。基板12の溝加工としては、図9(a)に示すように溝形状の制御性、精度を考えると砥石13による加工が良い。砥石の形状を変えることでテーパー角度を1度以内、角部の曲率半径を 5μm以内の誤差で厳密に制御することが可能である。
【0061】
このとき作製する加工形状は完成する導電性接続部3の形状となることから、この形状を制御することで所望の導電性接続部の形状を作製できる。この導電性接続部は屈曲部、あるいは湾曲部を含む形状となるが、加工基板上の凹んだ部分は、特にめっき膜厚が薄くなる可能性があることから、図9(b)の溝のテーパー角度αや、図9(c)に示す溝の断面形状の曲率半径Rが重要となる。αやRの値が小さすぎると応力が加わった場合の導電性接続部の破断の原因となりやすいので、応力を考えた場合にαは95度以上、Rはその後形成する導電性接続部の厚さと幅の小さい方の値の20%以上で、可能な限り大きいことが望ましい。ただしその一方で、αやRの値が大きすぎると、溝のピッチが大きくなるため、狭ピッチ化が困難で、高密度実装に適さなくなってしまう。そのため最適値は、αが120度〜150度、Rは導電性接続部の厚さと幅のいずれか小さい方の値の50%〜200%である。
【0062】
(第9の実施の形態)
比較的容易に穴加工や溝加工ができる方法としては、エッチング、レーザー加工、形彫放電加工、ワイヤ放電加工が考えられる。図10(a)に示すように加工をしない部分にレジスト14を被覆し、基板12に対してハーフエッチングを行うことも考えられる。またシリコンを基板12として用いる場合は、シリコンの異方性エッチングが精密な加工基板作製方法として利用できる。シリコンの酸化膜上に所望の加工形状のレジストパターンを施し、フッ酸でパターン部分のシリコン酸化膜を除去する。そして図10(b)に示すようにパターン以外の残ったシリコン酸化膜15を保護層として、アルカリエッチャントにより基板12に対し異方性エッチングする。この方法によればエッチング時間により溝や穴の深さを制御することが可能であり、溝形状、穴形状のいずれの形状も作製できる。
【0063】
(第10の実施の形態)
図11(a)〜(d)に、半導体チップの能動面に対して平行な方向から見た場合に、導電性接続部3をいろいろな形状で作製した例を示す。
【0064】
図11(a)は、導電性接続部3を主に湾曲部からなる形状で作製しエリアアレイで配列させた半導体装置である。このときに用いる加工基板1の構造と導電性接続部3のレジストパターンの一例を図12(a)に示す。
【0065】
図11(b)は、導電性接続部3の形状を屈曲部、もしくは湾曲部を2つ有するだけの簡単な形状で作製し、エリアアレイで配列させた半導体装置である。このときに用いる加工基板1の構造と導電性接続部3のレジストパターンの一例を図12(b)、(c)に示す。
【0066】
図11(c)は導電性接続部3の形状を螺旋形状で作製し、エリアアレイで配列させた半導体装置である。このとき用いる加工基板1の構造と導電性接続部3のレジストパターンの一例を図12(d)に示す。
【0067】
図11(d)は導電性接続部3の形状を屈曲部、もしくは湾曲部を2つ有するだけの簡単な形状で作成し、ペリフェラルで配列させた半導体装置である。このときに用いる加工基板1の構造と導電性接続部3のレジストパターンの一例を図12(e)に示す。
【0068】
加工基板1の加工溝及び加工穴と、導電性接続部3の端子の位置の関係は、基本的には一端が加工基板の最上面にあり、他端が加工基板の最下面に位置している。両者の高さの位置が異なっていれば製造上問題はないが、この配置が最も効率がよい。なお、導電性接続部3の一端は半導体チップの電極パッド位置に対応し、他端は回路基板の電極パッド位置に対応している。両端子をつなぐ配線は、他の配線や端子と接触しないことが条件である。
【0069】
(第11の実施の形態)
図13(a)〜(g)は、半導体装置を半導体チップ4の能動面に対して垂直方向から見た場合の図である。導電性接続部3の形状や方向は、レジストパターンにより半導体装置上に任意に作製することが可能である。
【0070】
図13(a)は導電性接続部3が直線形状になっている半導体装置であり、本発明による導電性接続部3を用いた場合、最も高密度実装に適している。
【0071】
図13(b)、(c)は、導電性接続部3がそれぞれU字状、Z字状になっている半導体装置を示している。導電性接続部3の形状を1つ以上の屈曲部、湾曲部を有する構造にすることで、直線形状に比べて自由度を大きくすることが可能であり、大きな応力緩和効果を付与することが可能である。これらの形状では半導体チップの能動面に対して平面方向、垂直方向いずれの方向にも導電性接続部が屈曲、あるいは湾曲しており、特に三次元的に発生する応力に対して効果が大きい。
【0072】
図13(d)は、半導体チップ4の中心に対して放射線状方向に延びる方向に導電性接続部3を設置した半導体装置であり、半導体チップ4の接続端子5がいずれもエリアアレイに端子が存在している。通常、熱応力は半導体チップ4と回路基板7との熱膨張係数の差により発生するが、その熱膨張率差の影響は半導体チップ4の中心位置に対して離れるほど大きくなり、発生する応力の方向は半導体チップ4の中心とその電極パッド5の位置を結ぶ直線とほぼ一致する。
【0073】
したがって、図13(d)に示したように半導体チップ4の中心と各電極パッド5を結ぶ直線方向に変形するように導電性弾性体3を配置する構造が最も望ましい。なおこのとき、この導電性接続部3は半導体チップの中心部よりも離れた位置にある導電性接続部3の方が、半導体チップの中心部に近い位置にある導電性接続部3よりも全長が長い方が、さらに望ましい。またこの場合、導電性接続部3の形状を直線形状から、図13(e)に示すように屈曲、湾曲している形状にすることで、さらに大きな効果が得られる。なお電極パッドが半導体チップ4上に均一に存在しない場合は、半導体チップ4の全電極パッドを均一な質点とした場合の重心と、各電極パッドを結ぶ直線方向に弾性変形するように導電性接続部3を設置すると望ましいこともある。
【0074】
一方、半導体チップ4の接続パッド5がペリフェラルに端子が存在している場合、図13(f)に示すように導電性接続部3が2箇所で屈曲、湾曲した半導体装置、図13(g)に示すように導電性接続部3が直線形状になっている半導体装置が考えられる。
【0075】
なお、導電性接続部3を半導体装置の能動面に対して垂直な方向から見た場合も、角部が存在すると機械的な力が加わった場合に破断しやすくなるので、なるべく鋭角となる形状は避け、湾曲形状にすることが望ましい。さらに図13(f)、図13(g)における導電性接続部3は、図13(d)と同様の理由で、放射線状に伸びるように設置することも考えられる。
【0076】
なお、半導体装置内に存在するこれらの複数の導電性接続部3の形状は、半導体チップ4の能動面に対して垂直方向から見た場合に、マスクパターンを変化させることで、その形状や設置されている方向を互いに一部、あるいは全て異なるようにすることも可能である。
【0077】
(第12の実施の形態)
図14(a)、(b)はそれぞれ半導体装置を半導体チップ1の能動面に対して平面方向から見た場合の図である。図14(a)は、導電性接続部3が半導体チップの中心部から外周方向に伸びている半導体装置を示している。また図14(b)は導電性接続部3が互い違いの向きで伸びている半導体装置を示している。
【0078】
このように導電性接続部3の向きを各電極パッドごとに変えることにより、パッドの配置が自由にでき、かつ半導体チップを支える導電性接続部3の全体的なバランスを良好にできる。
【0079】
なお、半導体装置内の導電性接続部の形状は、半導体チップの能動面に対して平面方向から見た場合に、加工基板1の加工形状やマスクパターン変えることで、その形状や設置されている方向を互いに一部、あるいは全て異なるようにできる。
【0080】
(第13の実施の形態)
図15(a)〜(c)に、半導体装置の他の構造を示す。これら図に示すように半導体チップの能動面に対して平行な方向から見た場合、半導体チップ4の電極パッド5上に設置された導電性接続部3が、回路基板7の電極パッド8に対して接続部が2点以上となっている。
【0081】
図15(a)は、回路基板7の電極パッド8に対する接続部が2点である半導体装置、図15(b)は回路基板7の電極パッド8に対する接続部が3点である半導体装置を示す。導電性接続部3の足の数を増やすことにより半導体チップ4を支える個々の導電性接続部3への負担を軽くすることが可能である。
【0082】
一方、図15(c)は、回路基板7に対する接続部が2点である半導体装置について示している。この半導体装置の場合、導電性接続部3は機械的には回路基板7と2点で接続しているが、半導体チップ4の電極パッド5と回路基板7の電極パッド8が電気的には1本で接続されている。電気的に接続されていないもう一方の導電性接続部3の一端は、接着剤18により回路基板7に固定されている。この接着剤18は回路基板7と導電性接続部3を接続できるものであればよい。この半導体装置の構造は、半導体チップ4の電極パッド5と回路基板7の電極パッドが1つの導電性接続部3により接続された状態において、導電性接続部3への機械的負担を軽減する効果がある。
【0083】
(第14の実施の形態)
図16は、導電性接続部3と半田バンプを併用した半導体装置について示す。この構造では、比較的応力の影響が小さい半導体チップ4の中心部は高密度実装が可能な半田バンプを19を用い、応力が加わりやすい外周部に本発明にかかる導電性接続部3を用いている。この半導体装置では、高密度実装と応力緩和の両方を実現することができる。なお半田バンプ19の部分はスタッドバンプやめっきバンプなどで代用することも可能である。
【0084】
(第15の実施の形態)
図17(a)〜(c)は、導電性接続部3の層構造を示す図である。導電性接続部3は、図17(a)に示すように1種類の金属20からなる一層構造のほか、図17(b)、(c)に示すように金属21と金属20と金属21という層構造や、金属22と金属20と金属21という二層以上の構造としてもよい。なおここでいう金属は合金であっても構わない。具体的にはCu/Au、Ni/Au、Au/Ni/Au、Cu/Ni/Au、Cu/Ni/Cuなどの層構造が考えられる。
【0085】
(第16の実施の形態)
加工基板1と導電性接続部3の剥離性は、両者の材質によって異なる。組み合わせによっては剥離が困難な場合があり、その場合には離型層を使用する。これにより加工基板1と導電性接続部3を剥離することが望ましい。離型層としては、フッ素樹脂、例えばPTFE(四フッ化エチレン樹脂)、PFA(四フッ化エチレン・パーフルオロアルコキシエチレン共重合体樹脂)、FEP(四フッ化エチレン・六フッ化プロピレン共重合体樹脂)や、それらの粒子を分散して含んだ無電解Niめっき膜、あるいは、黒鉛、窒化ホウ素、アルミニウムを主成分としたものがある。その他には、素地金属や導電性弾性体3との剥離が容易な金属や合金も離型層として使用が可能である。
【0086】
離型層は加工基板1上に予め形成しておくことで導電性接続部3の剥離を容易にする。離型層が金属、黒鉛、あるいは離型剤を分散させた金属膜などの導電性材料の場合は、離型層上に直接導電性接続部3の形成が可能である。一方、フッ素樹脂材料などからなる非導電性の離型剤を離型層に用いた場合は、図8に示した製造方法と同様に、まず基板上の非導電性離型層上にスパッタリングや無電解めっき、蒸着、CVD、イオンプレーティング等により給電層を形成してから、導電性接続部3を形成する。このようにして作製した導電性接続部3は図1、図3、図5、図6、図7に示したいずれの製造方法にも使用できる。
【0087】
【発明の効果】
本発明の半導体装置、およびその製造方法では、半導体チップと回路基板の接続に屈曲部、湾曲部を有する導電性接続部と絶縁性封止部を用いているので、柔軟に熱応力を緩和することができ、バンプへの応力集中による接続信頼性の低下を抑制することができる。
【0088】
本発明の製造方法によれば加工基板を用いることにより、簡単な工程で三次元的に比較的自由な形状の導電性接続部が形成できる。さらにフォトリソグラフィー等を利用した精密パターニング技術により微小な導電性接続部を狭ピッチで大面積に一括形成出来ることから、高密度実装においても信頼性の高い接続が実現でき、量産性にも優れている。
【0089】
【図面の簡単な説明】
【図1】本発明の第1実施形態にかかる半導体装置の製造方法を示す図である。
【図2】本発明の第1実施形態で用いられている加工基板を示す図である。
【図3】本発明の第2実施形態にかかる半導体装置の製造方法を示す図である。
【図4】本発明の第2実施形態で用いられている加工基板の断面図を示す図である。
【図5】本発明の第3実施形態の製造方法を示す図である。
【図6】本発明の第4実施形態の製造方法を示す図である。
【図7】本発明の第5実施形態の製造方法を示す図である。
【図8】本発明の第6実施形態の製造方法を示す図である。
【図9】本発明の第8実施形態の基板加工を示す図である。
【図10】本発明の第9実施形態の基板加工を示す図である。
【図11】本発明の第10実施形態にかかる半導体装置を示す図である。
【図12】本発明の第10実施形態にかかる半導体装置の製造に用いる加工基板を示す図である。
【図13】本発明の第11実施形態にかかる半導体装置を示す図である。
【図14】本発明の第12実施形態にかかる半導体装置を示す図である。
【図15】本発明の第13実施形態にかかる半導体装置を示す図である。
【図16】本発明の第14実施形態にかかる半導体装置を示す図である。
【図17】本発明の第15実施形態の導電性接続部の構造を示す図である。
【図18】従来技術による実施形態を示す図である。
【図19】従来技術による実施形態を示す図である。
【図20】従来技術による実施形態を示す図である。
【図21】従来技術による実施形態を示す図である。
【図22】従来技術による実施形態を示す図である。
【図23】従来技術による実施形態を示す図である。
【図24】屈曲形状、湾曲形状を示す模式図である。
【符号の説明】
1 加工基板
2 レジスト
3 導電性接続部
4 半導体チップ
5 半導体チップ上の電極パッド
6 半導体チップ上の金属バンプ
7 回路基板
8 回路基板上の電極パッド
9 回路基板上の金属バンプ
10 絶縁性封止部
11 金属膜
12 基板
13 砥石
14 レジスト
15 シリコン酸化膜
16 電極パッド
17 半田バンプ
18 接合剤
19 半田バンプ
20 金属膜A
21 金属膜B
22 金属膜C
101 半導体素子
102 電極パッド
103 半田バンプ
104 封止樹脂
105 電極パッド
106 キャリア基板
107 電極パッド
108 半田バンプ
109 電極パッド
110 実装基板
111 第1要素
112 膨出部
113 膨出部
114 リード
115 先端部分
116 接点
117 第2要素
118 金属層
119 レジスト
120 帯状部
121 犠牲基板
122 金属層
123 レジスト
124 先端構造
125 相互接続要素
126 トレンチ
127 半導体素子
128 パッシベーション膜
129 第1樹脂層
130 電極部
131 導体層
132 バンプ
133 第2樹脂層[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a semiconductor device in which stress generated between two connected electronic elements and thermal stress are eliminated or relaxed and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, the demand for higher density of semiconductor devices has increased along with the higher performance of electronic components. Therefore, QFP (Quad Flat Package) in which lead terminals are provided in the periphery of the package is widely used as a package structure of the semiconductor device, and recently, BGA (Ball Grid Array) in which solder ball terminals are provided on a surface lattice. By adopting, it is possible to further increase the number of pins and implement high-density mounting compared to QFP.
[0003]
Conventional packages have used wire bonding (WB) to connect the semiconductor chip and the carrier substrate. However, as the functionality of the device increases, it is difficult to cope with the increase in the number of pins and the size of the package. It has become. On the other hand, the flip chip connection (FCB) system in which the active surface of the
[0004]
While the above-mentioned solder bump connection and the increase in the number of pins due to the increase in the number of pins have progressed, the difference in thermal expansion coefficient between the organic resin substrate and the ceramic substrate, which are widely used as circuit boards in semiconductor devices, and the semiconductor elements. Due to the resulting thermal stress, cracks occur in the
On the other hand, there is a method of preventing the breakage of the
[0005]
Furthermore, recently, as the pitch of the
[0006]
In order to solve the above problems, there is a method of positively relaxing the stress by making the semiconductor device a stress relaxation structure. So far, semiconductor devices having several stress relaxation structures and methods for manufacturing the same have been proposed. Proposed.
[0007]
FIG. 19 shows a microelectronic element mounting structure described in Japanese Patent Laid-Open No. 10-256314. In this mounting structure, one end of an S-
[0008]
The
[0009]
Next, as shown in FIG. 20B, a nickel layer and a gold layer are formed by electroplating on the pattern portion to be the
[0010]
As shown in FIG. 20E, the
[0011]
In this state, the
[0012]
FIG. 22 shows a method for manufacturing the interconnecting
[0013]
A
[0014]
FIG. 23 shows a semiconductor device described in Japanese Patent Laid-Open No. 2000-323628. This is provided with one or
[0015]
Further, as a semiconductor device structure similar to this device, an alloy that causes a martensitic phase transformation in a part of a wiring conductor path as shown in JP-A-2001-24021, JP-A-2000-323605, and JP-A-2000-323604 is used. There are known ones that are interposed, ones that use a porous resin, and ones that are provided with a material exhibiting thermal stress anisotropy in a resin layer.
[0016]
[Problems to be solved by the invention]
In order to relieve the thermal stress in this way, a semiconductor device having a stress relieving function and a method for manufacturing the same have been proposed, but one problem is the controllability of the shape of the conductor connection portion. In a general semiconductor package, the relative position of a semiconductor chip and a plastic substrate is shifted by about several tens of μm due to a difference in thermal expansion coefficient. In order to absorb such a large shift, it is necessary that the conductor connecting portion is deformed to allow the shift.
[0017]
In consideration of such a point, the method of forming the conductor connecting portion in a flat shape and performing it has an insufficient stress relaxation effect as compared with a method having a bent or curved structure. For this reason, in the connection method having no bent portion or curved portion, it becomes necessary to separately produce an element for relaxing the stress in order to provide an effect of stress relaxation.
[0018]
In addition, connecting a semiconductor chip having electrode pads arranged at a narrow pitch in an area array and a circuit board, and forming and connecting conductor connections in a batch is advantageous for increasing the density and cost of the package. . For this reason, in providing a stress relaxation structure, it is required that the conductor connection portions can be formed collectively at a narrow pitch.
[0019]
However, for example, in the method of manufacturing a connecting portion having spring properties with a wire core, not only is it difficult to form the connecting portions all at once, but it is also technically difficult to manufacture minute springs at a narrow pitch.
[0020]
On the other hand, with the method of forming a conductor connection portion and then deforming it, it is difficult to accurately control the shape of the conductive connection portion, and an additional burden is applied to the pad and the connection portion when deforming. May end up.
[0021]
Further, when under-etching is used in the manufacturing process, the etching time needs to be strictly controlled, and there are problems such as a limitation on the shape of the connection portion. In addition to this, when etching is used, there is a restriction that a difference in chemical properties must be provided between a material that becomes a sacrificial layer used when manufacturing the connection portion and a material that becomes the connection portion, Limitations on the combination of sacrificial layer and connection material. For example, the conductive connection portion may have a multi-layer structure so as to have a plurality of functions. However, when etching is performed, the selection range of the material is limited.
[0022]
On the other hand, in the method of producing the conductor part on the stress relaxation resin, part of the shape of the taper part is controlled at the time of resin formation. For example, when using photolithography technology or laser processing, conductor connection The shape of the part can be defined to some extent.
[0023]
However, this method requires photosensitive resin and desmear treatment. In addition, since a conductor layer is basically formed on a non-conductive resin, processes such as vapor deposition and sputtering are required. However, these film formation methods generally have a problem in step coverage to a stepped portion, and in particular, Depending on the taper angle, the connection reliability tends to be low. In addition, when the stress relaxation resin is formed before forming the conductive connection portion, there is a problem that the material is limited because a resin material that matches the manufacturing process of the conductive connection layer must be selected. .
[0024]
The present invention aims to solve the above problems.
[0025]
[Means for Solving the Problems]
In the present invention, in order to solve the above problems, a semiconductor device and a manufacturing method thereof are configured as follows.
[0026]
In a semiconductor device in which a semiconductor chip and electrode pads of a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealant is filled between the semiconductor chip and the circuit board, the conductive The connecting portion is made of an elastic material, and at least one of the conductive connecting portions includes two or more bent portions or curved portions when viewed from a direction parallel to the active surface of the semiconductor chip, and The semiconductor device, wherein the insulating sealant is made of an elastic material.
A processed substrate having predetermined irregularities on the surface is prepared, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the irregularities by using a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Is connected by the conductive connecting portion.
In this way, it is possible to form minute conductive connection parts with precisely controlled shapes by using a processed substrate whose surface is precisely micromachined and patterning technology, and it seems that terminals are arranged in a narrow pitch in the area array In addition, it is easy to form a deformable minute connecting portion. Note that the ease of shape control here means that the three-dimensional shape of the conductive connection part can be designed relatively freely, such as the bending angle in the bent shape and the radius of curvature in the bent shape. I mean. In particular, when a metal substrate is machined, the shape can be strictly controlled within a taper angle within an error of 1 degree and a radius of curvature within an error of 5 μm.
[0027]
Here, the bending means, for example, as shown in FIG. 24A, that a certain line is bent with a measurable angle α, β. On the other hand, “curved” means that a certain line does not have a clear angle as shown in FIG. 24B but has a bent shape. At this time, the radius of curvature of the curved portion is R.
[0028]
Furthermore, the shape of the conductor connecting portion is preferably a shape having a plurality of bent portions or curved portions. In the connection part of a semiconductor device, if those bent parts are bent at a right angle or less, the force concentrates on the bent part and the part is easily broken, so the part bent at a right angle or less as much as possible It is desirable that the shape does not have a bend, and the bending angle is desirably about 95 to 170 degrees. In particular, when the conductor connection part is bent at an angle of 120 degrees or less, it is necessary to devise measures to prevent stress from concentrating on the corner part, such as a curved shape having an appropriate radius of curvature. The curvature radius is preferably 20% or more with respect to the width or thickness of the conductor connecting portion.
The bending angle α of the bending portion and the curvature radius R of the bending portion are 120 degrees ≦ α ≦ 150 in consideration of high-density mounting and a burden on the corner portion of the conductor connection portion when thermal stress is applied to the conductor connection portion. The degree is best if 50% ≦ R ≦ 200%.
[0029]
This is superior in that it can form a connection part of a desired shape for the purpose of realizing stress relaxation and high-density mounting, and in particular, a complicated shape having four or more bent parts and curved parts. In the case of manufacturing the conductive connection portion, the shape control is much easier than in the conventional method. In addition, the conductive connecting portion can be bent and curved in both the height direction and the planar direction, and the three-dimensional thermal stress can be effectively absorbed by the conductive connecting portion alone.
[0030]
Further, in the present invention, since the bent and curved conductive connection portions can be connected and used as they are, no extra burden is placed on the pads of the semiconductor element or the circuit board or the connection portions themselves.
[0031]
Furthermore, when trying to produce a connecting part having a bent part or a curved part by a normal method, the manufacturing method becomes complicated and the number of steps increases, but in the method of the present invention, by using a processed substrate, A conductive connection part having a bent part or a curved part directly on a processed substrate can be produced, and the number of processes does not increase even when compared with a conventional manufacturing method.
[0032]
Furthermore, this manufacturing method deposits the conductive connection portion by plating or the like, and does not include an under-etching step when the conductive connection portion is manufactured. Therefore, there is no restriction on the shape of the conductive connection portion, the material can be freely selected, and a conductive connection portion having a multilayer structure can be easily manufactured.
[0033]
In addition, since the processed substrate can basically use a conductor such as a metal, the throwing power of the plating film to the portion with the step or taper is relatively good, without being greatly affected by the step or taper angle, A conductor connection can be formed.
[0034]
In addition, since the insulating elastic resin for sealing the conductor connection portion is applied and filled after the conductor connection portion is formed, the degree of freedom in selecting the resin material is higher than the method of supplying the resin in advance. Therefore, when selecting an insulating elastic resin, a commercially available low elastic modulus resin of 500 MPa or less can be easily applied.
[0035]
Furthermore, since the spring structure is formed collectively by the thin film forming method according to the present invention, it can be formed collectively even for a semiconductor device having a large number of terminals.
[0036]
As described above, in the present invention, a large number of minute and deformable conductive connection portions can be manufactured, and the connection reliability of a semiconductor device mounted at high density can be increased.
[0037]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of a semiconductor device and a manufacturing method thereof according to the present invention will be described.
[0038]
(First embodiment)
1A to 1I show a method for manufacturing a semiconductor device having terminals in an area array on a semiconductor chip. First, as shown in FIG. 1A, a processed
[0039]
Next, a resist 2 is formed on the processed
The resist pattern is formed so that the conductive
[0040]
Further, as shown in FIG. 1D, a metal layer that becomes the
[0041]
The
[0042]
After the
Before connection, a
[0043]
Next, the processed
[0044]
Finally, an insulating
[0045]
Thereby, the
[0046]
(Second Embodiment)
3A to 3I show a method of manufacturing a semiconductor device having a
[0047]
The
[0048]
(Third embodiment)
5A to 5D show a third method for manufacturing a semiconductor device.
[0049]
1 and FIG. 3 is different from the method of manufacturing the semiconductor device of FIG. 1 and FIG. 3 in that the
Subsequently, as shown in FIG. 5B, the processed
[0050]
(Fourth embodiment)
6A to 6E show another method for manufacturing the semiconductor device of the present invention.
[0051]
In this manufacturing method, first, the
[0052]
Subsequently, the processed substrate is removed physically or by etching as shown in FIG. 6C, and Au or SnPb formed on the
[0053]
(Fifth embodiment)
7A to 7E show another manufacturing method. This manufacturing method is similar to the manufacturing method shown in FIG. 6, but the step of covering the periphery of the
[0054]
First, the conductive connecting
[0055]
(Sixth embodiment)
FIGS. 8A to 8F show a manufacturing method in the case where a non-conductive material is used as the material of the processed substrate.
In this example, a non-conductive material such as silicon, an organic resin substrate, or ceramics is used for the substrate as the material of the processed
[0056]
First, as shown in FIG. 8A, a
[0057]
As a metal layer used as the
[0058]
After the
[0059]
(Seventh embodiment)
In the manufacturing method of FIGS. 1, 3, 5, 6, and 7, not only electrolytic plating but also sputtering, vacuum deposition, electroless plating, ion plating, CVD, etc. are used for forming the
[0060]
(Eighth embodiment)
As a manufacturing method of the processed
[0061]
Since the processed shape produced at this time becomes the shape of the completed
[0062]
(Ninth embodiment)
Etching, laser machining, sculpture electric discharge machining, and wire electric discharge machining are conceivable as methods that allow relatively easy hole machining and groove machining. As shown in FIG. 10A, it is also conceivable that a portion not to be processed is covered with a resist 14 and half etching is performed on the
[0063]
(Tenth embodiment)
FIGS. 11A to 11D show examples in which the
[0064]
FIG. 11A shows a semiconductor device in which the
[0065]
FIG. 11B shows a semiconductor device in which the
[0066]
FIG. 11C shows a semiconductor device in which the
[0067]
FIG. 11D shows a semiconductor device in which the shape of the conductive connecting
[0068]
The relationship between the processing groove and processing hole of the processed
[0069]
(Eleventh embodiment)
13A to 13G are views when the semiconductor device is viewed from the direction perpendicular to the active surface of the
[0070]
FIG. 13A shows a semiconductor device in which the
[0071]
FIGS. 13B and 13C show a semiconductor device in which the
[0072]
FIG. 13D shows a semiconductor device in which the
[0073]
Therefore, as shown in FIG. 13D, the structure in which the conductive
[0074]
On the other hand, when the
[0075]
Even when the
[0076]
The shape of the plurality of
[0077]
(Twelfth embodiment)
FIGS. 14A and 14B are views when the semiconductor device is viewed from the plane direction with respect to the active surface of the
[0078]
Thus, by changing the direction of the
[0079]
In addition, the shape of the conductive connection part in the semiconductor device is set or changed by changing the processing shape or mask pattern of the
[0080]
(Thirteenth embodiment)
15A to 15C show other structures of the semiconductor device. As shown in these drawings, when viewed from a direction parallel to the active surface of the semiconductor chip, the
[0081]
FIG. 15A shows a semiconductor device in which the connection part of the
[0082]
On the other hand, FIG. 15C shows a semiconductor device having two connection portions to the
[0083]
(Fourteenth embodiment)
FIG. 16 shows a semiconductor device using both the conductive connecting
[0084]
(Fifteenth embodiment)
FIGS. 17A to 17C are diagrams illustrating the layer structure of the
[0085]
(Sixteenth embodiment)
The peelability of the processed
[0086]
The release layer is formed in advance on the processed
[0087]
【The invention's effect】
In the semiconductor device and the manufacturing method thereof according to the present invention, since the conductive connection portion having the bent portion and the curved portion and the insulating sealing portion are used for connecting the semiconductor chip and the circuit board, the thermal stress is flexibly relaxed. It is possible to suppress a decrease in connection reliability due to stress concentration on the bumps.
[0088]
According to the manufacturing method of the present invention, by using a processed substrate, a conductive connection portion having a relatively free shape in three dimensions can be formed by a simple process. In addition, since fine conductive connection parts can be formed in a large area with a narrow pitch by precision patterning technology using photolithography, etc., high-reliability connection can be realized even in high-density mounting, and mass production is also excellent. Yes.
[0089]
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a view showing a processed substrate used in the first embodiment of the present invention.
FIG. 3 is a diagram illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention.
FIG. 4 is a cross-sectional view of a processed substrate used in a second embodiment of the present invention.
FIG. 5 is a diagram showing a manufacturing method according to a third embodiment of the present invention.
FIG. 6 is a diagram showing a manufacturing method according to a fourth embodiment of the present invention.
FIG. 7 is a diagram showing a manufacturing method according to a fifth embodiment of the present invention.
FIG. 8 is a diagram showing a manufacturing method according to a sixth embodiment of the present invention.
FIG. 9 is a diagram showing substrate processing according to an eighth embodiment of the present invention.
FIG. 10 is a diagram showing substrate processing according to a ninth embodiment of the present invention.
FIG. 11 is a diagram showing a semiconductor device according to a tenth embodiment of the present invention.
FIG. 12 is a view showing a processed substrate used for manufacturing a semiconductor device according to a tenth embodiment of the present invention.
FIG. 13 is a diagram showing a semiconductor device according to an eleventh embodiment of the present invention.
FIG. 14 is a diagram showing a semiconductor device according to a twelfth embodiment of the present invention.
FIG. 15 is a diagram illustrating a semiconductor device according to a thirteenth embodiment of the present invention.
FIG. 16 is a diagram showing a semiconductor device according to a fourteenth embodiment of the present invention.
FIG. 17 is a view showing a structure of a conductive connection part according to a fifteenth embodiment of the present invention.
FIG. 18 shows an embodiment according to the prior art.
FIG. 19 shows an embodiment according to the prior art.
FIG. 20 shows an embodiment according to the prior art.
FIG. 21 shows an embodiment according to the prior art.
FIG. 22 shows an embodiment according to the prior art.
FIG. 23 shows an embodiment according to the prior art.
FIG. 24 is a schematic diagram showing a bent shape and a curved shape.
[Explanation of symbols]
1 Processing substrate
2 resist
3 Conductive connections
4 Semiconductor chip
5 Electrode pads on the semiconductor chip
6 Metal bumps on the semiconductor chip
7 Circuit board
8 Electrode pads on the circuit board
9 Metal bumps on the circuit board
10 Insulating sealing part
11 Metal film
12 Substrate
13 Whetstone
14 resist
15 Silicon oxide film
16 electrode pads
17 Solder bump
18 Bonding agent
19 Solder bump
20 Metal film A
21 Metal film B
22 Metal film C
101 Semiconductor device
102 Electrode pad
103 Solder bump
104 Sealing resin
105 electrode pad
106 Carrier substrate
107 electrode pads
108 Solder bump
109 electrode pad
110 Mounting board
111 1st element
112 bulge
113 bulge
114 leads
115 Tip
116 contacts
117 second element
118 Metal layer
119 resist
120 Band
121 Sacrificial substrate
122 Metal layer
123 resist
124 Tip structure
125 interconnect elements
126 trench
127 Semiconductor device
128 Passivation film
129 First resin layer
130 Electrode section
131 Conductor layer
132 Bump
133 2nd resin layer
Claims (42)
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記加工基板上に絶縁性部材を設けて前記導電性接続部を前記絶縁性部材により被覆し、前記絶縁性部材の一部を研磨して前記導電性接続部の一端を露出させ、露出された前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入したことを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having predetermined irregularities on the surface is manufactured, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the irregularities with a metal film, and an insulating member is provided on the processed substrate. Covering the conductive connecting portion with the insulating member, polishing a part of the insulating member to expose one end of the conductive connecting portion, and exposing one end of the exposed conductive connecting portion to a semiconductor chip; Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device, wherein an insulating resin is sealed between the semiconductor chip and the circuit board.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッド上に接続させ、前記導電性接続部から前記加工基板を除去し、前記半導体チップ、あるいは回路基板上に絶縁性部材を設けて前記導電性接続部を前記絶縁性部材で被覆し、前記絶縁性部材の一部を研磨して導電性接続部の他端を露出させ、露出された前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入したことを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having a predetermined unevenness on the surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, the conductive substrate is connected to one of the electrode pads of the circuit board, the processed substrate is removed from the conductive connection portion, and an insulating member is provided on the semiconductor chip or the circuit board to insulate the conductive connection portion. Covering the insulating member, polishing a part of the insulating member to expose the other end of the conductive connecting portion, and exposing the other end of the conductive connecting portion to either a circuit board or a semiconductor chip. A method for manufacturing a semiconductor device, comprising: connecting an electrode pad and encapsulating an insulating resin between the semiconductor chip and the circuit board.
前記加工基板は、金属製であることを特徴とする半導体装置の製造方法。A processed substrate having a predetermined unevenness on the surface is produced, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Are connected by the conductive connection part,
The method for manufacturing a semiconductor device, wherein the processed substrate is made of metal.
前記加工基板は、切削、研削、研磨の少なくとも1つを用いて形成したことを特徴とする半導体装置の製造方法。A processed substrate having a predetermined unevenness on the surface is produced, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Are connected by the conductive connection part,
The method of manufacturing a semiconductor device, wherein the processed substrate is formed using at least one of cutting, grinding, and polishing.
前記加工基板は、レーザー加工、形彫放電加工、ワイヤ放電加工の少なくとも1つを用いたことを特徴とする半導体装置の製造方法。A processed substrate having predetermined irregularities on the surface is prepared, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the irregularities by using a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Are connected by the conductive connection part,
A method of manufacturing a semiconductor device, wherein the processed substrate uses at least one of laser processing, sculpting electric discharge processing, and wire electric discharge processing.
前記加工基板は、マスター金型から複製された樹脂製基板、セラミックス製基板、あるいは金属製基板であることを特徴とする半導体装置の製造方法。A processed substrate having predetermined irregularities on the surface is prepared, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the irregularities by using a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Are connected by the conductive connection part,
The method of manufacturing a semiconductor device, wherein the processed substrate is a resin substrate, a ceramic substrate, or a metal substrate replicated from a master mold.
前記加工基板は、少なくとも前記導電性接続部との界面に離型層を有することを特徴とする半導体装置の製造方法。A processed substrate having a predetermined unevenness on the surface is produced, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Are connected by the conductive connection part,
The process substrate includes a release layer at least at an interface with the conductive connection portion.
前記加工基板上に設けられた溝、または非貫通穴、または突起の断面形状の曲率半径が、その後形成する導電性接続部の厚さ、または幅の20%以上であることを特徴とする半導体装置の製造方法。A processed substrate having a predetermined unevenness on the surface is produced, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Are connected by the conductive connection part,
A semiconductor device characterized in that a radius of curvature of a cross-sectional shape of a groove, a non-through hole, or a protrusion provided on the processed substrate is 20% or more of a thickness or a width of a conductive connection portion to be formed thereafter. Device manufacturing method.
加工基板上に形成された導電性接続部の表面にAuめっき処理を行い、前記半導体チップ、または前記回路基板の電極パッド上にAuスタッドバンプ、無電解Ni/Auめっきバンプ、電解Auめっきバンプ、Ni/Auめっきバンプのいずれかを形成し、前記両者をAu/Auの熱圧着により接続させることを特徴とする半導体装置の製造方法。A processed substrate having predetermined irregularities on the surface is prepared, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the irregularities by using a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Are connected by the conductive connection part,
Au plating treatment is performed on the surface of the conductive connection portion formed on the processed substrate, Au stud bumps, electroless Ni / Au plating bumps, electrolytic Au plating bumps on the electrode pads of the semiconductor chip or the circuit board, One of the Ni / Au plating bumps is formed, and the both are connected by Au / Au thermocompression bonding.
前記半導体チップ、前記回路基板のいずれか一方、もしくは両方の電極パッド表面を無電解Auめっきにより処理してことを特徴とする半導体装置の製造方法。A processed substrate having predetermined irregularities on the surface is prepared, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the irregularities by using a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Are connected by the conductive connection part,
A method of manufacturing a semiconductor device, wherein the surface of one or both of the semiconductor chip and the circuit board is processed by electroless Au plating.
前記半導体チップと接続するための前記回路基板、または前記回路基板と接続するための前記半導体チップの電極パッド上にSnPb、SnAg、SnCu、SnAgCu、SnBi、SnZn、SnZnBi、SnInのいずれかを主成分とする半田を供給し、リフローを行うことにより、前記導電性接続部の前記半導体チップ、または前記回路基板に接続されていない側の端部と、前記回路基板、または前記半導体チップとを接続することを特徴とする半導体装置の製造方法。A processed substrate having a predetermined unevenness on the surface is produced, and a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is formed on one side And connecting the other end of the conductive connection part to the other electrode part, and connecting the one electrode part and the other electrode part to each other. Are connected by the conductive connection part,
Main component of any one of SnPb, SnAg, SnCu, SnAgCu, SnBi, SnZn, SnZnBi, and SnIn on the circuit board for connecting to the semiconductor chip or on the electrode pad of the semiconductor chip for connecting to the circuit board By supplying the solder and reflowing, the end of the conductive connection portion that is not connected to the semiconductor chip or the circuit board is connected to the circuit board or the semiconductor chip. A method for manufacturing a semiconductor device.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入した半導体装置の製造方法であって、
前記加工基板は、金属製であることを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having predetermined irregularities on a surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the irregularities with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device in which an insulating resin is sealed between the semiconductor chip and the circuit board,
The method for manufacturing a semiconductor device, wherein the processed substrate is made of metal.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入した半導体装置の製造方法であって、
前記加工基板は、切削、研削、研磨の少なくとも1つを用いて形成したことを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having a predetermined unevenness on the surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device in which an insulating resin is sealed between the semiconductor chip and the circuit board,
The method of manufacturing a semiconductor device, wherein the processed substrate is formed using at least one of cutting, grinding, and polishing.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入した半導体装置の製造方法であって、
前記加工基板は、レーザー加工、形彫放電加工、ワイヤ放電加工の少なくとも1つを用いたことを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having a predetermined unevenness on the surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device in which an insulating resin is sealed between the semiconductor chip and the circuit board,
A method of manufacturing a semiconductor device, wherein the processed substrate uses at least one of laser processing, sculpting electric discharge processing, and wire electric discharge processing.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入した半導体装置の製造方法であって、
前記加工基板は、マスター金型から複製された樹脂製基板、セラミックス製基板、あるいは金属製基板であることを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having a predetermined unevenness on the surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device in which an insulating resin is sealed between the semiconductor chip and the circuit board,
The method of manufacturing a semiconductor device, wherein the processed substrate is a resin substrate, a ceramic substrate, or a metal substrate replicated from a master mold.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入した半導体装置の製造方法であって、
前記加工基板は、少なくとも前記導電性接続部との界面に離型層を有することを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having a predetermined unevenness on the surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device in which an insulating resin is sealed between the semiconductor chip and the circuit board,
The process substrate includes a release layer at least at an interface with the conductive connection portion.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入した半導体装置の製造方法であって、
前記加工基板上に設けられた溝、または非貫通穴、または突起の断面形状の曲率半径が、その後形成する導電性接続部の厚さ、または幅の20%以上であることを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having predetermined irregularities on a surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the irregularities with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device in which an insulating resin is sealed between the semiconductor chip and the circuit board,
A semiconductor device characterized in that a radius of curvature of a cross-sectional shape of a groove, a non-through hole, or a protrusion provided on the processed substrate is 20% or more of a thickness or a width of a conductive connection portion to be formed thereafter. Device manufacturing method.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入した半導体装置の製造方法であって、
加工基板上に形成された導電性接続部の表面にAuめっき処理を行い、前記半導体チップ、または前記回路基板の電極パッド上にAuスタッドバンプ、無電解Ni/Auめっきバンプ、電解Auめっきバンプ、Ni/Auめっきバンプのいずれかを形成し、前記両者をAu/Auの熱圧着により接続させることを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having a predetermined unevenness on the surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device in which an insulating resin is sealed between the semiconductor chip and the circuit board,
Au plating treatment is performed on the surface of the conductive connection portion formed on the processed substrate, Au stud bumps, electroless Ni / Au plating bumps, electrolytic Au plating bumps on the electrode pads of the semiconductor chip or the circuit board, One of the Ni / Au plating bumps is formed, and the both are connected by Au / Au thermocompression bonding.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入した半導体装置の製造方法であって、
前記半導体チップ、前記回路基板のいずれか一方、もしくは両方の電極パッド表面を無電解Auめっきにより処理してことを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having a predetermined unevenness on the surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the unevenness with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device in which an insulating resin is sealed between the semiconductor chip and the circuit board,
A method of manufacturing a semiconductor device, wherein the surface of one or both of the semiconductor chip and the circuit board is processed by electroless Au plating.
表面に所定の凹凸を有する加工基板を作製し、前記加工基板の前記表面に前記凹凸に沿って所定形状の導電性接続部を金属膜により形成し、前記導電性接続部の一端を半導体チップ、あるいは回路基板のいずれかの電極パッドに接続させ、前記導電性接続部から前記加工基板を除去し、前記導電性接続部の他端を回路基板、あるいは半導体チップのいずれかの電極パッドに接続させ、前記半導体チップと前記回路基板との間に絶縁性樹脂を封入した半導体装置の製造方法であって、
前記半導体チップと接続するための前記回路基板、または前記回路基板と接続するための前記半導体チップの電極パッド上にSnPb、SnAg、SnCu、SnAgCu、SnBi、SnZn、SnZnBi、SnInのいずれかを主成分とする半田を供給し、リフローを行うことにより、前記導電性接続部の前記半導体チップ、または前記回路基板に接続されていない側の端部と、前記回路基板、または前記半導体チップとを接続することを特徴とする半導体装置の製造方法。In a method for manufacturing a semiconductor device in which an elastically deformable conductive connecting portion is provided between a semiconductor chip and a circuit board and both are connected,
A processed substrate having predetermined irregularities on a surface is produced, a conductive connection portion having a predetermined shape is formed on the surface of the processed substrate along the irregularities with a metal film, and one end of the conductive connection portion is a semiconductor chip, Alternatively, it is connected to one of the electrode pads on the circuit board, the processed substrate is removed from the conductive connection portion, and the other end of the conductive connection portion is connected to one of the electrode pads on the circuit board or the semiconductor chip. A method of manufacturing a semiconductor device in which an insulating resin is sealed between the semiconductor chip and the circuit board,
Main component of any one of SnPb, SnAg, SnCu, SnAgCu, SnBi, SnZn, SnZnBi, and SnIn on the circuit board for connecting to the semiconductor chip or on the electrode pad of the semiconductor chip for connecting to the circuit board By supplying the solder and reflowing, the end of the conductive connection portion that is not connected to the semiconductor chip or the circuit board is connected to the circuit board or the semiconductor chip. A method for manufacturing a semiconductor device.
前記導電性接続部は、弾性材料からなり、前記導電性接続部の少なくとも1つが、前記半導体チップの能動面に対して平行な方向から見た場合に、2以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は導電性接続部の上部、下部、側面を取り囲むようにチップと回路基板との間に設けられ、かつ低弾性の弾性材料からなり、低弾性の弾性材料である前記絶縁性封止剤の弾性率が500MPa以下であることを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connection portion is made of an elastic material, and when at least one of the conductive connection portions is viewed from a direction parallel to the active surface of the semiconductor chip, two or more bent portions or curved portions are formed. wherein, and wherein the insulating sealing agent upper portion of the conductive connection portion, the lower, provided between the chip and the circuit board so as to surround the side surfaces, and Ri Do from an elastic material with low elasticity, low modulus elastomeric material the semiconductor device modulus of the insulating sealing agent, characterized in der Rukoto below 500MPa is.
前記導電性接続部は弾性材料から構成され、前記導電性接続部の少なくとも1つが前記半導体チップの能動面に対して平行な方向から見た場合に、4以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は導電性接続部の上部、下部、側面を取り囲むようにチップと回路基板との間に設けられ、かつ低弾性の弾性材料からなり、低弾性の弾性材料である前記絶縁性封止剤の弾性率が500MPa以下であることを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connecting portion is made of an elastic material, and includes at least four bent portions or curved portions when at least one of the conductive connecting portions is viewed from a direction parallel to the active surface of the semiconductor chip. and the insulative sealant top of electrically conductive connection, the lower, provided between the chip and the circuit board so as to surround the side surfaces, and Ri Do from an elastic material with low elasticity, low modulus elastic material the semiconductor device modulus of a said insulating sealing agent, characterized in der Rukoto below 500 MPa.
前記導電性接続部は弾性材料からなり、前記導電性接続部の少なくとも1つが前記半導体チップの能動面に対して平行な方向から見た場合に2以上、垂直方向からから見た場合に1以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は導電性接続部の上部、下部、側面を取り囲むようにチップと回路基板との間に設けられ、かつ低弾性の弾性材料であり、低弾性の弾性材料である前記絶縁性封止剤の弾性率が500MPa以下であることを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connection portion is made of an elastic material, and at least one of the conductive connection portions is 2 or more when viewed from a direction parallel to the active surface of the semiconductor chip, and 1 or more when viewed from a vertical direction. The insulating sealant is provided between the chip and the circuit board so as to surround the upper, lower and side surfaces of the conductive connecting portion, and is made of a low elastic elastic material. Ah is, the semiconductor device modulus of the insulating sealant is an elastic material having a low elasticity, characterized in der Rukoto below 500 MPa.
前記導電性接続部は、弾性材料からなり、前記導電性接続部の少なくとも1つが、前記半導体チップの能動面に対して平行な方向から見た場合に、2以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料からなり、
前記導電性接続部を半導体チップの能動面に対し垂直な方向から見た場合、前記半導体チップの中心部より離れた位置にある導電性接続部が、半導体チップの中心部に近い位置にある導電性接続部よりも長いことを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connection portion is made of an elastic material, and when at least one of the conductive connection portions is viewed from a direction parallel to the active surface of the semiconductor chip, two or more bent portions or curved portions are formed. And the insulating sealant is made of an elastic material,
When the conductive connection portion is viewed from a direction perpendicular to the active surface of the semiconductor chip, the conductive connection portion located away from the center portion of the semiconductor chip is located close to the center portion of the semiconductor chip. A semiconductor device characterized in that it is longer than the conductive connection portion.
前記導電性接続部は、弾性材料からなり、前記導電性接続部の少なくとも1つが、前記半導体チップの能動面に対して平行な方向から見た場合に、2以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料からなり、
前記導電性接続部を半導体チップの能動面に対して垂直な方向から見た場合、前記導電性接続部が、半導体チップの全電極パッドを均一な質点とした場合の重心と各電極パッドとを結ぶ直線方向に概ね弾性変形するように配置されていることを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connection portion is made of an elastic material, and when at least one of the conductive connection portions is viewed from a direction parallel to the active surface of the semiconductor chip, two or more bent portions or curved portions are formed. And the insulating sealant is made of an elastic material,
When the conductive connection portion is viewed from a direction perpendicular to the active surface of the semiconductor chip, the conductive connection portion has the center of gravity when each electrode pad of the semiconductor chip is a uniform mass point and each electrode pad. A semiconductor device, wherein the semiconductor device is disposed so as to be elastically deformed in a straight line direction.
前記導電性接続部は、弾性材料からなり、前記導電性接続部の少なくとも1つが、前記半導体チップの能動面に対して平行な方向から見た場合に、2以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料からなり、
前記導電性接続部を半導体チップの能動面に対して平行な方向から見た場合、前記半導体チップの外周部に配置された電極パッドに接続された導電性接続部と、内側に配置された電極パッドに接続された導電性接続部とがそれぞれ反対方向に伸ばされ、前記回路基板側の電極パッドに接続されていることを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connection portion is made of an elastic material, and when at least one of the conductive connection portions is viewed from a direction parallel to the active surface of the semiconductor chip, two or more bent portions or curved portions are formed. And the insulating sealant is made of an elastic material,
When the conductive connection portion is viewed from a direction parallel to the active surface of the semiconductor chip, the conductive connection portion connected to the electrode pad disposed on the outer peripheral portion of the semiconductor chip and the electrode disposed on the inner side A semiconductor device characterized in that conductive connection portions connected to pads are extended in opposite directions and connected to electrode pads on the circuit board side.
前記導電性接続部は弾性材料から構成され、前記導電性接続部の少なくとも1つが前記半導体チップの能動面に対して平行な方向から見た場合に、4以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料からなり、
前記導電性接続部を半導体チップの能動面に対し垂直な方向から見た場合、前記半導体チップの中心部より離れた位置にある導電性接続部が、半導体チップの中心部に近い位置にある導電性接続部よりも長いことを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connecting portion is made of an elastic material, and includes at least four bent portions or curved portions when at least one of the conductive connecting portions is viewed from a direction parallel to the active surface of the semiconductor chip. And the insulating sealant is made of an elastic material,
When the conductive connection portion is viewed from a direction perpendicular to the active surface of the semiconductor chip, the conductive connection portion located away from the center portion of the semiconductor chip is located close to the center portion of the semiconductor chip. A semiconductor device characterized in that it is longer than the conductive connection portion.
前記導電性接続部は弾性材料から構成され、前記導電性接続部の少なくとも1つが前記半導体チップの能動面に対して平行な方向から見た場合に、4以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料からなり、
前記導電性接続部を半導体チップの能動面に対して垂直な方向から見た場合、前記導電性接続部が、半導体チップの全電極パッドを均一な質点とした場合の重心と各電極パッドとを結ぶ直線方向に概ね弾性変形するように配置されていることを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connecting portion is made of an elastic material, and includes at least four bent portions or curved portions when at least one of the conductive connecting portions is viewed from a direction parallel to the active surface of the semiconductor chip. And the insulating sealant is made of an elastic material,
When the conductive connection portion is viewed from a direction perpendicular to the active surface of the semiconductor chip, the conductive connection portion has the center of gravity when each electrode pad of the semiconductor chip is a uniform mass point and each electrode pad. A semiconductor device, wherein the semiconductor device is disposed so as to be elastically deformed in a straight line direction.
前記導電性接続部は弾性材料から構成され、前記導電性接続部の少なくとも1つが前記半導体チップの能動面に対して平行な方向から見た場合に、4以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料からなり、
前記導電性接続部を半導体チップの能動面に対して平行な方向から見た場合、前記半導体チップの外周部に配置された電極パッドに接続された導電性接続部と、内側に配置された電極パッドに接続された導電性接続部とがそれぞれ反対方向に伸ばされ、前記回路基板側の電極パッドに接続されていることを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connecting portion is made of an elastic material, and includes at least four bent portions or curved portions when at least one of the conductive connecting portions is viewed from a direction parallel to the active surface of the semiconductor chip. And the insulating sealant is made of an elastic material,
When the conductive connection portion is viewed from a direction parallel to the active surface of the semiconductor chip, the conductive connection portion connected to the electrode pad disposed on the outer peripheral portion of the semiconductor chip and the electrode disposed on the inner side A semiconductor device characterized in that conductive connection portions connected to pads are extended in opposite directions and connected to electrode pads on the circuit board side.
前記導電性接続部は弾性材料からなり、前記導電性接続部の少なくとも1つが前記半導体チップの能動面に対して平行な方向から見た場合に2以上、垂直方向からから見た場合に1以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料であり、
前記導電性接続部を半導体チップの能動面に対し垂直な方向から見た場合、前記半導体チップの中心部より離れた位置にある導電性接続部が、半導体チップの中心部に近い位置にある導電性接続部よりも長いことを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connection portion is made of an elastic material, and at least one of the conductive connection portions is 2 or more when viewed from a direction parallel to the active surface of the semiconductor chip, and 1 or more when viewed from a vertical direction. A bent portion or a curved portion, and the insulating sealant is an elastic material,
When the conductive connection portion is viewed from a direction perpendicular to the active surface of the semiconductor chip, the conductive connection portion located away from the center portion of the semiconductor chip is located close to the center portion of the semiconductor chip. A semiconductor device characterized in that it is longer than the conductive connection portion.
前記導電性接続部は弾性材料からなり、前記導電性接続部の少なくとも1つが前記半導体チップの能動面に対して平行な方向から見た場合に2以上、垂直方向からから見た場合に1以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料であり、
前記導電性接続部を半導体チップの能動面に対して垂直な方向から見た場合、前記導電性接続部が、半導体チップの全電極パッドを均一な質点とした場合の重心と各電極パッドとを結ぶ直線方向に概ね弾性変形するように配置されていることを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connection portion is made of an elastic material, and at least one of the conductive connection portions is 2 or more when viewed from a direction parallel to the active surface of the semiconductor chip, and 1 or more when viewed from a vertical direction. A bent portion or a curved portion, and the insulating sealant is an elastic material,
When the conductive connection portion is viewed from a direction perpendicular to the active surface of the semiconductor chip, the conductive connection portion has the center of gravity when each electrode pad of the semiconductor chip is a uniform mass point and each electrode pad. A semiconductor device, wherein the semiconductor device is disposed so as to be elastically deformed in a straight line direction.
前記導電性接続部は弾性材料からなり、前記導電性接続部の少なくとも1つが前記半導体チップの能動面に対して平行な方向から見た場合に2以上、垂直方向からから見た場合に1以上の屈曲部、あるいは湾曲部を含み、かつ前記絶縁性封止剤は弾性材料であり、
前記導電性接続部を半導体チップの能動面に対して平行な方向から見た場合、前記半導体チップの外周部に配置された電極パッドに接続された導電性接続部と、内側に配置された電極パッドに接続された導電性接続部とがそれぞれ反対方向に伸ばされ、前記回路基板側の電極パッドに接続されていることを特徴とする半導体装置。In a semiconductor device in which an electrode pad of a semiconductor chip and a circuit board facing the semiconductor chip are connected by a conductive connection portion, and an insulating sealing agent is filled between the semiconductor chip and the circuit board.
The conductive connection portion is made of an elastic material, and at least one of the conductive connection portions is 2 or more when viewed from a direction parallel to the active surface of the semiconductor chip, and 1 or more when viewed from a vertical direction. A bent portion or a curved portion, and the insulating sealant is an elastic material,
When the conductive connection portion is viewed from a direction parallel to the active surface of the semiconductor chip, the conductive connection portion connected to the electrode pad disposed on the outer peripheral portion of the semiconductor chip and the electrode disposed on the inner side A semiconductor device characterized in that conductive connection portions connected to pads are extended in opposite directions and connected to electrode pads on the circuit board side.
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