JP2001250876A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify the process, reduce the cost and meet the demand for multiple pin structures in a semiconductor device with a semiconductor element mounted in a package such as BGA. SOLUTION: The semiconductor device 10 comprises a wiring substrate 11 having a resin layer 12 with a wiring pattern 13 formed on one surface for connecting outer connection terminals 19, and a semiconductor element 14 having projecting electrode terminals 16. The semiconductor element 14 is bonded to the other surface of the resin layer 12 through an adhesive layer 17 and the projecting electrode terminals 16 connected to the wiring pattern 13 after piercing the adhesive layer 17 and the resin layer 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a BGA (ball grid array) type package structure or chip package.
The present invention relates to a technique useful for simplifying a process and reducing costs in a semiconductor device having a size / package (CSP) structure.

[0002]

2. Description of the Related Art Conventionally, various types of semiconductor devices in which a semiconductor chip such as an LSI element is mounted on a BGA type package have been proposed. As an example, there is a semiconductor device having the form shown in FIG. In the semiconductor device illustrated in FIG. 1, reference numeral 1 denotes a wiring board provided as a package. As the wiring board 1, one surface of a resin layer 2 made of, for example, a polyimide resin or a polyester resin (in the illustrated example, Copper (Cu) wiring pattern 3 on the upper side)
Is used. Reference numeral 4 denotes a semiconductor element (chip), and its electrode terminal 5 is, for example, gold (A).
u) is electrically connected to the wiring pattern 3 on the substrate via the bonding wire 6, while the back surface of the semiconductor chip 4 (the surface opposite to the side on which the electrode terminals 5 are formed) is
It is adhered to the resin layer 2 by the adhesive 7. That is, mounting of the semiconductor chip 4 on the wiring board 1 is performed by electrical connection between the electrode terminal 5 and the wiring pattern 3 by wire bonding and bonding of the chip body and the resin layer 2 by the adhesive 7. I have.

Reference numeral 8 denotes a sealing resin made of an epoxy resin or the like for protecting the device from the outside. As shown in the figure, the semiconductor chip 4, the electrode terminals 5, and the bonding wires 6 are provided.
And is formed on the wiring board 1 so as to cover the wiring pattern 3. On the other hand, on the surface of the wiring board 1 opposite to the side on which the semiconductor chip 4 is mounted, external connection terminals (solder bumps or the like) 9 used when mounting the board on a motherboard or the like are provided. The external connection terminals 9 are electrically connected to the wiring pattern 3 and eventually to the semiconductor chip 4 through through holes TH penetrating the wiring board 1 as shown in the figure.

A semiconductor device having such a package structure is manufactured, for example, as follows. First, a tape prepared by applying a thermoplastic adhesive (not shown) to one surface of a polyimide resin film (resin layer 2) is prepared.
Through holes TH are formed in required portions of the tape by punching or the like. Next, after a copper (Cu) foil is hot-press bonded to the surface of the resin layer 2 on which the adhesive is applied, a required wiring pattern 3 is formed by photolithography so as to cover the through hole TH ( Completion of the wiring board 1).

Next, an adhesive 7 is applied to necessary portions of the wiring board 1, the semiconductor chip 4 is fixedly supported by the adhesive 7, and the electrode terminals 5 of the semiconductor chip 4 are placed on the resin layer 2 by bonding wires 6. (The mounting of the semiconductor chip 4). Furthermore, the semiconductor chip 4 is sealed with a sealing resin 8 to protect the terminal formation surface, the wiring pattern 3 and the like. As a method of this sealing,
Typically, a transfer mold is used.

Finally, on the surface (lower side in the illustrated example) of the wiring board 1 opposite to the side covered with the sealing resin 8,
Solder balls are arranged in the opened through holes TH, and solder bumps (external connection terminals 9) are formed by reflow so as to be connected to the wiring pattern 3.

[0007]

As described above, in the conventional semiconductor device (FIG. 1), in order to establish electrical continuity between the electrode terminals 5 of the semiconductor chip 4 and the external connection terminals 9,
It was necessary to make a hole in the wiring board (resin layer 2) (form a through hole TH). However, such a drilling operation is extremely troublesome and disadvantageously requires a considerable amount of time. That is, there is a problem that the manufacturing process is complicated. Further, the punching process or the like has a disadvantage that the manufacturing cost is increased.

Further, transfer molding is used as a typical method for sealing with the sealing resin 8, but it is necessary to pay close attention to this process. This is because the position of the bonding wire 6 may be shifted due to the flowing force of the resin or the pressing force thereof, or in some cases, the adjacent bonding wires 6 may come into contact with each other to cause an electrical short circuit. That is, there is a problem that the resin sealing operation is extremely troublesome and requires a considerable amount of time. Further, since a mold (mold) is required to mold the sealing resin 8 into a predetermined shape, there is a disadvantage that the manufacturing cost increases.

Further, since the electrical connection between the wiring pattern 3 connected to the external connection terminal 9 and the semiconductor chip 4 is performed by wire bonding connection, a portion where the external connection terminal 9 is provided without any inconvenience is provided in the bonding region ( This is disadvantageous in that it is limited to the vicinity (the peripheral area of the substrate 1 on which the semiconductor chip 4 is mounted). For this reason, there has been a problem that it is not possible to sufficiently meet the recent demand for a higher pin count in accordance with high-density mounting.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems in the prior art, and aims to simplify the process and reduce the cost, and to sufficiently respond to the demand for more pins. It is intended to provide a manufacturing method.

[0011]

According to an embodiment of the present invention, there is provided a wiring board provided with a wiring pattern on one surface of a resin layer.
Forming an insulating film on a surface of the wiring substrate on which the wiring pattern is formed, and forming an opening in the insulating film in a portion corresponding to a terminal forming portion of the wiring pattern; Forming a protruding electrode terminal on the electrode pad of the semiconductor substrate, and forming an adhesive layer on the surface of the wiring substrate opposite to the side on which the wiring pattern is formed, The surface of the wiring substrate on which the adhesive layer is formed and the surface of the semiconductor substrate on which the protruding electrode terminals are formed face each other, and the protruding electrode terminals and the wiring pattern are opposed to each other. And heating and pressing to connect the protruding electrode terminals to the wiring pattern through the adhesive layer and the resin layer, and Exposed through the opening of The method of manufacturing a semiconductor device which comprises a step of bonding the external connection terminal to the terminal formation portion of the serial wiring patterns are provided.

According to another aspect of the present invention, there is provided a semiconductor device manufactured by the above-described method for manufacturing a semiconductor device. According to the semiconductor device and the method of manufacturing the same according to the present invention, the electrical continuity between the electrode terminal of the semiconductor element and the external connection terminal is based on the fact that the protruding electrode terminal penetrates the adhesive layer and the resin layer to form a wiring pattern. Is ensured by being in contact with That is, it is not necessary to form a hole (form a through-hole) in a wiring board for establishing electrical continuity between an electrode terminal of a semiconductor chip and an external connection terminal as in the related art. As a result, the manufacturing process can be simplified, and the manufacturing cost can be reduced.

Further, since the electrode terminals and the wiring patterns of the semiconductor element are not exposed to the outside, there is no need for a protective sealing resin as in the prior art, and a mold for molding the same. Is also unnecessary. That is, no sealing process is required. This contributes to simplification of the process and reduction of cost. Further, the electrical connection between the electrode terminal of the semiconductor element and the wiring pattern (external connection terminal) is made by flip-chip connection instead of wire bonding connection as in the prior art. The entire surface of the substrate can be effectively used as a terminal formation region without incurring the disadvantage that the installation location of the substrate is limited to the vicinity of the bonding region on the substrate. That is, the number of external connection terminals to be installed can be relatively increased, and the number of pins can be increased in accordance with high-density mounting.

[0014]

FIG. 2 schematically shows a cross-sectional structure of a semiconductor device according to one embodiment of the present invention. Specifically, FIG. 2 specifically shows a chip size package (CSP).
1 shows an example of a semiconductor device having a structure. The semiconductor device 10 according to the present embodiment basically includes a wiring board 11 provided as a package, and a semiconductor element (chip) 14 mounted on one surface of the wiring board 11 via an adhesive layer 17.
An insulating film 18 formed on the other surface of the wiring board 11 as a protective film; and a solder bump 1 as an external connection terminal provided so as to protrude from an opening of the insulating film 18.
9 is provided.

The wiring board 11 has a structure in which a wiring pattern 13 is formed on one surface (lower side in the illustrated example) of a resin layer 12 as a base material. In the resin layer 12,
For example, a resin film made of a polyimide resin, a polyester resin, or the like, a film in which a glass cloth (glass fiber) is impregnated with a polyimide resin, a polyester resin, or the like is used. It is desirable that the thickness of the resin layer 12 be as thin as possible, as understood from a process described later. However, it is necessary to ensure a sufficient thickness to serve as a base material of the wiring board 11. In consideration of this, in the present embodiment, the resin layer 12 has a thickness of 50 μm to 75 μm.
A μm thin one is used. On the other hand, wiring pattern 1
Copper (Cu) is typically used as the material of No. 3, but in order to further increase the conductivity, gold (A) is plated or the like.
It is preferred to apply a coating such as u).

The electrode pads 15 provided on the terminal forming surface (the lower side in the illustrated example) of the semiconductor chip 14 include:
A protruding conductive bump 16 constituting an electrode terminal is formed. The projecting conductive bumps (electrode terminals) 16
Has its tip penetrating through the adhesive layer 17 and the resin layer 12 and is in contact with the wiring pattern 13. That is, the semiconductor chip 14 is bonded to the resin layer 12 of the wiring board 11 via the adhesive layer 17, and the protruding conductive bumps (electrode terminals) 16 penetrate the adhesive layer 17 and the resin layer 12. And is mounted on the wiring board 11 so as to be electrically connected to the wiring pattern 13 (flip chip mounting).

As a material of the conductive bumps 16, a conductive paste containing conductive particles in a resin at about 60 to 95% by weight is used. As the resin, for example, a polyester-based, polyimide-based, acrylic-based, epoxy-based resin, or the like is used. As the conductive particles, for example, gold (A
u), metal particles such as silver (Ag), copper (Cu), nickel (Ni), and solder are used. Also, conductive bump 1
As the mode of 6, a bump (stud bump) formed by a wire bonder or a bump (plated bump) formed by plating may be used in addition to the one formed by the conductive paste. Also, the adhesive layer 17
, A general epoxy-based adhesive is used, and the form is a paste or a film.

The insulating film 18 is formed on the surface of the wiring board 11 on which the wiring pattern 13 is formed, so that a portion corresponding to the terminal forming portion of the wiring pattern 13 is opened. In the present embodiment, a photosensitive resin, for example, a photosensitive solder resist is used as a material of the insulating film 18. Solder bump 19 serving as an external connection terminal
Is electrically connected to a terminal forming portion of the wiring pattern 13 exposed from the opening of the insulating film 18. The solder bumps 19 are used for mounting the device 10 on a mounting board such as a motherboard.

Hereinafter, a method of manufacturing the semiconductor device 10 of the present embodiment will be described with reference to FIGS. In the first step (Fig. 3
(See (a)), wiring board 11 provided as a package
Is prepared. This can be made as follows.
For example, the resin layer 12 has a thickness of 50 μm to 75 μm.
A tape having a polyimide thermoplastic adhesive applied to one surface of the polyimide resin film is prepared, and copper (C) is applied to the surface of the tape (resin layer 12) to which the adhesive is applied.
u) After the foil is hot-press bonded, a required wiring pattern 13 is formed by photolithography. Specifically, a photosensitive resist is applied on a copper foil, the resist is patterned so as to conform to the shape of the wiring pattern, unnecessary Cu is removed by etching, and the resist is peeled off. ) Gold (Au) plating is applied to the foil. At this time, by using the copper (Cu) foil as the plating base film (power supply layer), the Au coating layer can be formed on the copper (Cu) foil by electrolytic plating. Through such processing, a wiring board 11 in which a required wiring pattern 13 is formed on one surface of the resin layer 12 is manufactured.

In the next step (see FIG. 3B), the surface of the wiring board 11 on which the wiring pattern 13 is formed is
An insulating film (protective film) 18 having an opening at a portion corresponding to the terminal forming portion of the wiring pattern 13 is formed by photolithography. For example, the wiring pattern 1 of the wiring board 11
A photosensitive solder resist is applied to the entire surface on the side where 3 is formed, and further, exposure and development (patterning of the solder resist layer) are performed according to the shape of the terminal formation portion of the wiring pattern 13 to correspond to the terminal formation portion. An opening is formed in the portion of the solder resist layer to be formed. As a result, the terminal formation portion of the wiring pattern 13 is exposed on the surface of the wiring substrate 11 on which the wiring pattern 13 is formed, and the other portions are covered with the solder resist layer (insulating film) 18. Become.

In the next step (see FIG. 3C), a semiconductor substrate (wafer) 20 in which a plurality of semiconductor elements (chips 14) to be finally divided into individual CSPs are prepared in advance. Then, a protruding conductive bump (electrode terminal) 16 forming a feature of the present invention is formed on each electrode pad 15 on the wafer 20. The protruding conductive bumps 16 are made of, for example, conductive particles such as Au, Ag, and solder in a resin such as polyester or polyimide.
It is formed by transferring the conductive paste containing about 95% by weight onto each electrode pad 15 by screen printing. As a mask used in this screen printing, for example, it is preferable to use a polyimide film having a thickness of 25 μm to 50 μm in which a through hole having a diameter of 30 μm to 60 μm is opened by a laser or the like.

In the next step (see FIG. 3D), the wiring board 11 on which the solder resist layer (insulating film) 18 is formed
Is held by a suction jig (not shown) with the solder resist layer 18 formed side down.
On the first resin layer 12, a paste-like epoxy-based adhesive (which is cured at a later stage to become the adhesive layer 17) is applied. Further, a wafer 20 (semiconductor chip 14) is disposed on the adhesive with the side on which the protruding conductive bumps (electrode terminals) 16 are formed facing downward, and the conductive bumps (electrode terminals) 16 The wafer 20 (semiconductor chip 14) is aligned so that the wiring patterns 13 correspond to the wiring patterns 13.

In this step, the paste-like adhesive is applied on the substrate 11, but a film-like adhesive may be attached on the substrate 11 instead of this mode. It is necessary to use a film-like adhesive in a B-stage state (semi-cured state) such as a prepreg. In the next step (see FIG. 4A), the wiring substrate 11 and the wafer 20 (the semiconductor chip 1
4) is heated at a temperature of about 200 ° C. using a heating / pressing jig (not shown), and pressurized as indicated by an arrow in the figure. As a result, the adhesive is cured (the adhesive layer 17), and the tips of the protruding conductive bumps (electrode terminals) 16 of the wafer 20 (the semiconductor chip 14) are brought into contact with the adhesive layer 1.
The wafer 20 (semiconductor chip 14) and the resin layer 12 of the wiring board 11 are simultaneously joined via the adhesive layer 17 through the resin layer 12 and the wiring pattern 13. Thereby, each semiconductor chip 14 is connected to the wiring board 11.
(Flip-chip mounting).

In the next step (see FIG. 4B), the wiring substrate 11 to which the wafer 20 (semiconductor chip 14) is bonded is
Is held by a suction jig (not shown) with the side on which the solder resist layer (insulating film) 18 is formed facing up,
Solder bumps (external connection terminals) 19 are formed on the terminal formation portions of the wiring pattern 13 exposed from the openings of the solder resist layer 18.

This is realized by arranging solder balls in the openings of the solder resist layer 18 and performing reflow. As a result, the solder ball fills the opening and is electrically conducted to the terminal forming portion of the wiring pattern 13, so that a solder bump 19 projecting in a ball shape is formed above the solder resist layer 18. In this embodiment, the solder bumps 19 are used as the external connection terminals, but gold (Au) bumps may be used instead.

Although not specifically shown, before placing the solder ball in the opening of the solder resist layer 18, the inner wall of the opening is plated with copper (Cu) to improve the wettability of the solder. It is preferable to form a conductor film by the method described above. In the last step (see FIG. 4C), a dicing line or the like is used to divide the line C-
The semiconductor device is divided into individual CSPs along C ′ to obtain the semiconductor device 10 of the present embodiment (FIG. 2).

As described above, according to the semiconductor device 10 and the method of manufacturing the same according to the present embodiment, the electrode terminals (protruding conductive bumps) 16 of the semiconductor chip 14 and the external connection terminals (solder bumps) 19 Is electrically connected, the protruding conductive bumps 16 are bonded to the adhesive layer 17 and the resin layer 1.
2 is secured by being in contact with the wiring pattern 13 through the wiring pattern 2. That is, unlike the related art (FIG. 1), it is not necessary to perform a boring process (formation of a through hole) on a wiring board for establishing electrical continuity between an electrode terminal of a semiconductor chip and an external connection terminal. Thus, the manufacturing process can be simplified and the manufacturing cost can be reduced.

Further, as can be seen from the configuration of FIG. 2, the electrode terminals 16 and the wiring patterns 13 of the semiconductor chip 14 are not exposed to the outside, so that the sealing as used in the prior art (FIG. 1) is performed. No resin is required, and no mold is required. That is, no sealing process is required. This contributes to simplification of the process and reduction of cost.

Further, the electrode terminals 16 of the semiconductor chip 14
And the wiring pattern 13 (external connection terminal 19) are electrically connected by flip-chip mounting, so that the location of the external connection terminal is limited to the vicinity of the bonding area on the substrate as in the related art. Without
The entire substrate surface can be effectively used as a terminal formation region. Thereby, the external connection terminal (solder bump 1)
The number of installations in 9) can be relatively increased, and it is possible to contribute to increase in the number of pins.

In the above-described embodiment, FIGS.
Although the case where each process shown in FIG. 4B is performed on a wafer scale and then divided into individual CSPs to obtain the semiconductor device 10 has been described, the method of manufacturing the semiconductor device 10 is not limited to this. Of course not.
For example, instead of starting from a wafer scale, a process of manufacturing the wiring board 11 corresponding to each chip size from the beginning (a process similar to FIG. 3A) and finally a process of forming the solder bumps 19 ( 4 (b). In this case, FIG.
Is unnecessary.

[0031]

As described above, according to the present invention, the manufacturing process can be simplified and the manufacturing cost can be reduced, and the demand for increasing the number of pins can be sufficiently satisfied.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view schematically illustrating a configuration of a semiconductor device according to an example of the related art.

FIG. 2 is a cross-sectional view schematically showing a configuration of a semiconductor device according to one embodiment of the present invention.

FIG. 3 is a sectional view illustrating a manufacturing process of the semiconductor device of FIG. 2;

FIG. 4 is a cross-sectional view showing a manufacturing process following the manufacturing process of FIG. 3;

DESCRIPTION OF SYMBOLS 10 ... Semiconductor device 11 ... Wiring board 12 ... Resin layer 13 ... Wiring pattern (including terminal forming part) 14 ... Semiconductor element (chip) 15 ... Electrode pad 16 ... Protruding electrode terminal (conductive) 17) Adhesive layer 18 ... Insulating film (solder resist layer) 19 ... External connection terminal (solder bump or Au bump) 20 ... Semiconductor substrate (wafer)

Claims (6)

[Claims] A step of forming a wiring board provided with a wiring pattern on one surface of a resin layer; forming an insulating film on a surface of the wiring board on which the wiring pattern is formed; Forming an opening in an insulating film at a portion corresponding to a formation portion; forming a protruding electrode terminal on an electrode pad of a semiconductor substrate in which a semiconductor element is formed; and forming the wiring on the wiring substrate A step of forming an adhesive layer on the surface opposite to the side on which the pattern is formed, and the surface of the wiring substrate on which the adhesive layer is formed and the protruding electrode terminals of the semiconductor substrate With the surface on the side on which it is formed facing, the protrusion-shaped electrode terminals and the wiring pattern are aligned so as to correspond to each other, heated and pressed, and the protrusion-shaped electrode terminals are Adhesive layer and the resin layer And a step of connecting an external connection terminal to a terminal forming portion of the wiring pattern exposed from an opening of the insulating film. . 2. In the step of forming the wiring board,
2. The method according to claim 1, wherein the resin layer is formed of a polyimide or polyester resin film and has a thickness in a range of 50 μm to 75 μm. 3. The semiconductor according to claim 1, wherein in the step of forming an opening in the insulating film, a photosensitive resin is used as a material of the insulating film, and the opening is formed by photolithography. Device manufacturing method. 4. In the step of forming the protruding electrode terminals, the protruding electrode terminals are formed by screen printing a conductive paste containing 60 to 95% by weight of conductive particles in a resin. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is formed by transferring to a pad. 5. The method according to claim 1, further comprising, after the step of bonding the external connection terminals, a step of dividing the semiconductor substrate into respective semiconductor devices so as to include at least one semiconductor element. A method for manufacturing a semiconductor device. 6. A semiconductor device manufactured by the method of manufacturing a semiconductor device according to claim 1.