JP2005175019A - Semiconductor device and multilayer semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and a multilayer semiconductor device which establish an electric connection between semiconductor devices easily and at a low cost when stacking the semiconductor devices, and realize high-density packaging of the semiconductor devices. <P>SOLUTION: The semiconductor device 10 has connection terminals 5a for electrically connecting electrode pads 2 and the outside, on a principal plane 10a whereon the electrode pads 2 are formed. On the opposite face 10b, there is a metal ball 7a formed to electrically connect the electrode pads 2 and the outside. The metal ball 7a is formed at the tip of a wire 7. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device and a stacked semiconductor device, and more particularly to a semiconductor device suitable for stacking semiconductor devices and a stacked semiconductor device formed by stacking the semiconductor devices.

  In recent years, with the miniaturization of electronic equipment, it is required to mount semiconductor devices at high density. In order to realize high-density mounting of a semiconductor device, a semiconductor device having a structure suitable for high-density mounting is used. As such a semiconductor device, for example, Patent Document 1 discloses a semiconductor device formed to have the same size as a semiconductor chip. FIG. 12 shows a semiconductor device described in Patent Document 1.

  The semiconductor device 100 described in Patent Document 1 has an electrode pad 102 on the surface of the semiconductor chip 101 as shown in FIG. The electrode pad 102 and an external connection terminal are electrically connected through the wiring 105.

  When manufacturing the semiconductor device 100, first, the passivation film 103 and the insulating film 104 are formed on the semiconductor chip 101 so that the electrode pad 102 is exposed. Subsequently, a wiring 105 having a predetermined pattern is formed on the exposed electrode pad 102 and part of the insulating film 104 so as to be electrically connected to the electrode pad 102. When the wiring 105 is formed, a metal film as a wiring material is formed on the electrode pad 102 and the insulating film 104 to form a metal film, and a resist pattern corresponding to the wiring pattern is formed by photolithography. Then, after etching the metal film formed by sputtering using the resist pattern as a mask, the resist pattern is removed. Thereby, the wiring 105 is formed with a predetermined pattern.

  After the wiring 105 is thus formed, a protective film 106 is formed on the wiring 105 and the insulating film 104 by photolithography so that a predetermined position on the wiring 105 is exposed. At the same time, the protective film 107 is formed so as to cover the side wall of the semiconductor chip 101. Then, bumps 121 that are terminals for external connection are arranged on the exposed wirings 105 to electrically connect the wirings 105 and the bumps 121.

  Patent Document 1 describes forming a semiconductor device using a plurality of the semiconductor chips 101 described above. In the semiconductor device, for example, a plurality of semiconductor chips are planarly arranged on a mounting substrate. In such a semiconductor device including a plurality of semiconductor chips, connection between the semiconductor chips can be performed in a manner similar to the formation of the wiring 105.

  That is, a plurality of semiconductor chips are arranged adjacent to each other on a mounting substrate, and a passivation film and an insulating film are formed. Subsequently, as described above, the electrode pads provided in each semiconductor chip are connected by the wiring formed by forming the metal film by sputtering, photolithography, and etching the metal film.

Thus, a semiconductor device having the same size as the total size of the plurality of semiconductor chips arranged in a plane is manufactured by arranging a plurality of semiconductor chips adjacent to each other on the substrate and connecting the semiconductor chips. be able to. Therefore, if the method of the above-mentioned patent document 1 is used, when semiconductor chips are arranged in a plane, a semiconductor device that realizes high-density mounting can be manufactured.
JP-A-8-330313 (published on December 13, 1996) Japanese Patent Laid-Open No. 10-223833 (published on August 21, 1998)

  However, in order to realize further high-density mounting of semiconductor devices, it is desired not only to realize planar high-density mounting of semiconductor devices but also to mount the semiconductor devices at high density. Therefore, when stacking small semiconductor devices equivalent to semiconductor chips, for example, the following may be performed. That is, a through hole penetrating a semiconductor chip constituting the semiconductor device is provided, and the semiconductor chips are electrically connected through a conductor provided in the through hole. The conductor provided in the through hole is formed by forming a conductive material by plating or the like after forming an insulating film inside the through hole (see, for example, Patent Document 2).

  However, the technique for connecting the stacked semiconductor chips by the above-described technique easily causes problems such as defects in the insulating film and the conductor, and is accompanied by technical difficulties. Further, in the case of stacking using this technique, it takes a very long time to form the through hole, the insulating layer, and the conductor, and the capital investment is enormous. Therefore, the manufacturing cost is greatly increased, and it becomes difficult to provide a stacked semiconductor device at a low cost.

  The present invention has been made in order to solve the above-described conventional problems, and an object of the present invention is to easily and inexpensively perform electrical connection between semiconductor devices when stacking semiconductor devices. An object of the present invention is to provide a semiconductor device capable of realizing high-density mounting of the device and a stacked semiconductor device formed by stacking the semiconductor devices.

  In order to solve the above-described problems, a semiconductor device of the present invention is a semiconductor device including a semiconductor chip having electrode pads. And a second connection terminal for electrically connecting the electrode pad and the outside to a second surface which is a surface other than the first surface. The second connection terminal is connected to the electrode pad via a metal wire.

  In the semiconductor device according to the present invention, the metal wire is preferably covered with an insulator.

  Further, in the semiconductor device of the present invention, in the above semiconductor device, the insulator preferably has stretchability.

  In the semiconductor device of the present invention, in the semiconductor device, the first connection terminal is electrically connected to the electrode pad and is formed on a surface on the first surface side of the semiconductor chip. It may be a part of the first wiring.

  In the semiconductor device according to the present invention, in the semiconductor device described above, the metal wire is disposed at a position between the connection position to the electrode pad and the connection position to the second connection terminal. A connecting portion for electrically connecting the outside and the outside may be provided.

  According to another aspect of the semiconductor device of the present invention, in the above semiconductor device, the second wiring formed on the second surface side of the semiconductor chip is electrically connected to the second connection terminal. And a part of the second wiring may serve as a second wiring connection terminal for electrically connecting the second wiring and the outside.

  In the semiconductor device of the present invention, in the above semiconductor device, the second wiring is provided on a surface on the second surface side of the semiconductor chip via an insulating layer having elasticity. preferable.

  In the semiconductor device of the present invention, it is preferable that the semiconductor device includes an insulating protective layer that covers the second wiring, and the protective layer has elasticity.

  According to another aspect of the semiconductor device of the present invention, in the semiconductor device described above, at least one of the group consisting of the first connection terminal, the second connection terminal, the second wiring connection terminal, and the connection portion has a protruding electrode. May be provided.

  In addition, the stacked semiconductor device of the present invention is characterized in that at least two semiconductor devices selected from the semiconductor devices described above are stacked.

  As described above, the semiconductor device of the present invention has the first connection terminal on the first surface, and is connected to the electrode pad via the metal wire on the second surface other than the first surface. A second connection terminal. Therefore, connection to the outside is possible on the first surface side and the second surface side of the semiconductor device. Therefore, by disposing another semiconductor device, a mounting substrate, or the like (hereinafter referred to as a mounting member) on the first surface side or the second surface side, the semiconductor device and the mounting member of the present invention can be easily electrically connected. Can be connected. Therefore, if the semiconductor device of the present invention is used, the semiconductor device can be easily highly integrated.

  Further, in the semiconductor device, since the second connection terminal is connected to the electrode pad via the metal wire, the second connection terminal can be arranged at an arbitrary position on the second surface. In other words, since the semiconductor device has a high degree of freedom in the arrangement position of the second connection terminal on the second surface, the degree of freedom in mounting the semiconductor device on the mounting member can be improved.

  In the semiconductor device of the present invention, since the metal wire is covered with an insulator in the semiconductor device described above, operability in manufacturing and mounting of the semiconductor device can be improved. Furthermore, since the insulator can prevent a short circuit, a leak failure, a disconnection, or the like of the metal wire, there is an effect that the reliability of the semiconductor device can be improved.

  In the semiconductor device of the present invention, the insulator has elasticity in the semiconductor device. Therefore, even when expansion / contraction such as thermal expansion of each component of the semiconductor device occurs due to a temperature change at the time of manufacturing the semiconductor device, an external environment at the time of using the semiconductor device or a temperature change due to heat generation of the semiconductor chip, etc. The insulator can expand and contract according to the expansion and contraction of the constituent members. Thereby, even when the above temperature change occurs and the constituent members expand and contract, the insulator covering the metal wire is not damaged or broken such as a crack. Accordingly, it is possible to provide a highly reliable semiconductor device by preventing a short circuit, leakage failure, disconnection, and the like of the metal wire.

  In the semiconductor device according to the present invention, the first connection terminal is electrically connected to the electrode pad and is formed on the first surface side surface of the semiconductor chip. Part of the wiring. That is, in the semiconductor device of the present invention, the first wiring to which the electrode pad is connected is provided on the semiconductor chip on the side where the electrode pad is formed, and a desired region of the first wiring is connected to the first connection. It is a terminal. Therefore, since the first connection terminal can be provided at an arbitrary position on the first surface, the degree of freedom in mounting or stacking the semiconductor device on the mounting member can be improved. In addition, the semiconductor device can be easily highly integrated.

  In the semiconductor device of the present invention, in the above semiconductor device, the metal wire and the outside are disposed at a position between the connection position of the metal wire to the electrode pad and the connection position to the second connection terminal. Since the connection part for electrically connecting is provided, it can connect with a mounting member in this connection part. As a result, the semiconductor device can be more easily mounted and stacked on the mounting member, and the semiconductor device can be more easily integrated.

  In addition, the semiconductor device of the present invention includes a second wiring formed on the second surface side of the semiconductor chip and electrically connected to the second connection terminal in the semiconductor device. A part of the second wiring serves as a second wiring connection terminal for electrically connecting the second wiring and the outside. Thus, since the semiconductor device of the present invention has the second wiring on the second surface side, it is possible to more easily mount and stack the semiconductor device on the mounting member.

  Furthermore, in the semiconductor device having the above configuration, the second wiring connection terminal can be provided at a desired position on the second surface. Accordingly, it is possible to improve the degree of freedom when mounting the semiconductor device on the mounting member, and it is possible to easily mount and stack the semiconductor device on the mounting member.

  In the semiconductor device of the present invention, since the second wiring is provided on the second surface side of the semiconductor chip via a stretchable insulating layer in the semiconductor device described above, the semiconductor device Insulation between the chip and the second wiring can be ensured.

  Furthermore, since the insulating layer has stretchability, when the semiconductor device experiences the temperature change described above during the manufacture and use of the semiconductor device, each component of the semiconductor device expands and contracts. Since the insulating layer can be expanded and contracted according to the expansion and contraction of the constituent members, the insulating layer is not distorted or cracked. Therefore, since the insulation between the semiconductor chip and the second wiring can be ensured even when the temperature changes, there is an effect that a highly reliable semiconductor device can be provided.

  In addition, since the semiconductor device of the present invention has an insulating protective layer that covers the second wiring in the semiconductor device, the operability in manufacturing and mounting of the semiconductor device can be improved. .

  Further, since the protective layer has stretchability, when the semiconductor device experiences the temperature change described above during the manufacture and use of the semiconductor device, each component member of the semiconductor device also stretches. Since the protective layer can be expanded and contracted according to the expansion and contraction of the constituent members, the protective layer is not distorted or cracked. Accordingly, even when the temperature changes, the region connected to the outside of the second wiring and the second connection terminal can be protected from physical damage and chemical damage, and occurrence of disconnection or the like can be prevented. As a result, the reliability of the semiconductor device can be improved.

  According to another aspect of the semiconductor device of the present invention, in the semiconductor device described above, at least one of the group consisting of the first connection terminal, the second connection terminal, the second wiring connection terminal, and the connection portion has a protruding electrode. Is provided. Therefore, since the semiconductor device and the mounting member can be electrically connected by the protruding electrode, there is an effect that the semiconductor device can be easily mounted and stacked on the mounting member.

  In addition, since the stacked semiconductor device of the present invention includes at least two semiconductor devices selected from the semiconductor devices described above, the semiconductor device can be easily highly integrated. As a result, it is possible to provide a stacked semiconductor device that realizes high-density mounting of the semiconductor device and is compatible with downsizing and high performance of electronic devices.

[Embodiment 1]
An embodiment of the present invention will be described below with reference to FIGS.

  FIG. 1A shows a plan view of the semiconductor device 10 of the present embodiment, and FIG. 1B shows a cross-sectional view taken along the line A-A ′ of FIG. The semiconductor device 10 of the present embodiment has a mounting surface that can be a surface facing a substrate or another semiconductor device when mounting on the substrate or stacking on another semiconductor device. .

  As shown in FIGS. 1A and 1B, the semiconductor device 10 has an electrode pad 2 and circuit elements such as a chip resistor and a chip capacitor (not shown) on the surface of the semiconductor chip 1. The electrode pad 2 is electrically connected to a wiring 5 for external connection, or is electrically connected to the circuit element via an element wiring (not shown).

  In the following, as shown in FIG. 1B, the mounting surface of the semiconductor device 10 on the side where the electrode pads 2 of the semiconductor chip 1 are formed out of the mounting surface (surface) of the semiconductor device 10. Is described as a main surface (first surface) 10a, and a mounting surface other than the main surface 10a of the semiconductor device 10 is described as a facing surface (second surface) 10b.

  A first insulating layer 3 is formed on the surface (surface) of the semiconductor chip 1 so that at least a part of the surface of the electrode pad 2 is exposed. A second insulating layer 4 is formed so as to cover the first insulating layer 3 and expose the surface of the electrode pad 2. That is, the first insulating layer 3 and the second insulating layer 4 are formed on the semiconductor chip 1 in order so that at least a part of the surface of the electrode pad 2 is exposed on the surface of the semiconductor chip 1.

  Further, the wiring (first wiring) 5 for external connection is formed on the exposed surface of the electrode pad 2 and the second insulating layer 4. By forming the wiring 5 on the surface of the electrode pad 2, the electrode pad 2 and the wiring 5 are electrically connected. An insulating protective film (insulator) 6 is formed on the second insulating layer 4 and the wiring 5 so that at least a part of the surface of the wiring 5 is exposed. The exposed region of the surface of the wiring 5 becomes a connection terminal (first connection terminal) 5a for external connection. Thus, since a part of the wiring 5 is the connection terminal 5a, the connection terminal 5a can be provided at a desired position by exposing a desired region on the wiring 5. Therefore, when the semiconductor device 10 is mounted or stacked, the connection terminal 5a can be provided according to the connection position with the outside.

  The protective film 6 is formed on the wiring 5 and the second insulating layer 4 and also extends from the side surface of the semiconductor chip 1 to the vicinity of the end of the surface on the side where the electrode pads 2 of the semiconductor chip 1 are formed ( Hereinafter, it is described so as to cover the edge portion 1a). That is, the protective film 6 covers the side surface of the semiconductor chip 1, covers the second insulating layer 4 and the wiring 5 provided in the vicinity of the end portion of the semiconductor chip 1, and is provided at a portion other than the end portion of the semiconductor chip 1. The second insulating layer 4 and the wiring 5 are covered with a predetermined pattern.

  The semiconductor device 10 includes a metal wire (metal wire) 7 for electrical connection to the outside of another semiconductor device or a mounting substrate. One end of the wire 7 is disposed on the wiring 5 and is electrically connected to the wiring 5. Thereby, the electrode pad 2 on the semiconductor chip 1 and the wire 7 are electrically connected via the wiring 5. On the other hand, the other end of the wire 7 becomes a terminal (second connection terminal) connected to another semiconductor device or the like. On the wire 7, the terminal is formed to be a ball-shaped metal ball (second connection terminal) 7 a and is disposed at an arbitrary position on the facing surface 10 b of the semiconductor device 10. Thus, by forming the terminal of the wire 7 with the metal ball 7a, the contact area between the wire 7 and another semiconductor device can be increased, so that an electrical connection can be favorably obtained. The wire 7 is arbitrarily bent and disposed in any direction between the connection position with the electrode pad 2 and the position of the metal ball 7a, so that the metal ball 7a is arranged according to the connection position with the outside. May be bent. Thus, since the arrangement position of the metal ball 7a can be arbitrarily set on the facing surface 10b side, the degree of freedom in mounting and stacking the semiconductor device 10 can be increased.

  Further, as shown in FIG. 1B, the wire 7 is disposed on the edge portion 1 a of the semiconductor chip 1 and is entirely covered with the protective film (insulator) 6. Therefore, disconnection, short circuit, leak failure, and the like of the wire 7 can be prevented. In addition, operability can be improved when the semiconductor device 10 is manufactured or when other semiconductor devices or the like of the semiconductor device 10 are mounted or stacked.

  In the semiconductor device 10 having the above configuration, the electrode pad 2 is formed of, for example, a metal whose main component is aluminum (Al), and serves as an electrode of the semiconductor chip 1.

The first insulating layer 3 is provided to ensure insulation between the electrode pads 2 and the like, and the second insulating layer 4 is a cross between the wiring 5 and the element wiring (not shown). It is provided to suppress talk. In the present embodiment, the first insulating layer 3 is made of, for example, an inorganic insulating material such as silicon oxide (SiO ₂ ), and the second insulating layer 4 is made of, for example, a polyimide organic insulating material. Is formed.

  In addition, the material which forms the 1st insulating layer 3 and the 2nd insulating layer 4 is not specifically limited, such as an inorganic insulating material and an organic insulating material. Further, the first insulating layer 3 and the second insulating layer may be formed of the same material, or may be formed of different materials. Furthermore, in this embodiment, as shown in FIG. 1B, the two first insulating layers 3 and 4 are provided, but only the first insulating layer 3 is provided. Alternatively, a structure including three or more insulating layers may be employed.

  The wiring 5 is formed in a three-layer structure of a copper (Cu) layer, a nickel (Ni) layer, and a gold (Au) layer in order from the electrode pad 2 side. The Cu layer is excellent in electrical conductivity and is a layer suitable for transmission of electrical signals. The Ni layer serves as a barrier layer for suppressing diffusion between the Cu layer and the Au layer, and also contributes to bonding by a bonding material such as solder made of a metal containing tin (Sn) as a main component. Become. The Au layer is provided so as to prevent the formation of an oxide film on the surface of the Ni layer and to allow bonding with the wire 7. Further, by providing the Au layer, it is possible to ensure the wettability of the solder when applying the solder as the bonding material on the Au layer.

  The wire 7 is made of Au, and the metal ball 7a is formed by wire bonding. The wire 7 may be formed of Al in addition to the Au. When the wire 7 is formed of Al, it is difficult to form the other end of the wire 7 as a ball-shaped terminal, but the tip of the other end of the wire 7 can be used as a terminal.

  Further, the protective film 6 covering the wire 7 is preferably made of an insulating material having stretchability having a tensile elongation of 10% or more. The tensile elongation rate is a value representing a ratio of elongation until a test piece is broken by performing a tensile test on the test piece. In the present embodiment, the tensile fracture elongation value is obtained by a test method defined in JIS K7127 “Plastic Film and Sheet Tensile Test Method”, and the tensile fracture elongation value is measured between the marked lines of the upper test piece. The tensile elongation is calculated by determining the ratio to the distance.

  The material for forming the protective film 6 is appropriately selected in consideration of the size of the semiconductor device 10, the difference in linear expansion coefficient between the constituent members constituting the semiconductor device 10, the use environment of the semiconductor device 10, the material cost, and the like. For example, an insulating resin material may be used. When a resin is used as the protective film 6, the material may be selected so that the physical properties after curing exhibit a tensile elongation of 10% or more. In the present embodiment, the protective film 6 is formed using a photosensitive polyimide resin.

  As described above, by using the protective film 6 having elasticity, the protective film 6 expands and contracts even when the proportion of expansion of each component of the semiconductor device 10 due to temperature change differs. Can be prevented from being broken or damaged.

  That is, the semiconductor device 10 is exposed to an environment in which a temperature change during the manufacturing process, a temperature change in the external environment during use, a temperature change due to heat generation of the semiconductor chip 1 during use, or the like occurs. The protective film 6 formed on the edge portion 1 a has a region covering the second insulating layer 4 and the wiring 5 provided on the semiconductor chip 1 and a region provided adjacent to the side surface of the semiconductor chip 1. Therefore, these structural members may expand at different rates due to the above temperature change. Such a difference in the degree of thermal expansion also affects the protective film 6 provided on the constituent member. That is, the protective film 6 is distorted and causes damage or breakage of the protective film 6 such as cracks. If the protective film 6 is damaged or broken, the wire 7 and the semiconductor chip 1 cannot be protected, and problems such as disconnection, short circuit and leakage failure of the wiring 5 and the wire 7 occur, and the reliability of the semiconductor device 10 is improved. Causes a drop.

  Therefore, in this embodiment, the protective film 6 is formed of a material having stretchability so that the protective film 6 is not distorted even if the thermal expansion ratios of the constituent members are different. Thereby, even when the semiconductor device 10 is exposed to various temperature conditions and the expansion / contraction ratios of the constituent members are different, the protective film 6 expands / contracts to cause breakage such as cracks in the protective film 6. This can be prevented.

  Next, a manufacturing process of the semiconductor device 10 having the above-described configuration will be described with reference to FIGS. 2A to 2C and FIGS. 3A to 3C showing cross-sectional views of the manufacturing process of the semiconductor device 10. .

In the present embodiment, as shown in FIG. 2A, the electrode pad 2 made of a metal mainly composed of Al, the circuit element (not shown), and the first insulating layer 3 formed so as to expose the electrode pad 2 are exposed. And the semiconductor device 10 is manufactured using the wafer 11 provided with the second insulating layer 4. Here, the first insulating layer 3 includes a layer formed of SiO ₂ , and the second insulating layer 4 includes a layer formed of polyimide resin.

  The wafer 11 is divided into semiconductor chips 1 (FIG. 2C) in a subsequent process. Therefore, the electrode pad 2, the circuit element, the first insulating layer 3, and the second insulating layer 4 are partitioned on the wafer 11 for each semiconductor chip 1 by the scribe line 12. 2, a circuit element, a first insulating layer 3, and a second insulating layer 4 are formed.

  Using the wafer 11, first, a wiring forming process is performed in which the wiring 5 is formed in a desired pattern on the entire surface of the wafer 11 on which the electrode pad 2 is formed, as shown in FIG. Do. The wiring 5 is formed by stacking Cu, Ni, and Au layers from the electrode pad 2 side. The wiring 5 may be patterned by lift-off, electrolytic plating, electroless plating, etching, printing, or a combination of these methods.

  Since the electrode pad 2 is made of a metal containing Al as a main component, it is preferable to form the wiring 5 after forming a barrier layer (not shown) on the electrode pad 2 in the wiring forming step of the present embodiment. . The barrier layer may be formed into a thin film by sputtering using titanium (Ti), titanium-tungsten (Ti-W), chromium (Cr), or the like. After the barrier layer is formed on the surface of the wafer 11 where the electrode pads 2 are formed, a Cu thin film (not shown) is formed on the barrier layer by sputtering. Subsequently, a photoresist (not shown) is applied onto the entire Cu thin film by spin coating, and after the photoresist is dried, the Cu thin film in the region where the wiring 5 is formed is exposed by photolithography. Perform patterning.

  On the Cu thin film exposed by the photoresist patterning, Cu, Ni, and Au are sequentially formed by electrolytic plating to form the wiring 5. After the electrolytic plating for forming the wiring 5 is completed, the photoresist is removed with a stripping solution, and the Cu thin film and the barrier layer other than the region where the wiring 5 is formed are removed with an etching solution using the wiring 5 as a mask. . As a result, as shown in FIG. 2B, the wiring 5 is formed on the wafer 11 in a desired pattern.

  Subsequent to the wiring formation step, the wafer 11 is diced along the scribe line 12 using a dicing apparatus or the like, and divided into semiconductor chips 1. Thereafter, as shown in FIG. 2C, the divided semiconductor chips 1 are arranged and fixed in a matrix on the plate-like member 13 having a size slightly larger than the size of the wafer 11 with a predetermined interval. . Each semiconductor chip 1 is preferably arranged at equal intervals. Here, the interval between the semiconductor chips 1 is set for each semiconductor device 10 provided with the semiconductor chip 1 in a state where the wire 7 formed in the subsequent process is covered with a polyimide-based resin for forming the protective film 6. It becomes a margin part to divide into. Therefore, the interval between the semiconductor chips 1 may be set so that this cut-off portion is secured.

  The plate-like member 13 may be a plate-like member made of various materials such as a plate material made of Al, a bare wafer made of silicon (Si) obtained by sputtering Al or Au, and the like. In the present embodiment, the plate member 13 is formed by sputtering Au on the surface of a Si wafer that is easily polished.

  Further, as a fixing material (not shown) for fixing the semiconductor chip 1 to the plate-like member 13, for example, a die attach material such as a sheet shape or a paste shape may be used. The die attach material is for fixing the semiconductor chip 1 to the plate-like member 13 in the manufacturing process of the semiconductor device 10. Therefore, in order to prevent an electrical short, it is preferable not to contain particles such as silver (Ag) powder.

  As described above, after fixing the semiconductor chip 1 on the plate-like member 13, as shown in FIG. 2C, a wire forming step for forming the wire 7 connected to the wiring 5 is performed. The wire 7 is a fine metal wire made of Au, and is formed so as to connect the wiring 5 and the plate-like member 13 by using an ultrasonic wave and heat together with a wire bonding apparatus. Here, the end of the wire 7 on the side not connected to the wiring 5, that is, the end of the wire 7 formed on the plate-like member 13 is formed as a metal ball 7a. As a result, it is possible to suitably perform electrical bonding between the semiconductor device 10 and another semiconductor device or the like.

  Next, a protective film forming step for forming the protective film 6 shown in FIG. 1B is performed so as to cover a part of the wiring 5 and the entire wire 7. When the protective film 6 is formed, first, a photosensitive polyimide resin having a tensile elongation of 10% or more in physical properties after curing covers the entire wire 7, and the semiconductor chip 1 of the plate-like member 13. It is applied by a drawing method so as to fill the interval between them. After the applied polyimide resin is dried, the polyimide is further applied by spin coating on the polyimide resin applied and dried by the drawing method, and on the wiring 5 and the second insulating layer 4 on the semiconductor chip 1. Apply the base resin and dry. Then, after patterning the polyimide resin so that a desired region of the wiring 5 is exposed by photolithography, the polyimide resin is cured by heat treatment. Thus, as shown in FIG. 3A, a part of the wiring 5 is exposed to form the connection terminal 5a, and the protective film is formed so that the entire wire 7 is covered with the polyimide resin. 6 is formed.

  Subsequently, the plate member 13 is removed, and a plate member removing step for obtaining the semiconductor device 10 is performed. In the plate member removing step, as shown in FIG. 3B, first, the plate member 13 is used from the side of the protective film 6 formed at the interval provided between the semiconductor chips 1 by using a dicing apparatus or the like. Make a cut in the middle. Next, by removing the plate-like member 13, as shown in FIG. 3C, the semiconductor device 10 in which the metal balls 7a that are the terminals of the wires 7 are provided on the opposing surface 10b can be obtained.

When removing the plate-like member 13, for example, a backside polishing apparatus that polishes the backside of the semiconductor wafer and reduces the thickness of the semiconductor wafer may be used. That is, the plate-like member 13 may be polished to the extent that the metal ball 7a of the wire 7 is exposed using a back surface polishing apparatus. Note that etching with a chemical solution or plasma treatment with a mixed gas of argon (Ar) gas, carbon tetrafluoride (CF ₄ ) gas, CF _4, and oxygen (O ₂ ) may be performed after the polishing. As described above, by performing the chemical treatment or the plasma treatment, the microcracks remaining on the surface of the semiconductor chip 1 fixed to the plate-like member 13 can be removed. Thereby, the bending strength of the semiconductor device 10 can be improved, and the metal ball 7a of the wire 7 can be reliably exposed on the surface of the facing surface 10b.

  As described above, in the manufacturing process of the semiconductor device 10 according to the present embodiment, the process up to the wiring formation process is performed in units of the wafer 11, and then the wafer 11 is divided for each semiconductor chip 1. It is arranged on the plate member 13. Thereafter, as described above, subsequent steps such as a wire forming step, a protective film forming step, and a plate member removing step are simultaneously performed on the plurality of semiconductor chips 1 on the plate member 13. As a result, a plurality of semiconductor devices 10 can be efficiently manufactured. Therefore, if the semiconductor device 10 is manufactured by the manufacturing process described above, the productivity of the semiconductor device 10 can be improved.

  In order to reduce the thickness of the obtained semiconductor device 10, the wafer 11 may be polished by polishing the wafer 11 after the wiring formation step (FIG. 2B). After the wafer 11 is thinned, dicing is performed so that the semiconductor chip 1 is divided into each semiconductor chip 1, and the divided semiconductor chip 1 is fixed on the plate-like member 13, and a wire forming step, a protective film forming step, and a plate-like member removal What is necessary is just to perform subsequent processes, such as a process. Thereby, even when the semiconductor device 10 and another semiconductor device are stacked, the thickness in the stacking direction can be reduced.

  Further, in the present embodiment, of the mounting surface of the semiconductor device 10, the connection terminal 5 a is provided on the main surface 10 a and the metal ball 7 a is provided on the facing surface 10 b, but the side surface of the semiconductor chip 1 of the semiconductor device 10. The metal ball 7a may be provided on the side surface (second surface) so as to be exposed, and may be used as a connection terminal. In this case, electrical connection between the semiconductor devices can be performed by arranging the semiconductor device 10 adjacent to another semiconductor device or the like.

  Furthermore, in the present embodiment, as shown in FIGS. 1A and 1B, the semiconductor device 10 having the connection terminal 5a with the wiring 5 exposed is described. However, on the connection terminal 5a, an external connection is provided. A protruding electrode may be formed as the terminal. 4A and 4B show a semiconductor device 20 provided with a protruding electrode. That is, in the semiconductor device 20, as shown in FIGS. 4A and 4B, a protruding electrode 21 made of a metal containing Sn as a main component is formed on the connection terminal 5a. In this manner, by forming the protruding electrode 21, it is possible to electrically connect the protruding electrode 21 to a terminal provided on the substrate or the like by performing heat treatment when mounting on the substrate or the like. Therefore, the semiconductor device 20 can be easily mounted without supplying a bonding material such as solder.

  The protruding electrode 21 may be formed after the protective film forming step of covering a part of the wiring 5 and the entire wire 7 with the protective film 6. 5A to 5C are cross-sectional views showing a protruding electrode forming process for forming the protruding electrode 21. FIG. That is, after forming the protective film 6 shown in FIG. 3A, a flux is applied on the connection terminal 5a in which a part of the wiring 5 is exposed. Subsequently, a solder ball, which is a spherical solder made of a metal containing Sn as a main component, is mounted on the flux by using a ball mounting method, and the connection terminal 5a and the solder ball are joined by heat treatment. Thereby, as shown in FIG. 5A, the protruding electrode 21 is formed on the connection terminal 5a.

  The protruding electrode 21 may be formed by the above-described ball mounting method, but may be performed by various methods such as a printing method, a wire bump method, and a plating method. Moreover, although the said protruding electrode 21 is formed using solder, it can also be formed using materials other than solder.

  After forming the protruding electrode 21 as described above, the plate member removing step is performed as described above. That is, using a dicing apparatus or the like, a cut is made from the side of the protective film 6 formed at the interval provided between the semiconductor chips 1 to the middle of the plate member 13 (FIG. 5B). Subsequently, by using the method described above, the semiconductor device 20 divided for each semiconductor chip 1 can be obtained by removing the plate-like member 13 as shown in FIG.

  Further, in the present embodiment, the configuration in which the protruding electrode 21 is provided on the connection terminal 5a has been described. However, a conductive paste material in which conductive particles are contained in a thermosetting liquid resin on the metal ball 7a, The protruding electrode may be formed using a wire bump or the like.

[Embodiment 2]
The following will describe another embodiment of the present invention with reference to FIG. For convenience of explanation, members having the same functions as those shown in the drawings of the first embodiment are given the same reference numerals, and descriptions thereof are omitted.

  FIG. 6A shows a plan view of the semiconductor device 30 of the present embodiment, and FIG. 6B shows a cross-sectional view taken along the line C-C ′ of FIG. As shown in FIGS. 6A and 6B, the semiconductor device 30 of the present embodiment includes an electrode pad 2 on the surface of the semiconductor chip 1, and the first insulating layer so that the surface of the electrode pad 2 is exposed. 3 and the second insulating layer 4 are formed. One end of a metal wire (metal wire) 37 for electrical connection to another semiconductor device or the like is provided on the exposed electrode pad 2 surface. The wire 37 is disposed on the edge portion 1a of the semiconductor chip 1, and the other end of the wire 37 is disposed on the facing surface 10b as a terminal for connecting to the outside of another semiconductor device or the like. The other end of the wire 37 is a metal ball (second connection terminal) 37a formed in a ball shape. The wire 37 may be formed using the same material and method as the wire 7 described in the first embodiment.

  As described above, in the semiconductor chip 1 on which the electrode pad 2, the first insulating layer 3, the second insulating layer 4, and the wire 37 are formed, the electrode pad 2 and the wire 37 are formed as shown in FIG. 6B. The entire surface on the covered side is covered with a protective film (insulator) 36. The protective film 36 may be formed of a stretchable material having a tensile elongation of 10% or more, like the protective film 6 described in the first embodiment.

  In the semiconductor device 30 configured as described above, an electrical connection with the outside is further provided between one end of the wire 37 on the electrode pad 2 and the metal ball 37a which is the other end disposed on the facing surface 10b. The connection part 37b used for is formed. The connecting portion 37b is provided in a region other than the both ends of the wire 37 of the end on the electrode pad 2 side and the metal ball 37a, and is formed so as to be exposed from the protective film 36 provided on the edge portion 1a. . In other words, as shown in FIG. 6B, if the opening 36a is provided in the protective film 36, a part of the wire 37 is exposed from the opening 36a, and the exposed region of the wire 37 is used as the connecting portion 37b. Good.

  In addition, a metal film such as Au may be formed in the opening 36a by plating, sputtering, vapor deposition accompanied by an etching process, or the like. As a result, when the connection portion 37a is electrically connected to the outside by mounting or the like, the entire inside of the opening 36a including the connection portion 37a can be connected. Therefore, by forming a metal film in the opening 36a to increase the connection area, it is possible to improve connection reliability during mounting or the like.

  In this manner, by providing the connection portion 37b, the connection portion 37b and the metal ball 37a can be connected to the outside of another semiconductor device or the like. Therefore, the semiconductor device 30 can be easily mounted and stacked on another semiconductor device, a mounting substrate, and the like, and higher integration of the semiconductor device can be realized more easily.

  Next, a manufacturing process of the semiconductor device 30 having the above configuration will be described. In manufacturing the semiconductor device 30, as described in the first embodiment, the electrode pad 2, the circuit element (not shown), the first insulating layer 3 and the second insulating layer formed so as to expose the electrode pad 2 are used. A wafer 11 having a layer 4 (FIG. 2A) is used. Unlike the semiconductor device 10 (FIG. 1 (b)) described in the first embodiment, the semiconductor device 30 does not include the wiring 5, and therefore the wiring forming step (FIG. 2 (b)) is not performed.

  Therefore, first, the wafer 11 is diced along the scribe line 12 using a dicing apparatus or the like, and divided into semiconductor chips. Thereafter, the divided semiconductor chips are arranged and fixed in a matrix on a plate-like member having a size slightly larger than the size of the wafer 11 at a predetermined interval. The placement of the semiconductor chip and the fixation of the semiconductor chip may be performed according to the method described in the first embodiment.

  Thereafter, a wire 37 connected to the electrode pad 2 is formed, and a protective film 36 is further formed. The formation of the wire 37 may be performed by a method similar to the step of forming the wire 7 described in the first embodiment (FIG. 2C). Further, the formation of the protective film 36 may be performed by the same method as the step of forming the protective film 6 described in the first embodiment (FIG. 3A). In the present embodiment, Since the wiring 5 is not provided, the protective film 36 may be formed so as to cover the entire second insulating layer 4 on the semiconductor chip 1 and the entire wire 37 as shown in FIG. 6B.

Subsequently, an opening 36a is provided in the protective film 36, and a connection portion 37b is formed. The opening 36a may be formed using, for example, photolithography. Alternatively, wet etching, dry etching using CF ₄ gas or the like in a plasma state, laser processing, or the like may be performed.

  After forming the opening 36a and the connecting portion 37a as described above, the semiconductor device 30 is formed by performing a plate-like member removing step as in the first embodiment.

  In the present embodiment, by providing the opening 36a, the connection portion 37a is formed by exposing a part of the wire 37. However, the entire surface of the protective film 36 covering the wire 37 is uniformly dried. By etching, the wire 37 may be exposed to form a connection portion. Also in this case, the connection area may be increased by forming a metal film in a desired region so as to be electrically connected to the connection portion.

[Embodiment 3]
The following will describe still another embodiment of the present invention with reference to FIGS. For convenience of explanation, members having the same functions as those shown in the drawings of Embodiments 1 and 2 are given the same reference numerals, and descriptions thereof are omitted.

  FIG. 7A shows a plan view of the semiconductor device 40 of the present embodiment, and FIG. 7B shows a cross-sectional view taken along the line D-D ′ in FIG. As shown in FIGS. 7A and 7B, the semiconductor device 40 according to the present embodiment has an opposing surface in addition to the configuration of the semiconductor device 20 (FIG. 4B) described in the first embodiment. The counter surface side wiring 45 is provided on the 10b side.

  That is, in the semiconductor device 40, at least a part of the surface of the metal ball 7a exposed from the surface of the protective film 6 is exposed on the surface of the semiconductor chip 1 and the surface of the protective film 6 on the facing surface 10b side. A third insulating layer 43 is formed. The third insulating layer 43 is provided in order to ensure insulation between the semiconductor chip 1 and an opposing surface side wiring 45 described later. The third insulating layer 43 may be formed of an inorganic insulating material, an organic insulating material, or the like, like the first insulating layer 3 and the second insulating layer 4 described in the first embodiment. As the insulating layer 43, two or more layers may be formed.

  The third insulating layer 43 is provided on the surface of the semiconductor chip 1 and the surface of the protective film 6. Therefore, the semiconductor chip 1 that is a constituent member of the semiconductor device 40 is protected from the temperature change during the manufacturing process of the semiconductor device 40, the temperature change of the external environment when the semiconductor device 40 is used, or the temperature change caused by the heat generation of the semiconductor chip 1 There is a possibility that the degree of expansion and contraction differs between the film 6 and the film 6. Such a difference in the ratio of expansion and contraction affects the third insulating layer, causes distortion and cracking in the third insulating layer, and causes damage and breakage of the third insulating layer. If the third insulating layer is damaged or broken, it is difficult to ensure the insulation between the semiconductor chip 1 and the opposing surface side wiring 45, which is not preferable.

  Therefore, in order to prevent damage and breakage of the third insulating layer, it is preferable to form the third insulating layer 43 using a stretchable material. Specifically, it is preferable to use an insulating material having a tensile elongation of 10% or more. For example, if the same material as that used to form the protective film 6 in the first embodiment is used, Good. The material of the third insulating layer may be selected as appropriate in consideration of the size of the semiconductor device 40, the use environment of the semiconductor device 40, the material cost, etc., like the material of the protective film 6.

  Therefore, the third insulating layer 43 can be expanded and contracted even when expansion or contraction due to thermal expansion or the like of each component of the semiconductor device 40 occurs due to the above temperature change. Generation of distortion can be prevented. Thereby, the insulation between the semiconductor chip 1 and the opposing surface side wiring 45 to be described later can be secured, so that the reliability of the semiconductor device 40 can be improved.

  Further, on the exposed surface of the metal ball 7 a and the third insulating layer 43, an opposing surface side wiring (second wiring) 45 for external connection is formed. By forming the opposing surface side wiring 45 on the surface of the metal ball 7a, the wire 7 and the opposing surface side wiring 45 are electrically connected. The facing surface side wiring 45 is, for example, a copper (Cu) layer, a nickel (Ni) layer, and a gold (Au) layer in this order from the semiconductor chip 1 side, similarly to the wiring 5 described in the first embodiment. A three-layer structure may be used.

  Further, on the third insulating layer 43 and the opposing surface side wiring 45, an opposing surface side protective film (protective layer) 46 is formed so that a part of the surface of the opposing surface side wiring 45 is exposed. The exposed area of the surface of the facing surface side wiring 45 becomes a facing surface side connection terminal (second wiring connection terminal) 45a for external connection. Thus, since a part of the opposing surface side wiring 45 becomes the opposing surface side connection terminal 45a, by exposing a desired region on the opposing surface side wiring 45, the opposing surface side connection terminal 45a is located at a desired position. Can be provided. Therefore, when mounting or stacking the semiconductor device 40, the opposing surface side connection terminal 45a can be provided according to the connection position with the outside, so that the degree of freedom when the semiconductor device 40 is integrated can be improved.

  Further, the facing surface side protective film 46 may be formed of a stretchable material like the protective film 6 described in the first embodiment, and has a tensile elongation of 10% or more, for example. What is necessary is just to form with a resin material etc.

  In this way, by providing the opposing surface side wiring 45 and exposing the part of the opposing surface side wiring 45 to form the opposing surface side connection terminal 45a, another semiconductor can be formed at the opposing surface side connection terminal 45a. It can be connected to the outside such as a device. Therefore, the semiconductor device 30 can be easily mounted or stacked on another semiconductor device, a mounting substrate, or the like. Thereby, higher integration of the semiconductor device can be realized more easily.

  Next, the manufacturing process of the semiconductor device 40 having the above configuration will be described based on the cross-sectional views shown in FIGS. 8 (a) to 8 (c) and FIGS. 9 (a) and 9 (b). In manufacturing the semiconductor device 40, the wiring formation process (FIG. 2B) to the wire formation process (FIG. 2C), the protective film formation in the manufacturing process of the semiconductor device 10 described in the first embodiment. Each process up to the process (FIG. 3A) is performed. Thereafter, as described in the first embodiment, the plate-like member 13 is removed using a back surface polishing apparatus or the like, and the surface of the metal ball 7 a of the wire 7 is exposed from the surface of the protective film 6. In the present embodiment, when removing the plate-like member 13, an operation for cutting the protective film 6 is not performed.

  After removing the plate-like member 13, the third insulating layer 43 and the opposing surface side wiring 45 are formed on the semiconductor chip 1 and the protective film 6 on the opposing surface 10 b side, and further on the connection terminal 5 a of the wiring 5. The protruding electrode 21 is formed on the substrate. FIGS. 8A to 8C are cross-sectional views showing a process for forming the third insulating layer 43 and the opposing surface side wiring 45, and FIGS. 9A and 9B are cross-sectional views showing a process for forming the protruding electrode 21. FIG. Indicates.

  That is, after removing the plate-like member 13, as shown in FIG. 8A, the semiconductor chip 1 is turned upside down, and the surface of the metal ball 7 a is placed on the semiconductor chip 1 and the protective film 6 on the facing surface 10 b side. The third insulating layer 43 is formed so that at least a part is exposed. In the present embodiment, in order to form the third insulating layer 43, a non-photosensitive polyimide resin having a tensile elongation rate after curing of 10% is used.

  Specifically, the non-photosensitive polyimide resin is applied on the semiconductor chip 1 and the protective film 6 by spin coating and dried, and further, a photoresist is applied by spin coating and dried. Thereafter, the photoresist is patterned by photolithography so as to expose the region of the non-photosensitive polyimide resin corresponding to the region where the surface of the metal ball 7a is disposed. Subsequently, using the patterned photoresist as a mask, the non-photosensitive polyimide resin is patterned to expose the surface of the metal ball 7a. Next, the non-photosensitive polyimide resin is cured by removing the photoresist using a stripping solution and performing a heat treatment. Thereby, as shown in FIG. 8A, the third insulating layer 43 is formed so that the surface of the metal ball 7a is exposed.

  Next, an operation similar to the operation described in the wiring forming process of the first embodiment is performed, and the protective film 6, the surface of the metal ball 7 a exposed from the protective film 6, and the third insulating layer 43 are formed. As shown in FIG. 8B, the opposing surface side wiring 45 is formed. That is, first, a barrier layer (not shown) is formed on the protective film 6, the metal ball 7a surface, and the third insulating layer 43 by sputtering using Ti-W or the like. Thereafter, a Cu thin film (not shown) is formed on the barrier layer by sputtering.

  Subsequently, a photoresist (not shown) is applied over the entire Cu thin film by spin coating, and after the photoresist is dried, the Cu thin film is exposed in a region where the facing surface side wiring 45 is formed by photolithography. Thus, patterning is performed. Thereafter, on the Cu thin film exposed by the photoresist patterning, Cu, Ni, and Au are sequentially formed by electrolytic plating to form the facing surface side wiring 45. After the electrolytic plating for forming the opposing surface side wiring 45 is completed, the photoresist is removed with a stripping solution, and the opposing surface side wiring 45 is used as a mask and the region other than the region where the opposing surface side wiring 45 is formed. The Cu thin film and the barrier layer are removed with an etching solution. As a result, as shown in FIG. 8B, the opposing surface side wiring 45 is formed in a desired pattern on the protective film 6, the surface of the metal ball 7 a, and the third insulating layer 43.

  Next, as shown in FIG. 8C, a facing surface side protective film 46 is formed so as to cover the third insulating layer 43 and a part of the facing surface side wiring 45. In the case of forming the facing surface side protective film 46, for example, a photosensitive polyimide resin having a tensile elongation of 10% or more in physical properties after curing is used to form the third insulating layer 43, the facing surface side. The photosensitive polyimide resin is applied on the surface of the metal ball 7a exposed from the wiring 45 and the protective film 6 by spin coating and dried. Thereafter, the photosensitive polyimide resin is patterned by photolithography so that a desired region of the facing surface side wiring 45 is exposed. By curing the patterned photosensitive polyimide resin by heat treatment, as shown in FIG. 8 (c), the opposing surface side wiring 45 is partially exposed as the opposing surface side connection terminals 45a. A side protective film 46 is formed.

  After forming the opposing surface side protective film 46 as described above, the semiconductor chip 1 is turned upside down, and in the same manner as the operation described with reference to FIG. The protruding electrode 21 may be formed. That is, a flux is applied to the connection terminal 5a where a part of the wiring 5 is exposed, and a solder ball made of metal containing Sn as a main component is mounted on the flux by using, for example, a ball mounting method. The connection terminal 5a and the solder ball are joined by heat treatment. As a result, as shown in FIG. 9A, the protruding electrode 21 is formed on the connection terminal 5a.

  After forming the protruding electrodes 21 as described above, dicing is performed from the side of the protective film 6 formed at the interval provided between the semiconductor chips 1 by using a dicing apparatus or the like, whereby FIG. As shown in FIG. 3, the semiconductor device 40 divided for each semiconductor chip 1 can be obtained.

  In the present embodiment, the configuration in which the protruding electrode 21 is provided on the connection terminal 5a has been described. However, the protruding electrode may be provided on the opposing surface side connection terminal 45a.

[Embodiment 4]
The following will describe still another embodiment of the present invention with reference to FIG. For convenience of explanation, members having the same functions as those shown in the drawings of Embodiments 1 to 3 are given the same reference numerals, and descriptions thereof are omitted.

  FIG. 10 shows a cross-sectional view of the stacked semiconductor device 50 of the present embodiment. As shown in FIG. 10, the stacked semiconductor device 50 is formed by stacking the semiconductor device 30 described in the second embodiment on the semiconductor device 20 (FIG. 4) described in the first embodiment. Is. In the stacked semiconductor device 50, the metal ball 7 a of the wire 7 of the semiconductor device 20 and the connection portion 37 b of the wire 37 of the semiconductor device 30 are electrically connected via the conductive paste 51.

  The conductive paste 51 is made of a resin such as an epoxy resin containing a conductive material such as metal fine particles. The conductive paste 51 is applied on the surface of the metal ball 7a exposed from the surface of the protective film 6 of the semiconductor device 20 by a dispensing method or a printing method. Thereafter, the connection portion 37b of the semiconductor device 30 is aligned and disposed on the conductive paste 51, and the conductive paste 51 is cured by performing heat treatment. Thereby, the semiconductor device 20 and the semiconductor device 30 are electrically connected via the conductive paste 51.

  In addition, if necessary, a liquid resin such as an underfill material is sealed between the semiconductor device 20 and the semiconductor device 30, and the liquid resin is cured by heat treatment or the like, whereby the semiconductor device 20 and the semiconductor device 30 The connecting part between can be protected.

  In the stacked semiconductor device 50, the connection portion 37 b provided in the semiconductor device 30 and the metal ball 7 a provided in the semiconductor device 20 are stacked so as to be electrically connected. Therefore, when the semiconductor device 20 and the semiconductor device 30 are stacked, it is preferable to provide the connection portion 37b so that the metal ball 7a and the connection portion 37b face each other. Further, if a metal film is formed in the opening 36a (FIG. 6B) in which the connection part 37b is provided to increase the connection area with the conductive paste 51, the connection reliability during mounting or the like can be improved. Can be improved.

  In the present embodiment, the stacked semiconductor device 50 formed by stacking the semiconductor device 20 and the semiconductor device 30 which are semiconductor devices having different structures has been described as an example. However, the present invention is not limited to this. That is, among the semiconductor devices described in the first to fourth embodiments, semiconductor devices having the same structure may be stacked. Further, the number of semiconductor devices to be stacked is not limited to two, and a configuration in which three or more semiconductor devices are stacked may be used. Even when three or more semiconductor devices are stacked, the same method as in this embodiment is used. What is necessary is just to laminate.

  As described above, as described in the above embodiments, by stacking the semiconductor devices having the wires 7 or 37, electrical connection between the semiconductor devices can be easily performed. Thereby, high-density mounting of the semiconductor device can be easily realized. In particular, as described in the first embodiment, if a semiconductor device obtained by polishing a wafer to reduce the thickness of the semiconductor device is used, the thickness when the semiconductor devices are stacked is reduced. Therefore, high-density mounting of the semiconductor device can be realized. As a result, it is possible to provide a highly integrated stacked semiconductor device that can respond to the demand for downsizing of electronic devices, and it is possible to realize higher performance of electronic devices.

[Embodiment 5]
The following will describe still another embodiment of the present invention with reference to FIG. For convenience of explanation, members having the same functions as those shown in the drawings of Embodiments 1 to 4 are given the same reference numerals, and descriptions thereof are omitted.

  FIG. 11 shows a cross-sectional view of the stacked semiconductor device 60 of the present embodiment. As shown in FIG. 11, the stacked semiconductor device 60 uses two semiconductor devices 40 (FIG. 7) described in the third embodiment, and the two semiconductor devices 40 (hereinafter, semiconductor device 40a, semiconductor). (Described as device 40b).

  The stacked semiconductor device 60 electrically connects the protruding electrode 21 provided in one semiconductor device 40b and the connection terminal 45a, which is an exposed region of the opposing surface side wiring 45 provided in the other semiconductor device 40a. By connecting, the semiconductor device 40a and the semiconductor device 40b are joined. When connecting the protruding electrode 21 and the connection terminal 45a, flux or paste solder is applied to the surface of the protruding electrode 21 or the connection terminal 45a. Thereafter, the protruding electrodes 21 of the semiconductor device 40b and the connection terminals 45a of the semiconductor device 40a are aligned, the semiconductor devices 40a and 40b are stacked, and heat treatment is performed using a reflow furnace or the like. Thereby, the protruding electrode 21 and the connection terminal 45a are electrically connected.

  Further, if necessary, a liquid resin such as an underfill material is sealed between the semiconductor device 40a and the semiconductor device 40b, and the liquid resin is cured by heat treatment or the like, whereby the semiconductor device 40a and the semiconductor device 40b. The connecting part between can be protected.

  In the present embodiment, the stacked semiconductor device 60 formed by stacking the two semiconductor devices 40 has been described as an example. However, the present invention is not limited to this. That is, the semiconductor devices described in the first to fourth embodiments may be stacked with semiconductor devices having different structures. Further, the number of semiconductor devices to be stacked is not limited to two, and a configuration in which three or more semiconductor devices are stacked may be used. When three or more semiconductor devices are stacked, the same method as in this embodiment is used. What is necessary is just to laminate.

  As described above, by stacking the semiconductor devices having the metal balls 7a that can be electrically connected to the outside on the facing surface side, the electrical connection between the semiconductor devices can be easily performed, and the semiconductor device High-density mounting can be realized. Further, when a semiconductor device in which a wafer is polished is used in manufacturing the semiconductor device, the thickness when the semiconductor devices are stacked can be reduced. This makes it possible to provide a stacked semiconductor device that can meet the demand for downsizing electronic devices.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  By using the semiconductor device of the present invention, it is possible to easily stack the semiconductor devices and realize stacking of the semiconductor devices at a high density. Therefore, it can be used as a semiconductor device that can meet demands for downsizing and high performance of electronic devices.

(A) is a top view which shows one Embodiment of the semiconductor device in this invention, (b) is A-A 'arrow sectional drawing of (a). (A)-(c) is sectional drawing explaining the manufacturing process of the said semiconductor device. (A)-(c) is sectional drawing explaining the continuation of the manufacturing process of the said semiconductor device. (A) is a top view which shows other embodiment of the semiconductor device in this invention, (b) is B-B 'arrow sectional drawing of (a). (A)-(c) is sectional drawing explaining the process of forming the protruding electrode of the said semiconductor device. (A) is a top view which shows other embodiment of the semiconductor device in this invention, (b) is C-C 'arrow sectional drawing of (a). (A) is a top view which shows other embodiment of the semiconductor device in this invention, (b) is D-D 'arrow sectional drawing of (a). (A)-(c) is sectional drawing explaining the process of forming the 3rd insulating layer and opposing surface side wiring of the said semiconductor device. (A) and (b) are sectional views showing the continuation of the manufacturing process of the semiconductor device and explaining the process of forming the protruding electrode. It is sectional drawing which shows one Embodiment of the laminated semiconductor device in this invention. It is sectional drawing which shows other embodiment of the laminated semiconductor device in this invention. It is sectional drawing which shows the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor chip 1a Edge part 2 Electrode pad 3 1st insulating layer 4 2nd insulating layer 5 Wiring (1st wiring)
5a Connection terminal (first connection terminal)
6 Protective film (insulator)
7 Wire (metal wire)
7a Metal ball (second connection terminal)
10 Semiconductor Device 10a Main Surface (First Surface)
10b Opposing surface (second surface)
DESCRIPTION OF SYMBOLS 11 Wafer 12 Scribe line 13 Plate-shaped member 20 Semiconductor device 21 Projection electrode 30 Semiconductor device 36 Protective film (insulator)
36a opening 37 wire (metal wire)
37a Metal ball (second connection terminal)
37b Connection part 40 Semiconductor device 43 3rd insulating layer 45 Opposite surface side wiring (2nd wiring)
45a Opposite side connection terminal (connection terminal for second wiring)
46 Opposite side protective film (protective layer)
50 Stacked semiconductor devices

Claims (10)

In a semiconductor device including a semiconductor chip having an electrode pad,
On the first surface, which is the surface on the side where the electrode pad is formed, has a first connection terminal for electrically connecting the electrode pad and the outside,
The second surface, which is a surface other than the first surface, has a second connection terminal for electrically connecting the electrode pad and the outside,
The semiconductor device, wherein the second connection terminal is connected to the electrode pad through a metal wire.   2. The semiconductor device according to claim 1, wherein the metal wire is covered with an insulator.   3. The semiconductor device according to claim 2, wherein the insulator has elasticity.   The first connection terminal is electrically connected to the electrode pad and is a part of a first wiring formed on a surface on the first surface side of the semiconductor chip. Item 4. The semiconductor device according to Item 1, 2 or 3.   The metal wire is provided with a connection portion for electrically connecting the metal wire and the outside at a position between the connection position to the electrode pad and the connection position to the second connection terminal. The semiconductor device according to claim 1, wherein the semiconductor device is provided. The second wiring is electrically connected to the second connection terminal and formed on the second surface side surface of the semiconductor chip,
6. A part of said 2nd wiring is a connection terminal for 2nd wiring for electrically connecting this 2nd wiring and the exterior, The any one of Claims 1-5 characterized by the above-mentioned. The semiconductor device according to item.   The semiconductor device according to claim 6, wherein the second wiring is provided on a surface on the second surface side of the semiconductor chip via an insulating layer having elasticity. An insulating protective layer covering the second wiring;
The semiconductor device according to claim 6, wherein the protective layer has elasticity.   9. A protruding electrode is provided on at least one of the group consisting of the first connection terminal, the second connection terminal, the second wiring connection terminal, and the connection portion. The semiconductor device according to any one of the above.   A stacked semiconductor device comprising at least two semiconductor devices selected from the semiconductor devices according to claim 1.

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