JPS6119147A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法Info
- Publication number
- JPS6119147A JPS6119147A JP59138927A JP13892784A JPS6119147A JP S6119147 A JPS6119147 A JP S6119147A JP 59138927 A JP59138927 A JP 59138927A JP 13892784 A JP13892784 A JP 13892784A JP S6119147 A JPS6119147 A JP S6119147A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- substrate
- stepped sections
- silicon layer
- oxidation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H10W20/01—
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59138927A JPS6119147A (ja) | 1984-07-06 | 1984-07-06 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59138927A JPS6119147A (ja) | 1984-07-06 | 1984-07-06 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6119147A true JPS6119147A (ja) | 1986-01-28 |
| JPH0244142B2 JPH0244142B2 (enExample) | 1990-10-02 |
Family
ID=15233388
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59138927A Granted JPS6119147A (ja) | 1984-07-06 | 1984-07-06 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6119147A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02142122A (ja) * | 1988-11-22 | 1990-05-31 | Hitachi Ltd | 半導体装置の製造方法 |
| US5521108A (en) * | 1993-09-15 | 1996-05-28 | Lsi Logic Corporation | Process for making a conductive germanium/silicon member with a roughened surface thereon suitable for use in an integrated circuit structure |
-
1984
- 1984-07-06 JP JP59138927A patent/JPS6119147A/ja active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02142122A (ja) * | 1988-11-22 | 1990-05-31 | Hitachi Ltd | 半導体装置の製造方法 |
| US5521108A (en) * | 1993-09-15 | 1996-05-28 | Lsi Logic Corporation | Process for making a conductive germanium/silicon member with a roughened surface thereon suitable for use in an integrated circuit structure |
| US5644152A (en) * | 1993-09-15 | 1997-07-01 | Lsi Logic Corporation | Conductive germanium/silicon member with a roughened surface thereon suitable for use in an integrated circuit structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0244142B2 (enExample) | 1990-10-02 |
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