JPS61191042A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To form a thick surface oxide film on a high withstanding-voltage element part and to form a thin oxide film at a low withstanding-voltage element part, by using a selective oxidation method, with a silicon nitride film as a mask. CONSTITUTION:On the exposed surface of single crystal silicon islands 1 and 2 for a high withstanding-voltage element and a low withstanding-voltage element, a silicon oxide film 3 and a silicon nitride film 3a are formed. Then the film 3a is selectively etched, and a silicon oxide film 3b at a part, which is contacted with a high-concentration embedded layer 7 in the island 1, is exposed. Then, with the film 3a as a mask, the surface of a substrate is selectively oxidized. The exposed film 3 and 3a are thickly formed. Then the film 3a is removed, impurities are diffused and an impurity diffused region 9 is formed. Thereafter a metal wiring 8 is provided.

Description

[Detailed Description of the Invention] [Industrial Application] The present invention relates to a method for manufacturing a high-voltage semiconductor integrated circuit using dielectric isolation technology, and particularly to a semiconductor integrated circuit in which high-voltage elements and low-voltage elements are mixed. Relating to a manufacturing method.

[Conventional technology]

First, an example of a conventional method for manufacturing a semiconductor integrated circuit of this type will be described with reference to FIGS. 2(a), 2(b), and 2(c).

As shown in 2nd IN (a), first, thermal oxidation R28 is formed on the surface of the dielectric isolation type semiconductor substrate 24.

Next, as shown in FIG. 2(b), the thermal oxide film 28 on the surface is selectively etched to expose a portion of the single crystal silicon islands 21 and 22. Figure 2 (cut out).

The single crystal silicon island 21 is for high voltage elements, and the single crystal silicon island 22 is for low voltage elements, but the surface thermal oxidation 11
128 is a high withstand voltage element, a low withstand voltage element (single crystal silicon island 2
1.23) In any part, the birth concentration buried layer 27
It covers the end 27a of.

Next, impurities are diffused from the exposed surfaces of the single crystal silicon islands 21 and 22 using a selective diffusion method. FIG. 2(c) shows a state in which metal interconnection #1128 is applied after impurity diffusion. Note that 25 is polycrystalline silicon, 26 is an isolation silicon oxide film, and 29 is an impurity diffusion region.

[Problem that the invention seeks to solve]

In the above conventional technique, as shown in No. 21N(b), when selectively etching the thermal oxide film 23 on the surface, the end portion 27a of the high concentration buried layer 27 and the isolated silicon oxide film 23 are etched.
The surface thermal oxide film 23 is left so as to cover the end portion 26a, and the surface thermal oxide film 23 is made sufficiently thicker in a portion where it finally comes into sliding contact with the high concentration buried layer 27 than in other portions. The reason for this is that when the surface thermal oxide film 28 between the metal wiring 28 and the high concentration buried layer 27 is thin, referring to Figure 2 (c),
When a high voltage is applied, breakdown occurs at the highly concentrated buried N27 directly under the metal interconnection 1fs28, and the withstand voltage decreases. However, in low-voltage devices, there is no need to consider such pre-kdown, and single-crystal silicon islands 2 for low-voltage devices
For No. 2, the surface oxide film 28 is not necessary. However, when the above-described technique is applied, the surface oxide film 23 is removed by etching, but as shown in FIG. A gap @80 is created between the silicon island 82 and the polycrystalline silicon 85, creating a step on the surface. This level difference causes a break in the metal wiring, so even in the single crystal silicon island 22 (32) for low-voltage devices, it is also
The surface oxide film 28 shown in b) cannot be removed.

Therefore, a region of the surface oxide film 28 is required in addition to the impurity diffusion region, and the single-crystal silicon island 22 must be made larger by that amount, which has the disadvantage of lowering the degree of integration of the semiconductor integrated circuit.

In FIG. 8, 31 is a single crystal silicon island for high breakdown voltage, and 87 is a high concentration buried layer.

[Means for solving problems]

The means of the invention for solving the above problems is that several single-crystal silicon islands in one bale are embedded in polycrystalline silicon with one side of the single-crystal silicon islands exposed through a silicon oxide film. A silicon oxide film and a silicon nitride film are sequentially formed on the main surface of the semiconductor substrate constituting the substrate and one side of the single crystal silicon island is exposed, and then, of the silicon oxide film, the polycrystalline silicon and etching the silicon nitride film so as to expose a portion of the high concentration buried layer of the single crystal silicon island and a portion that contacts the silicon oxide film sandwiched between the polycrystalline silicon and the single crystal silicon island. After selectively oxidizing the main surface of the semiconductor substrate by thermal oxidation using the silicon nitride film as a mask, the silicon nitride film is completely removed and impurities are first removed from the main surface of the semiconductor substrate by selective diffusion. This is a method of manufacturing a semiconductor integrated circuit characterized by forming circuit elements by diffusion.

〔Example〕

Next, one embodiment of the present invention will be described with reference to the drawings.

$1 Figures (a), (b), (c), and (d) are cross-sectional views of a non-embodiment of the present invention. As shown in FIG. 1(a), a single crystal silicon island 1 for a high breakdown voltage element and a silicon island 2 for a low breakdown voltage element are formed in a polycrystalline silicon 5 through an isolated silicon oxide film 6 and a high concentration buried layer 7. Parts of the buried silicon islands 1 and 2 are exposed at the surface to form a dielectric isolation type semiconductor substrate 4. First, silicon oxide H3 is formed on the exposed surface of the silicon island 1.2 of this semiconductor substrate 4, and then silicon nitride 8a is formed thereon.

In this case, silicon oxide film 8 is formed thinner than before.

Next, as shown in FIG. 1(b), the silicon nitride film 4 is selectively etched to form a single crystal silicon island 1 to form a high breakdown voltage element.
The silicon oxide film 3b in the portion that contacts the high concentration buried layer 7 of
expose. On the other hand, the single crystal silicon island 2 forming the low breakdown voltage element and its vicinity remain covered with the silicon nitride film 8a.

Next, as shown in FIG. 1(c), the substrate surface is selectively oxidized using a thermal oxidation method using the silicon nitride film 8a as a mask.

The exposed portion of the silicon oxide film 3.8b is formed to be thick.

Next, silicon nitride i3a is completely removed, impurities are selectively diffused as shown in FIG. 1(d), and single crystal silicon islands 1,
After forming an impurity diffusion region 9 in two circles, a metal wiring 8 is provided. In the high breakdown voltage element of the semiconductor integrated circuit formed with the beak as described above, the surface oxide film 4 in contact with the metal wiring 8 and the high concentration buried layer 7 can be made sufficiently thick, and a high breakdown voltage can be realized.

In addition, in areas where low-voltage elements exist, single-crystal silicon islands 2
The thickness of the oxide film 8 on the element surface, including between the single-crystal silicon island 2 and the single-crystal silicon island 2, is relatively thin, and the surface level difference can be reduced.

〔Effect of the invention〕

As explained above, according to one aspect of the present invention, a semiconductor integrated circuit having a mixture of high-voltage elements and low-voltage elements can be manufactured using a dielectric-separated semiconductor substrate.

By using a selective oxidation method using a silicon nitride film as a mask, a thick surface oxide film is formed only on the high breakdown voltage element: F part, so a thin and flat oxide film can be formed on the low breakdown voltage element part. It is possible to reduce the size of the low-voltage element, and it is possible to prevent the metal wiring from breaking.

[Brief explanation of drawings]

FIGS. 1(a), (b), (c), and (d) are cross-sectional views for explaining one embodiment of the manufacturing method of the present invention, and FIGS. 2(a), (b), and (c) and FIG. 3 is a cross-sectional view for explaining a conventional semiconductor integrated circuit manufacturing method. 1... Single-crystal silicon island for high-voltage elements 2... Single-crystal silicon island for low-voltage elements 3...Surface silicon oxide film 8a...Silicon nitride film 5...Polycrystalline silicon 6...・Isolated silicon oxide film 7...High concentration buried layer 8...Metal wiring 9...Impurity diffusion region

Claims (1)

[Claims] A plurality of single-crystal silicon islands constitute a semiconductor substrate embedded in polycrystalline silicon with one surface of the single-crystal silicon islands exposed through a silicon oxide film, and one surface of the single-crystal silicon islands is A silicon oxide film and a silicon nitride film are sequentially formed on the main surface of the semiconductor substrate where the silicon oxide film is exposed. The silicon nitride film is selectively removed by etching to expose a part of the silicon oxide film sandwiched between the crystalline silicon and the single crystal silicon island, and then thermal oxidation is performed using the silicon nitride film as a mask. A semiconductor integrated circuit characterized in that after selectively oxidizing the main surface of a semiconductor substrate, the silicon nitride film is completely removed, and then impurities are diffused from the main surface of the semiconductor substrate by a selective diffusion method to form a circuit element. manufacturing method.