JPS61188957A - Manufacture of circuit module - Google Patents

Manufacture of circuit module

Info

Publication number
JPS61188957A
JPS61188957A JP2824385A JP2824385A JPS61188957A JP S61188957 A JPS61188957 A JP S61188957A JP 2824385 A JP2824385 A JP 2824385A JP 2824385 A JP2824385 A JP 2824385A JP S61188957 A JPS61188957 A JP S61188957A
Authority
JP
Japan
Prior art keywords
support
resin
type electronic
electronic component
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2824385A
Other languages
Japanese (ja)
Inventor
Kenichi Yoshida
健一 吉田
Hiroshi Ohira
洋 大平
Masayuki Ouchi
正之 大内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2824385A priority Critical patent/JPS61188957A/en
Publication of JPS61188957A publication Critical patent/JPS61188957A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]

Abstract

PURPOSE:To obtain a circuit module of the same extremely thin degree as the thickness of a chip type electronic parts by mounting in the shape that the parts are effectively buried in a substrate made of cured resin. CONSTITUTION:A silicone resin film 2 is obtained on a glass plate 1, gelled to impart adhesive and mold releasing properties to the surface as a support 3. Electrodes 4, 5 sides are disposed at the prescribed positions on the support 3 of drawn trapezoidal or semicircular-sectional cylindrical chip type electronic parts 6-8. Spacers 9 made of Teflon are disposed, ultraviolet curable resin 10 is molded around the parts 6-8 on the support 3 in this state, a flat plate 11 made, for example, Teflon is coated thereon, and ultraviolet ray is emitted to cure the resin 10. Then, the support 3, the plate 11 and the spacers 9 are separated to obtain the parts 6-8 buried in a substrate 12. Then, silver paste is screen printed to form a desired conductor pattern 13.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、チップ型電子部品を基板に実装した回路モジ
ュールの製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a circuit module in which chip-type electronic components are mounted on a substrate.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

ICチップその他のチップ型電子部品の実装法として従
来、鋼箔張り樹脂基板を選択的にエツチングして回路パ
ターンを形成したプリント配線基板あるいはア2ルミナ
等のセラミック基板表面に厚膜印刷により回路パターン
を形成した厚膜印刷配線基板上に、半田付けまたは導電
性接着剤により該電子部品を接続する方法が多く用いら
れている。
Conventionally, as a mounting method for IC chips and other chip-type electronic components, a circuit pattern is formed by selectively etching a steel foil-covered resin substrate to form a circuit pattern on a printed wiring board or a ceramic substrate such as alumina by thick film printing. A method is often used in which electronic components are connected to a thick film printed wiring board on which electronic components are formed using soldering or conductive adhesive.

しかしながら、この方法は原理的に、得られた回路モジ
ュールの厚みが基板と部品の厚みを加算した寸法以下に
はなり得す、最近ますます薄型化されつつある電子機器
における回路モジュールの実現法としては不十分となっ
ている。また、この方法では厚膜印刷配線基板の形成工
程と、該基板上へのチップ型電子部品の実装工程とが全
く独豆した工程であるため、回路モジュール全体として
の製造工程がU、雑で時間がかかり、製造コストの低減
にも自ずと限界があるという問題があった。
However, in principle, the thickness of the obtained circuit module can be less than the sum of the thickness of the board and the components, so this method is not suitable for realizing circuit modules in electronic devices that are becoming thinner and thinner. is insufficient. In addition, in this method, the process of forming the thick-film printed wiring board and the process of mounting chip-type electronic components on the board are completely independent processes, so the manufacturing process for the entire circuit module is extremely complicated. There are problems in that it takes time and there is a limit to the reduction in manufacturing costs.

〔発明の目的〕[Purpose of the invention]

本発明の目的L1、チップ型′戒子部品の厚みと同等ま
たはそれに近い厚みまで薄壓化が可能であり、また等板
上の導体パターンの形成と電子部品の接続とを同時に行
なうことができ、製造工程が簡単で製造に要する時間の
短い回路モジュールの製造方法を提供することにある。
Objective L1 of the present invention: It is possible to reduce the thickness to a thickness equal to or close to that of a chip-type component, and it is also possible to simultaneously form a conductor pattern on a uniform board and connect electronic components. The object of the present invention is to provide a method for manufacturing a circuit module which has a simple manufacturing process and takes a short time to manufacture.

〔発明の概要〕[Summary of the invention]

本発明はこの目的を達成するため、まず電極側が絞り込
まれた形状を有するチップ型電子部品を支持体上の所定
位置に該電子部品の電極端子形成面を支持体表面に対向
させて配置し、チップ型電子部品の周囲に例えば紫外線
硬化樹脂からなる液状樹脂を注型し、該液状樹脂上に被
覆用部材を設置した後、該液状樹脂を硬化させる。この
時、支持体としては紫外線硬化樹脂を用いた場合は、紫
外線を透過させる必要からガラス板、あるいはポリエチ
レンテレフタレート樹脂、ポリカーボネート樹脂、塩化
ビニール樹脂、ポリエチレン樹脂、四フッ化エチレン・
六フッ化プロピレン樹脂、ポリスチレン樹脂またはポリ
エチレン樹脂等の透光性を有する材質のものが使用され
る。また支持体はチップ型電子部品を固定するため、粘
着性を有することが必要であり、その目的で、好ましく
は次の工程で支持体を剥離するために離型性を兼ね備え
た被膜が形成される。この被膜は例えばゲル状のシリコ
ーン樹脂、酢ビ−エチレンコーポリ・マー、加熱状態の
ポリエチレンフィルム等が好適である。
In order to achieve this object, the present invention first places a chip-type electronic component having a narrowed shape on the electrode side at a predetermined position on a support with the electrode terminal forming surface of the electronic component facing the surface of the support, A liquid resin made of, for example, an ultraviolet curable resin is cast around the chip-type electronic component, a covering member is placed on the liquid resin, and then the liquid resin is cured. At this time, if an ultraviolet curing resin is used as the support, a glass plate, polyethylene terephthalate resin, polycarbonate resin, vinyl chloride resin, polyethylene resin, tetrafluoroethylene resin, etc.
A translucent material such as hexafluoropropylene resin, polystyrene resin, or polyethylene resin is used. In addition, the support must have adhesive properties in order to fix the chip-type electronic component, and for this purpose, preferably a film with releasability is formed so that the support can be peeled off in the next step. Ru. Suitable materials for this coating include, for example, gel-like silicone resin, acetic acid-ethylene copolymer, and heated polyethylene film.

次に支持体を剥離する。このとき電子部品は電極側が絞
り込まれた形状を有するため支持体の剥離に際して電子
部品が脱落することはない。
Next, the support is peeled off. At this time, since the electronic component has a narrowed shape on the electrode side, the electronic component will not fall off when the support is peeled off.

このようにして、支持体を剥離した後、硬化した樹脂か
らなる基板の支持体に対向していた面上に導体パターン
を形成すると共に、該導体パターンと基板表面に露出し
たチップ型電子部品上の端子との接゛続を行なう。ここ
で、液状樹脂上に設置する被覆用部材としては、該部材
を支持体と共に硬化した樹脂から剥離する場合には、テ
フロンシートをはじめとするフッ素系樹脂シートやテフ
ロン処理を施して離型性を持たせた樹脂シート、あるい
は支持体と同一の材質上にシリコーン樹脂被膜を設けた
ものが使用される。逆に該部材を硬化した樹脂から剥離
しない場合には、その材質としては150℃〜180℃
程究の耐熱性を1するものであればよく、例えばガラス
エポキシ板、BTレジン f板、PES樹脂、PEEK樹脂、ポリカーボネート樹
脂、ポリサルフォン樹脂、ポリフェニレンサルファイド
樹脂、ポリフェニレンオキシド樹脂等が使用される。ま
た、必要によってはセラミック板、金属板等を用いても
よい。
In this way, after peeling off the support, a conductor pattern is formed on the surface of the substrate made of cured resin that was facing the support, and on the conductor pattern and the chip-type electronic component exposed on the surface of the substrate. Connect to the terminal. Here, when the coating member to be placed on the liquid resin is to be peeled off from the cured resin together with the support, a fluororesin sheet such as a Teflon sheet or a Teflon-treated coating may be used to improve releasability. A resin sheet with a silicone resin coating or a silicone resin coating formed on the same material as the support is used. On the other hand, if the member is not to be peeled off from the cured resin, the material should be heated at 150°C to 180°C.
Any material that has a heat resistance of 1 may be used, and for example, glass epoxy plates, BT resin f plates, PES resins, PEEK resins, polycarbonate resins, polysulfone resins, polyphenylene sulfide resins, polyphenylene oxide resins, etc. are used. Further, a ceramic plate, a metal plate, etc. may be used as necessary.

導体パターンの形成法としては、チップ型電子部品の端
子表面と基板の表面とが同一平面となるために、スクリ
ーン印刷、オフセット印刷、ディスペンサにより描画す
る方式等を使用することが可能である。また、金属薄膜
層を形成し、感光性樹脂を用いて選択エツチングする写
真法による導体パターン形成を行なうこともできる。導
体パターンに使用される導体材料としては、エポキシ樹
脂やフェノール樹脂等の熱硬化性樹脂をバインダとし、
それに金、銀1 m @ニッケル、タングステン、モリ
ブデン、白金、アルミニウム、錫等の金属粉、およびこ
れらを主成分とする合金または複合粉、あるいはカーボ
ン粉、五酸化バナジウム粉等の半導体粉を混練してペー
スト化したもの等を使用することができる。
As a method for forming the conductive pattern, since the terminal surface of the chip-type electronic component and the surface of the substrate are on the same plane, screen printing, offset printing, a drawing method using a dispenser, etc. can be used. It is also possible to form a conductor pattern by a photographic method in which a metal thin film layer is formed and selectively etched using a photosensitive resin. The conductor material used for the conductor pattern is a thermosetting resin such as epoxy resin or phenol resin as a binder.
Then, 1 m of gold, silver, nickel, tungsten, molybdenum, platinum, aluminum, tin, and other metal powders, alloys or composite powders containing these as main components, or semiconductor powders such as carbon powder and vanadium pentoxide powder are kneaded. You can also use a paste made from the same ingredients.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、チップ型電子部品が硬化した樹脂から
なる基板中に確実に埋め込まれた形で実装されるため、
この基板上に印刷等により導体パターンを形成すると同
時にチップ型電子部品の端子との接続を行なうこと力S
できる。従って、厚みがほぼチップ型電子部品の厚みと
同程度の極めて薄い回路モジュールを得ることができる
。また、製造工程も液状樹脂を硬化させて基板形成を行
なっていることと、上述のように導体パターンの形成と
チップ型α子部品の端子接続とが同時になされることに
よって、配線基板の形成と電子部品の実装を別々に行な
う従来法に比較して著しく簡単となり、短時間で回路モ
ジュールが得られ、それにより製造コストも大幅に低減
される。
According to the present invention, since the chip-type electronic component is mounted in a form that is reliably embedded in the substrate made of hardened resin,
A conductor pattern is formed on this board by printing, etc., and at the same time connection is made with the terminal of the chip type electronic component.
can. Therefore, it is possible to obtain an extremely thin circuit module whose thickness is approximately the same as that of a chip-type electronic component. Furthermore, in the manufacturing process, the board is formed by curing the liquid resin, and as mentioned above, the formation of the conductor pattern and the terminal connection of the chip-type α-child component are performed simultaneously, so that the wiring board is formed and Compared to the conventional method of mounting electronic components separately, this method is significantly simpler and allows circuit modules to be obtained in a shorter time, thereby significantly reducing manufacturing costs.

〔発明の実施列〕[Implementation sequence of the invention]

第1図に本発明の一実施例に係る回路モジュールの製造
工程を示す。まず、第1図(a)に示すように厚さ3m
rn程度のガラス板l上lこシリコーン樹−脂(東芝シ
リコン社製’f’5E3Q51)をスピンナーコーティ
ングし、厚さ10μmの被膜2を得た後、これを120
℃で15分間加熱することによりゲル化させて表面に粘
着性と離型性を付与し、支持体3とする。そして、第2
図乃至第4図に示すような、゛成極4.5mが絞り込ま
れた台形もしくはかまぼこ形のチップ型電子部品6,7
,8.3371図(b)に示すように支持体3上の所定
位置に配電する。
FIG. 1 shows the manufacturing process of a circuit module according to an embodiment of the present invention. First, as shown in Figure 1(a), the thickness is 3 m.
A silicone resin (manufactured by Toshiba Silicon Co., Ltd. 'f'5E3Q51) was coated with a spinner on a glass plate with a size of about
The support 3 is obtained by heating at 15° C. for 15 minutes to gel it and impart adhesiveness and releasability to the surface. And the second
As shown in FIGS.
, 8.3371 As shown in Figure (b), power is distributed to a predetermined position on the support 3.

これらの部品の配置には、チップマウンタを用いた。な
お、第2図は抵抗を、@3図はコンデンサを、第4図は
トランジスタを示す。
A chip mounter was used to place these parts. Note that Fig. 2 shows a resistor, Fig. 3 shows a capacitor, and Fig. 4 shows a transistor.

次に、第1図(C)に示すように支持体3の周囲に厚さ
2rnrn 程度のテフロンよりなるスペーサ9を配置
し、その状態で支持体3上の各チップm、電子部品6〜
8の周囲に紫外線硬化樹脂10を注型し、さらにその上
を例えばテフロンからなる平板11で覆う。そして、支
持体3側から紫外線を照射し、紫外線硬化樹脂10を硬
化させる。この硬化した紫外線硬化樹脂が回路モジュー
ルの基板となる。
Next, as shown in FIG. 1(C), a spacer 9 made of Teflon with a thickness of about 2rnrn is placed around the support 3, and in this state, each chip m and the electronic components 6 to 6 on the support 3 are placed.
An ultraviolet curable resin 10 is cast around 8, and further covered with a flat plate 11 made of Teflon, for example. Then, ultraviolet rays are irradiated from the side of the support 3 to cure the ultraviolet curing resin 10. This cured ultraviolet curable resin becomes the substrate of the circuit module.

次lこ、支持体3と平板11およびスペーサ9を・剥離
することにより、第1図(d)に示すように硬化した紫
外線硬化樹脂からなる基板12中にチップ型電子部品6
〜8が埋め込まれたものが得られる。
Next, by peeling off the support 3, the flat plate 11, and the spacer 9, the chip-type electronic component 6 is placed inside the substrate 12 made of a cured ultraviolet curable resin, as shown in FIG. 1(d).
~8 is embedded.

この状態では、各チップ型電子部品6〜8の端子は基板
12の表面から露出している。
In this state, the terminals of each chip type electronic component 6 to 8 are exposed from the surface of the substrate 12.

次に、第1図(e)に示すように幕板12上に例えば銀
ペーストをスクリーン印刷することにより所望の導体パ
ターン13を形成すると共に、これら導体パーターン1
3とチップ型電子部品6〜8の端子との接続をとる。こ
の後、150℃で1時間加熱することにより銀ペースト
を硬化させ、@路モジュールを完成させた。
Next, as shown in FIG. 1(e), desired conductor patterns 13 are formed by screen printing, for example, silver paste on the curtain plate 12, and these conductor patterns 1
3 and the terminals of chip type electronic components 6 to 8 are established. Thereafter, the silver paste was cured by heating at 150° C. for 1 hour to complete the @road module.

こうして得られた回路モジュールに対し動作試験を行な
ったところ、良好な動作が得られた。
When the circuit module thus obtained was subjected to an operation test, good operation was obtained.

@5図は本発明の他の実施例に係る回路モジュールを示
すもので、紫外線硬化樹脂の上に設置する平板11とし
て例えば厚さ2mmのガラスエポキシ板を用い、これを
前記実施例のように剥離せずに基板12に密宥させたま
ま残し、回路モジュールの補強板としたものである。
Figure @5 shows a circuit module according to another embodiment of the present invention, in which a glass epoxy plate with a thickness of 2 mm, for example, is used as the flat plate 11 installed on the ultraviolet curing resin, and this is used as in the previous embodiment. It is not peeled off, but is left tightly attached to the substrate 12, and is used as a reinforcing plate for the circuit module.

本発明(=その他、要旨を逸脱しない範囲で種々変形実
施が可能である。
The present invention can be modified in various ways without departing from the scope of the invention.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例1こ係る回路モジュールの製
造工程を説明するための図、@2図乃至第4図は本発明
に用いられるチップ型電子部品の形状を示す図、第5図
は本発明の他の実施例に係る回路モジュールの最終工程
における断面図である。 3・・・支持体、6〜8・・・チップ型電子部品、4゜
5・・・端子、9・−スペーサ、10・・・紫外線硬化
樹脂、11・−平板、12・・・硬化した紫外線硬化樹
脂からなる基板、13・・・導体パターン。 代理人弁理士 則 近 憲 佑(ほか1名)第  1 
図 第2図 第  3 図 第  4 図
Figure 1 is a diagram for explaining the manufacturing process of a circuit module according to Embodiment 1 of the present invention; Figures 2 to 4 are diagrams showing the shape of a chip-type electronic component used in the present invention; The figure is a sectional view of a circuit module according to another embodiment of the present invention in its final step. 3...Support, 6-8...Chip type electronic component, 4゜5...Terminal, 9...Spacer, 10...UV curable resin, 11...Flat plate, 12...Hardened A substrate made of ultraviolet curing resin, 13... conductor pattern. Representative Patent Attorney Kensuke Chika (and 1 other person) No. 1
Figure 2 Figure 3 Figure 4

Claims (3)

【特許請求の範囲】[Claims] (1)チップ型電子部品を基板に実装した回路モジュー
ルを製造する方法において、電極側が絞り込まれた形状
を有するチップ型電子部品を粘着性を有する支持体上の
所定位置に該電子部品の電極端子形成面を支持体表面に
対向させて配置し、前記電子部品の周囲に液状樹脂を注
型し、該液状樹脂上に被覆用部材を設置した後前記液状
樹脂を硬化させ、次いで前記支持体を剥離した後、硬化
した前記樹脂からなる基板の前記支持体に対向していた
面上に導体パターンを形成すると共に、該導体パターン
と前記チップ型電子部品上の電極端子との接続を行なう
ことを特徴とする回路モジュールの製造方法。
(1) In a method for manufacturing a circuit module in which a chip-type electronic component is mounted on a substrate, a chip-type electronic component having a narrowed shape on the electrode side is placed at a predetermined position on an adhesive support to form an electrode terminal of the electronic component. The forming surface is arranged to face the surface of the support, a liquid resin is cast around the electronic component, a covering member is placed on the liquid resin, the liquid resin is cured, and the support is then placed. After peeling off, a conductor pattern is formed on the surface of the substrate made of the cured resin that was facing the support, and the conductor pattern is connected to the electrode terminal on the chip-type electronic component. A method for manufacturing a featured circuit module.
(2)前記チップ型電子部品は、その断面形状が台形で
あることを特徴とする特許請求の範囲第1項記載の回路
モジュールの製造方法。
(2) The method for manufacturing a circuit module according to claim 1, wherein the chip-type electronic component has a trapezoidal cross-sectional shape.
(3)前記チップ型電子部品は、その断面形状がかまぼ
こ形であることを特徴とする特許請求の範囲第1項記載
の回路モジュールの製造方法。
(3) The method for manufacturing a circuit module according to claim 1, wherein the chip-type electronic component has a semicylindrical cross-sectional shape.
JP2824385A 1985-02-18 1985-02-18 Manufacture of circuit module Pending JPS61188957A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2824385A JPS61188957A (en) 1985-02-18 1985-02-18 Manufacture of circuit module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2824385A JPS61188957A (en) 1985-02-18 1985-02-18 Manufacture of circuit module

Publications (1)

Publication Number Publication Date
JPS61188957A true JPS61188957A (en) 1986-08-22

Family

ID=12243140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2824385A Pending JPS61188957A (en) 1985-02-18 1985-02-18 Manufacture of circuit module

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0263186A (en) * 1988-08-29 1990-03-02 Rohm Co Ltd Hybrid integrated circuit
US5346765A (en) * 1990-02-06 1994-09-13 Sumitono Bakelite Company Limited Cover tape for packaging chip type electronic parts
EP1152464A2 (en) * 2000-04-28 2001-11-07 Sony Corporation Chip size package semiconductor device and method of manufacturing the same
EP1204305A2 (en) * 2000-11-03 2002-05-08 Tyco Electronics AMP GmbH Device comprising an electrical circuit carried by a carrier element and method for the manufacture of such a device
KR100404932B1 (en) * 2000-04-07 2003-11-10 세이코 엡슨 가부시키가이샤 Platform and optical module, manufacturing method of the same, and optical transmission device
JP2006190975A (en) * 2004-12-30 2006-07-20 Advanced Chip Engineering Technology Inc Sealant filling structure of wafer-level package, and manufacturing method thereof
JP2018120989A (en) * 2017-01-26 2018-08-02 オムロン株式会社 Resin structure and production method therefor
WO2018163516A1 (en) * 2017-03-10 2018-09-13 オムロン株式会社 Electronic device and method for manufacturing same

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0263186A (en) * 1988-08-29 1990-03-02 Rohm Co Ltd Hybrid integrated circuit
US5346765A (en) * 1990-02-06 1994-09-13 Sumitono Bakelite Company Limited Cover tape for packaging chip type electronic parts
KR100404932B1 (en) * 2000-04-07 2003-11-10 세이코 엡슨 가부시키가이샤 Platform and optical module, manufacturing method of the same, and optical transmission device
EP1152464A2 (en) * 2000-04-28 2001-11-07 Sony Corporation Chip size package semiconductor device and method of manufacturing the same
EP1204305A2 (en) * 2000-11-03 2002-05-08 Tyco Electronics AMP GmbH Device comprising an electrical circuit carried by a carrier element and method for the manufacture of such a device
EP1204305A3 (en) * 2000-11-03 2004-01-07 Tyco Electronics AMP GmbH Device comprising an electrical circuit carried by a carrier element and method for the manufacture of such a device
JP2006190975A (en) * 2004-12-30 2006-07-20 Advanced Chip Engineering Technology Inc Sealant filling structure of wafer-level package, and manufacturing method thereof
JP2018120989A (en) * 2017-01-26 2018-08-02 オムロン株式会社 Resin structure and production method therefor
WO2018138979A1 (en) * 2017-01-26 2018-08-02 オムロン株式会社 Resin structure and production method therefor
WO2018163516A1 (en) * 2017-03-10 2018-09-13 オムロン株式会社 Electronic device and method for manufacturing same

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