JPS6115835U

JPS6115835U - Synchronizers for cycle-operating machines

Info

Publication number: JPS6115835U
Application number: JP9685684U
Authority: JP
Inventors: 正夫田中
Original assignee: 株式会社東芝
Priority date: 1984-06-29
Filing date: 1984-06-29
Publication date: 1986-01-29

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図はこの考案の一実施例に係わるサイクル同期装置
における回路構成を示すブロック図、第２図は第１図で
示す回路構成における信号の関係の要部を表すタイムチ
ャート、第３図は従来のサイクル同期装置における回路
構成を示すブロック図、第４図は第３図で示す回路構成
における信号の関係の要部を表すタイムチャートで条る
。１・・・主駆動軸、２・・・サイクル原点設定円板、３
・・・タイミング溝、４・・・サイクル原点検出器、５
・・・サイクル原点検知向路、６・・・インターバルタ
イマ回路、７・・・主制御回路、８・・・出力回路、９
・・・同期制御回路、１０・・・サイクル原点信号、１
０ａ・・・サイクル原点信号パルス、１１・・・インタ
ーバルタイミング信号、１１ａ・・・インターバルタイ
ミング信号パルス、１２−・・制御出力信号、１３・・
・判定信号。FIG. 1 is a block diagram showing the circuit configuration of a cycle synchronizer according to an embodiment of this invention, FIG. 2 is a time chart showing the main part of the relationship of signals in the circuit configuration shown in FIG. 1, and FIG. FIG. 4, a block diagram showing the circuit configuration of a conventional cycle synchronizer, is a time chart showing the main part of the relationship of signals in the circuit configuration shown in FIG. 1... Main drive shaft, 2... Cycle origin setting disk, 3
...Timing groove, 4...Cycle origin detector, 5
...Cycle origin detection direction, 6...Interval timer circuit, 7...Main control circuit, 8...Output circuit, 9
... Synchronous control circuit, 10 ... Cycle origin signal, 1
0a... Cycle origin signal pulse, 11... Interval timing signal, 11a... Interval timing signal pulse, 12-... Control output signal, 13...
・Judgment signal.

Claims

[Scope of utility model registration request]

A cycle origin circuit that detects the cycle origin of a cycle operating machine, an interval timer circuit whose timing can be controlled by external control, and a signal output from the cycle origin detection circuit is inputted to control the interval timer circuit. A synchronous control circuit that generates signals, an interval timing signal output from the isitabal dimer circuit, and a cycle origin synchronization signal output from the synchronous control circuit are input. 1. A synchronizing device for a cycle operating machine, characterized by a main control circuit for generating and a main control circuit.