JPS61154037A - Fine pattern formation - Google Patents

Abstract

PURPOSE:To enable formation of a square-shaped fine pattern having crossings which escape from round edges by forming a first linear pattern using a first mask member and subsequently a second linear pattern using a second mask member which crosses the first mask member. CONSTITUTION:A polycrystalline silicon film is piled on a silicon oxide film 2, which has been formed on a substrate 1, to form a first mask having the linear pattern of the polycrystalline silicon film 3 parallel to the 100 direction of the substrate in the subsequent process. Next, starting from a three layer resist which comprizes a lower layer-organic film-, an intermediate layer- silica coated film- and a upper layer- resist film-, a resist pattern is formed in the direction perpendicular to the polycrystalline silicon film pattern by photoetching of the upper layer; the intermediate silicon film is etched by reac tive ion etching; subsequently an organic film pattern 4 as a second mask is formed by O2 reactive ion etching of the lower organic layer with the mask of the intermediate silica film. Finally a SiO2 film pattern having a vertical cross-section is formed by reactive ion etching of the bare silicon oxide film using the first and the second masks, followed by removal of the masks.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a method of forming a fine pattern by etching areas not covered with a mask material in semiconductor device formation. 〉 In recent years, with the increasing integration of semiconductor devices, remarkable progress has been made in the formation of fine patterns due to improvements in lithography technology and dry etching technology. For example, the Journal of Vacuum Sciences and Technology
In Vol. 15, 1978, pages 319-326, it was reported that it is possible to form a silicon oxide film pattern with a vertical cross-sectional shape that does not change to t-4 by reactive sputter etching using carbon tetrafluoride gas. In reactive sputter etching, the etching gas and etching conditions are selected excessively, and it can be used not only for silicon oxide films but also for insulators and semiconductors.

On the other hand, lithography technology uses ultraviolet light reduction projection instead of the conventional original projection exposure method. With the development of IiP exposure technology, Problems arise with complex patterns that are close together or intersect.

For example, by ultraviolet light reduction projection exposure method,
When transferring the mask pattern shown on the substrate, the mask pattern shown in Fig. 2 (
As shown in b), at the intersection of the patterns, the corners of the resist pattern transferred by the proximity effect are rounded.

This phenomenon is not limited to light exposure, but is an unavoidable problem in X-ray exposure and electron beam exposure as well, although there are differences in degree. ◎If the resist pattern has the shape shown in Figure 2, it is anisotropic. If static etching is used, the resist pattern will be etched (and this will be a hindrance to the formation of fine semiconductor devices. Examples of this hindrance include the following: fc73L on an 8i (100) single crystal substrate)
When an insulating film such as O@ is formed and this insulating film is patterned using the conventional method described above so that it faces the insulating film Il wall'1k (100) direction, rounding occurs at the corners.
When vapor phase selective epitaxial growth of i is performed, the corners are not completely filled with Si due to the roundness, and a considerably large slope called a facet is formed. shrimp grown
If a semiconductor element is formed on xg, there will be problems such as disconnection of wiring at these 7 points.<Object of the Invention> The present invention aims to eliminate roundness at pattern intersections when processing fine patterns in semiconductor element formation. Another object of the present invention is to provide a method for forming a fine pattern having a rectangular shape.

<Configuration of the Invention> According to the present invention, a mask pattern is formed using an exposure technique on a substrate or a film deposited on a substrate, and a mask pattern is formed on a substrate or a film deposited on a substrate not covered by the mask pattern. In the pattern forming method of anisotropically etching the substrate, first, a linear pattern is formed using a first mask material, then a linear pattern consisting of a second mask material that intersects with the linear pattern is formed, and then the substrate or the substrate is etched. Detailed description of the structure in which an intersecting pattern is obtained by anisotropically etching the film deposited on the substrate> The present invention solves the problems of the prior art by having the following structure. When anisotropically etching a film deposited on a film, the mask pattern forming process is performed multiple times in areas where roundness is not desired at pattern intersections.First, a linear pattern is formed using the first mask material, and then the pattern is A pattern made of the second mask material that intersects with is formed. In the multiple exposure steps, only linear patterns are exposed, so the proximity effect in exposure can be prevented. Next, by using the first and second masks to anisotropically etch the substrate or the film deposited on the substrate by reactive ion etching, it is possible to form a square pattern without rounding at the pattern intersections. ◎ In this way, even if the pattern is miniaturized, a desired intersecting pattern can be obtained ◎ <Example> Examples of the present invention will be explained in detail below using the drawings @ Figure 1 shows the present invention In order to explain in detail, this is a schematic diagram showing the cross-sectional or planar structure in the main manufacturing process. In other words, a silicon substrate 1 with a thickness of about 2 μm is formed by thermal oxidation on a 2-layer silicon substrate 1 with a (100) plane orientation. After forming the amorphous film 2, a polycrystalline silicon film with a thickness of about 0.3 μm is deposited by low-pressure CVD, and a polycrystalline silicon film, which will become the first mask, is deposited by photolithography and reactive ion etching. When the linear pattern 3 of the silicon film is formed parallel to the (100) direction of the substrate, the structure shown in FIG. For the three-layer resist, the upper layer is formed by ordinary photolithography to form a resist pattern in a direction perpendicular to the polycrystalline silicon film pattern, the middle layer silica film is etched by reactive ion etching, and then the middle layer silica film is etched by reactive ion etching. Using the intermediate silica film as a mask, the lower organic film is subjected to Ot reactive ion etching to form an organic film pattern 4 serving as a second mask, resulting in the structure shown in FIGS. 1(b) and 1(1)'.

Next, using the first and second masks, the exposed silicon oxide film is etched by reactive ion etching to form an 8T01 film pattern 7 having a vertical cross-sectional shape, and when the masks are removed, FIG. 1(c) , (obtain the structure of J.

Next, 5iH2C11 and H! Adding about 1 vol. of IC/gas to the gas system consisting of the following, silicon epitaxial growth was performed selectively only on the silicon substrate at a temperature of 950°C. When the epitaxial silicon film 5 had a thickness of 2 μm, the structure of When the 8i01 pattern intersections were orthogonal as in this example, the size of the 7 assets in the epitaxial layer was small and a substrate with good flatness was obtained. The stacking fault density in the vicinity of the 8i01 film was also reduced. After this, a gate oxide film 6 with a thickness of 200X was formed to form a normal n-channel M08FBT.

Next, by ion implantation, the acceleration energy of boron gold was 30k.
1.5 x 10”tyn-2 in eV and 100 keV
t'2 x 101232 x 101232 x 101232 x 101232 x 100 x 100 x 100 x 100 x 100 x 100 x 1000 x 1000 x 1000 x 1000 x 1000 x 1000 x 1000 x 1000 x 1000 x 100% polycrystalline silicon. When gate electrode 7 is formed by depositing and reactive ion etching, @1 Figure t
Obtain the structure of el. Next, arsenic is accelerated with an energy of 150
5 x 10'' es-2 ions are implanted at keV to form a heavily doped n-type layer 8, and then phosphorous is diffused into the polysilicon gate electrode.
T-deposit, make contact hole, aluminum broken line 11
When performing i, an n-channel MO8 as shown in FIG. 1(f)
FET is obtained.

As described above, according to this example, the size of the 7 assets during epitaxial growth was reduced and the flatness was improved. Furthermore, since the stacking fault density of the epitaxial growth layer has been reduced, the manufacturing yield has improved when devices such as Kn channel MO81T are manufactured. Fine putter 7 that prevents roundness and has a square shape
It became possible to form 0

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the cross-sectional structure or planar structure of the MO8FFXT manufacturing method according to the embodiment of the present invention.
(f) is a sectional view, and (f'), (h'), and (L') are plan views. FIG. 2 (all (b) is a schematic plan view showing transfer changes between a reticle pattern and a resist pattern using a conventional method. In the figure, l...silicon substrate 2... silicon oxide film 3...
...Polycrystalline silicon film pattern (first mask) 4...
- Organic film pattern (second mask) 5...Epitaxial silicon layer 6...Gate oxide film 7...Gate electrode 8...
High concentration n-type layer 9...CVD8i0. Membrane lO...
Aluminum wiring 21...Reticle pattern 22...Resist pattern

Claims (1)

[Claims] A pattern forming method in which a mask pattern is formed on a substrate or a film deposited on the substrate using an exposure technique, and the substrate not covered by the mask pattern or the film deposited on the substrate is anisotropically etched, First, a linear pattern is formed using a first mask material, then a linear pattern made of a second mask material that intersects with the linear pattern is formed, and then the substrate or the film deposited on the substrate is anisotropically etched. , a fine pattern forming method characterized by forming an intersecting pattern.